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TimeQuest Timing Analyzer report for HD_ADPCM_Codec
Sun Feb 14 23:32:54 2010
Quartus II Version 9.0 Build 132 02/25/2009 SJ Web Edition


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. TimeQuest Timing Analyzer Summary
  3. Parallel Compilation
  4. Clocks
  5. Slow Model Fmax Summary
  6. Slow Model Setup Summary
  7. Slow Model Hold Summary
  8. Slow Model Recovery Summary
  9. Slow Model Removal Summary
 10. Slow Model Minimum Pulse Width
 11. Setup Times
 12. Hold Times
 13. Clock to Output Times
 14. Minimum Clock to Output Times
 15. Fast Model Setup Summary
 16. Fast Model Hold Summary
 17. Fast Model Recovery Summary
 18. Fast Model Removal Summary
 19. Fast Model Minimum Pulse Width
 20. Setup Times
 21. Hold Times
 22. Clock to Output Times
 23. Minimum Clock to Output Times
 24. Multicorner Timing Analysis Summary
 25. Setup Times
 26. Hold Times
 27. Clock to Output Times
 28. Minimum Clock to Output Times
 29. Setup Transfers
 30. Hold Transfers
 31. Recovery Transfers
 32. Removal Transfers
 33. Report TCCS
 34. Report RSKM
 35. Unconstrained Paths
 36. TimeQuest Timing Analyzer Messages



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2009 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.



+----------------------------------------------------------------------+
; TimeQuest Timing Analyzer Summary                                    ;
+--------------------+-------------------------------------------------+
; Quartus II Version ; Version 9.0 Build 132 02/25/2009 SJ Web Edition ;
; Revision Name      ; HD_ADPCM_Codec                                  ;
; Device Family      ; Cyclone II                                      ;
; Device Name        ; EP2C20F484C7                                    ;
; Timing Models      ; Final                                           ;
; Delay Model        ; Combined                                        ;
; Rise/Fall Delays   ; Unavailable                                     ;
+--------------------+-------------------------------------------------+


Parallel compilation was disabled, but you have multiple processors available. Enable parallel compilation to reduce compilation time.
+-------------------------------------+
; Parallel Compilation                ;
+----------------------------+--------+
; Processors                 ; Number ;
+----------------------------+--------+
; Number detected on machine ; 2      ;
; Maximum allowed            ; 1      ;
+----------------------------+--------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clocks                                                                                                                                                                                                                                               ;
+-------------------------------------------+------+--------+------------+-------+-------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+--------+-----------------------------------------------+
; Clock Name                                ; Type ; Period ; Frequency  ; Rise  ; Fall  ; Duty Cycle ; Divide by ; Multiply by ; Phase ; Offset ; Edge List ; Edge Shift ; Inverted ; Master ; Source ; Targets                                       ;
+-------------------------------------------+------+--------+------------+-------+-------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+--------+-----------------------------------------------+
; CLOCK_IN                                  ; Base ; 1.000  ; 1000.0 MHz ; 0.000 ; 0.500 ;            ;           ;             ;       ;        ;           ;            ;          ;        ;        ; { CLOCK_IN }                                  ;
; Flash_Memory_Driver:u4|Flash_Memory_Clock ; Base ; 1.000  ; 1000.0 MHz ; 0.000 ; 0.500 ;            ;           ;             ;       ;        ;           ;            ;          ;        ;        ; { Flash_Memory_Driver:u4|Flash_Memory_Clock } ;
; I2S_ACTIVE_IN                             ; Base ; 1.000  ; 1000.0 MHz ; 0.000 ; 0.500 ;            ;           ;             ;       ;        ;           ;            ;          ;        ;        ; { I2S_ACTIVE_IN }                             ;
; I2S_Driver:u3|I2S_Clock                   ; Base ; 1.000  ; 1000.0 MHz ; 0.000 ; 0.500 ;            ;           ;             ;       ;        ;           ;            ;          ;        ;        ; { I2S_Driver:u3|I2S_Clock }                   ;
; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT     ; Base ; 1.000  ; 1000.0 MHz ; 0.000 ; 0.500 ;            ;           ;             ;       ;        ;           ;            ;          ;        ;        ; { I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT }     ;
+-------------------------------------------+------+--------+------------+-------+-------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+--------+-----------------------------------------------+


+---------------------------------------------------------------------------------+
; Slow Model Fmax Summary                                                         ;
+------------+-----------------+-------------------------------------------+------+
; Fmax       ; Restricted Fmax ; Clock Name                                ; Note ;
+------------+-----------------+-------------------------------------------+------+
; 19.16 MHz  ; 19.16 MHz       ; CLOCK_IN                                  ;      ;
; 241.14 MHz ; 241.14 MHz      ; I2S_Driver:u3|I2S_Clock                   ;      ;
; 287.52 MHz ; 287.52 MHz      ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT     ;      ;
; 345.9 MHz  ; 345.9 MHz       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;      ;
+------------+-----------------+-------------------------------------------+------+
This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods.  FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock.  Paths of different clocks, including generated clocks, are ignored.  For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis.


+---------------------------------------------------------------------+
; Slow Model Setup Summary                                            ;
+-------------------------------------------+---------+---------------+
; Clock                                     ; Slack   ; End Point TNS ;
+-------------------------------------------+---------+---------------+
; CLOCK_IN                                  ; -51.180 ; -2303.828     ;
; I2S_Driver:u3|I2S_Clock                   ; -3.147  ; -12.329       ;
; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT     ; -2.478  ; -37.927       ;
; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -1.891  ; -47.530       ;
+-------------------------------------------+---------+---------------+


+--------------------------------------------------------------------+
; Slow Model Hold Summary                                            ;
+-------------------------------------------+--------+---------------+
; Clock                                     ; Slack  ; End Point TNS ;
+-------------------------------------------+--------+---------------+
; CLOCK_IN                                  ; -2.666 ; -7.994        ;
; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 0.445  ; 0.000         ;
; I2S_Driver:u3|I2S_Clock                   ; 0.445  ; 0.000         ;
; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT     ; 0.445  ; 0.000         ;
+-------------------------------------------+--------+---------------+


+---------------------------------------+
; Slow Model Recovery Summary           ;
+---------------+-------+---------------+
; Clock         ; Slack ; End Point TNS ;
+---------------+-------+---------------+
; I2S_ACTIVE_IN ; 0.293 ; 0.000         ;
+---------------+-------+---------------+


+----------------------------------------+
; Slow Model Removal Summary             ;
+---------------+--------+---------------+
; Clock         ; Slack  ; End Point TNS ;
+---------------+--------+---------------+
; I2S_ACTIVE_IN ; -0.041 ; -0.041        ;
+---------------+--------+---------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Minimum Pulse Width                                                                                                                                                   ;
+--------+--------------+----------------+------------------+---------------------------------------+------------+-----------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                 ; Clock Edge ; Target                                                          ;
+--------+--------------+----------------+------------------+---------------------------------------+------------+-----------------------------------------------------------------+
; -1.631 ; 1.000        ; 2.631          ; Port Rate        ; CLOCK_IN                              ; Rise       ; CLOCK_IN                                                        ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT ; Rise       ; ADPCM2_DECODER_ACTIVE                                           ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT ; Rise       ; ADPCM2_DECODER_ACTIVE                                           ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT ; Rise       ; ADPCM2_DECODER_DATA[0]                                          ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT ; Rise       ; ADPCM2_DECODER_DATA[0]                                          ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT ; Rise       ; ADPCM2_DECODER_DATA[1]                                          ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT ; Rise       ; ADPCM2_DECODER_DATA[1]                                          ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT ; Rise       ; ADPCM_Bit_Counter[1]                                            ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT ; Rise       ; ADPCM_Bit_Counter[1]                                            ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT ; Rise       ; ADPCM_Bit_Counter[2]                                            ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT ; Rise       ; ADPCM_Bit_Counter[2]                                            ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_State_Counter[0]           ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_State_Counter[0]           ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_State_Counter[1]           ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_State_Counter[1]           ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_State_Counter[2]           ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_State_Counter[2]           ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[2] ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[2] ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[3] ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[3] ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[4] ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[4] ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[5] ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[5] ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[6] ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[6] ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[7] ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[7] ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[8] ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[8] ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[9] ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[9] ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Active_Module                            ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Active_Module                            ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[0]                         ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[0]                         ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[10]                        ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[10]                        ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[11]                        ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[11]                        ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[12]                        ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[12]                        ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[13]                        ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[13]                        ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[14]                        ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[14]                        ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[15]                        ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[15]                        ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[1]                         ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[1]                         ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[2]                         ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[2]                         ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[3]                         ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[3]                         ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[4]                         ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[4]                         ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[5]                         ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[5]                         ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[6]                         ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[6]                         ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[7]                         ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[7]                         ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[8]                         ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[8]                         ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[9]                         ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[9]                         ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[0]                          ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[0]                          ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[10]                         ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[10]                         ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[11]                         ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[11]                         ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[12]                         ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[12]                         ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[13]                         ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[13]                         ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[14]                         ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[14]                         ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[15]                         ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[15]                         ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[1]                          ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[1]                          ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[2]                          ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[2]                          ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[3]                          ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[3]                          ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[4]                          ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[4]                          ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[5]                          ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[5]                          ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[6]                          ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[6]                          ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[7]                          ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[7]                          ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[8]                          ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[8]                          ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[9]                          ;
; -0.611 ; 0.500        ; 1.111          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[9]                          ;
; -0.611 ; 0.500        ; 1.111          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_Data[0]                              ;
+--------+--------------+----------------+------------------+---------------------------------------+------------+-----------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                                                                      ;
+-----------------------------+-------------------------------------------+-------+-------+------------+-------------------------------------------+
; Data Port                   ; Clock Port                                ; Rise  ; Fall  ; Clock Edge ; Clock Reference                           ;
+-----------------------------+-------------------------------------------+-------+-------+------------+-------------------------------------------+
; KEY_0                       ; CLOCK_IN                                  ; 7.587 ; 7.587 ; Rise       ; CLOCK_IN                                  ;
; KEY_1                       ; CLOCK_IN                                  ; 5.754 ; 5.754 ; Rise       ; CLOCK_IN                                  ;
; FLASH_MEMORY_DATA_INOUT[*]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 4.447 ; 4.447 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[0] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 4.258 ; 4.258 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[1] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 4.277 ; 4.277 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[2] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 4.133 ; 4.133 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[3] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 4.111 ; 4.111 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[4] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 4.287 ; 4.287 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[5] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 4.142 ; 4.142 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[6] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 4.440 ; 4.440 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[7] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 4.447 ; 4.447 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
+-----------------------------+-------------------------------------------+-------+-------+------------+-------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                                                         ;
+-----------------------------+-------------------------------------------+--------+--------+------------+-------------------------------------------+
; Data Port                   ; Clock Port                                ; Rise   ; Fall   ; Clock Edge ; Clock Reference                           ;
+-----------------------------+-------------------------------------------+--------+--------+------------+-------------------------------------------+
; KEY_0                       ; CLOCK_IN                                  ; -4.570 ; -4.570 ; Rise       ; CLOCK_IN                                  ;
; KEY_1                       ; CLOCK_IN                                  ; -5.506 ; -5.506 ; Rise       ; CLOCK_IN                                  ;
; FLASH_MEMORY_DATA_INOUT[*]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -3.863 ; -3.863 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[0] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -4.010 ; -4.010 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[1] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -4.029 ; -4.029 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[2] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -3.885 ; -3.885 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[3] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -3.863 ; -3.863 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[4] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -4.039 ; -4.039 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[5] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -3.894 ; -3.894 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[6] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -4.192 ; -4.192 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[7] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -4.199 ; -4.199 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
+-----------------------------+-------------------------------------------+--------+--------+------------+-------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                                                                ;
+-------------------------------+-------------------------------------------+--------+--------+------------+-------------------------------------------+
; Data Port                     ; Clock Port                                ; Rise   ; Fall   ; Clock Edge ; Clock Reference                           ;
+-------------------------------+-------------------------------------------+--------+--------+------------+-------------------------------------------+
; I2C_CLOCK_OUT                 ; CLOCK_IN                                  ; 8.993  ; 8.993  ; Rise       ; CLOCK_IN                                  ;
; I2C_DATA_INOUT                ; CLOCK_IN                                  ; 9.349  ; 9.349  ; Rise       ; CLOCK_IN                                  ;
; I2S_CORE_CLOCK_OUT            ; CLOCK_IN                                  ; 9.120  ; 9.120  ; Rise       ; CLOCK_IN                                  ;
; FLASH_MEMORY_ADDRESS_OUT[*]   ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.760  ; 7.760  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[0]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.760  ; 7.760  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[1]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.111  ; 7.111  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[2]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.465  ; 7.465  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[3]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.448  ; 7.448  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[4]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 6.840  ; 6.840  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[5]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.418  ; 7.418  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[6]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.400  ; 7.400  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[7]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.182  ; 7.182  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[8]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.148  ; 7.148  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[9]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.387  ; 7.387  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[10] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.099  ; 7.099  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[11] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.349  ; 7.349  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[12] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.111  ; 7.111  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[13] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.379  ; 7.379  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[14] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.137  ; 7.137  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[15] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.396  ; 7.396  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[16] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.372  ; 7.372  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[17] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.398  ; 7.398  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[18] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 6.925  ; 6.925  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[19] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 6.803  ; 6.803  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[20] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.086  ; 7.086  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[21] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 6.561  ; 6.561  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
; FLASH_MEMORY_nCE_OUT          ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.108  ; 7.108  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
; FLASH_MEMORY_nOE_OUT          ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.103  ; 7.103  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
; I2S_CLOCK_OUT                 ; I2S_Driver:u3|I2S_Clock                   ; 5.887  ;        ; Rise       ; I2S_Driver:u3|I2S_Clock                   ;
; I2S_CLOCK_OUT                 ; I2S_Driver:u3|I2S_Clock                   ;        ; 5.887  ; Fall       ; I2S_Driver:u3|I2S_Clock                   ;
; I2S_DATA_INOUT                ; I2S_Driver:u3|I2S_Clock                   ; 9.982  ; 9.982  ; Fall       ; I2S_Driver:u3|I2S_Clock                   ;
; I2S_LEFT_RIGHT_CLOCK_OUT      ; I2S_Driver:u3|I2S_Clock                   ; 10.667 ; 10.667 ; Fall       ; I2S_Driver:u3|I2S_Clock                   ;
+-------------------------------+-------------------------------------------+--------+--------+------------+-------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                                                                        ;
+-------------------------------+-------------------------------------------+--------+--------+------------+-------------------------------------------+
; Data Port                     ; Clock Port                                ; Rise   ; Fall   ; Clock Edge ; Clock Reference                           ;
+-------------------------------+-------------------------------------------+--------+--------+------------+-------------------------------------------+
; I2C_CLOCK_OUT                 ; CLOCK_IN                                  ; 8.993  ; 8.993  ; Rise       ; CLOCK_IN                                  ;
; I2C_DATA_INOUT                ; CLOCK_IN                                  ; 9.349  ; 9.349  ; Rise       ; CLOCK_IN                                  ;
; I2S_CORE_CLOCK_OUT            ; CLOCK_IN                                  ; 9.120  ; 9.120  ; Rise       ; CLOCK_IN                                  ;
; FLASH_MEMORY_ADDRESS_OUT[*]   ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 6.561  ; 6.561  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[0]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.760  ; 7.760  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[1]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.111  ; 7.111  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[2]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.465  ; 7.465  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[3]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.448  ; 7.448  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[4]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 6.840  ; 6.840  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[5]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.418  ; 7.418  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[6]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.400  ; 7.400  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[7]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.182  ; 7.182  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[8]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.148  ; 7.148  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[9]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.387  ; 7.387  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[10] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.099  ; 7.099  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[11] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.349  ; 7.349  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[12] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.111  ; 7.111  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[13] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.379  ; 7.379  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[14] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.137  ; 7.137  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[15] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.396  ; 7.396  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[16] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.372  ; 7.372  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[17] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.398  ; 7.398  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[18] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 6.925  ; 6.925  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[19] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 6.803  ; 6.803  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[20] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.086  ; 7.086  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[21] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 6.561  ; 6.561  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
; FLASH_MEMORY_nCE_OUT          ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.108  ; 7.108  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
; FLASH_MEMORY_nOE_OUT          ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.103  ; 7.103  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
; I2S_CLOCK_OUT                 ; I2S_Driver:u3|I2S_Clock                   ; 5.887  ;        ; Rise       ; I2S_Driver:u3|I2S_Clock                   ;
; I2S_CLOCK_OUT                 ; I2S_Driver:u3|I2S_Clock                   ;        ; 5.887  ; Fall       ; I2S_Driver:u3|I2S_Clock                   ;
; I2S_DATA_INOUT                ; I2S_Driver:u3|I2S_Clock                   ; 9.982  ; 9.982  ; Fall       ; I2S_Driver:u3|I2S_Clock                   ;
; I2S_LEFT_RIGHT_CLOCK_OUT      ; I2S_Driver:u3|I2S_Clock                   ; 10.667 ; 10.667 ; Fall       ; I2S_Driver:u3|I2S_Clock                   ;
+-------------------------------+-------------------------------------------+--------+--------+------------+-------------------------------------------+


+---------------------------------------------------------------------+
; Fast Model Setup Summary                                            ;
+-------------------------------------------+---------+---------------+
; Clock                                     ; Slack   ; End Point TNS ;
+-------------------------------------------+---------+---------------+
; CLOCK_IN                                  ; -17.515 ; -725.765      ;
; I2S_Driver:u3|I2S_Clock                   ; -0.900  ; -0.986        ;
; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT     ; -0.460  ; -3.086        ;
; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -0.446  ; -6.111        ;
+-------------------------------------------+---------+---------------+


+--------------------------------------------------------------------+
; Fast Model Hold Summary                                            ;
+-------------------------------------------+--------+---------------+
; Clock                                     ; Slack  ; End Point TNS ;
+-------------------------------------------+--------+---------------+
; CLOCK_IN                                  ; -1.697 ; -5.088        ;
; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 0.215  ; 0.000         ;
; I2S_Driver:u3|I2S_Clock                   ; 0.215  ; 0.000         ;
; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT     ; 0.215  ; 0.000         ;
+-------------------------------------------+--------+---------------+


+---------------------------------------+
; Fast Model Recovery Summary           ;
+---------------+-------+---------------+
; Clock         ; Slack ; End Point TNS ;
+---------------+-------+---------------+
; I2S_ACTIVE_IN ; 0.409 ; 0.000         ;
+---------------+-------+---------------+


+----------------------------------------+
; Fast Model Removal Summary             ;
+---------------+--------+---------------+
; Clock         ; Slack  ; End Point TNS ;
+---------------+--------+---------------+
; I2S_ACTIVE_IN ; -0.029 ; -0.029        ;
+---------------+--------+---------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Minimum Pulse Width                                                                                                                                                   ;
+--------+--------------+----------------+------------------+---------------------------------------+------------+-----------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                 ; Clock Edge ; Target                                                          ;
+--------+--------------+----------------+------------------+---------------------------------------+------------+-----------------------------------------------------------------+
; -1.380 ; 1.000        ; 2.380          ; Port Rate        ; CLOCK_IN                              ; Rise       ; CLOCK_IN                                                        ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT ; Rise       ; ADPCM2_DECODER_ACTIVE                                           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT ; Rise       ; ADPCM2_DECODER_ACTIVE                                           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT ; Rise       ; ADPCM2_DECODER_DATA[0]                                          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT ; Rise       ; ADPCM2_DECODER_DATA[0]                                          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT ; Rise       ; ADPCM2_DECODER_DATA[1]                                          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT ; Rise       ; ADPCM2_DECODER_DATA[1]                                          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT ; Rise       ; ADPCM_Bit_Counter[1]                                            ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT ; Rise       ; ADPCM_Bit_Counter[1]                                            ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT ; Rise       ; ADPCM_Bit_Counter[2]                                            ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT ; Rise       ; ADPCM_Bit_Counter[2]                                            ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_State_Counter[0]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_State_Counter[0]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_State_Counter[1]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_State_Counter[1]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_State_Counter[2]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_State_Counter[2]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[2] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[2] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[3] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[3] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[4] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[4] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[5] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[5] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[6] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[6] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[7] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[7] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[8] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[8] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[9] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|ADPCM_Decoder_Step_Size_Table_Pointer[9] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Active_Module                            ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Active_Module                            ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[0]                         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[0]                         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[10]                        ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[10]                        ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[11]                        ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[11]                        ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[12]                        ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[12]                        ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[13]                        ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[13]                        ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[14]                        ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[14]                        ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[15]                        ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[15]                        ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[1]                         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[1]                         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[2]                         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[2]                         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[3]                         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[3]                         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[4]                         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[4]                         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[5]                         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[5]                         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[6]                         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[6]                         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[7]                         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[7]                         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[8]                         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[8]                         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[9]                         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|Last_PCM_Data[9]                         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[0]                          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[0]                          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[10]                         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[10]                         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[11]                         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[11]                         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[12]                         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[12]                         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[13]                         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[13]                         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[14]                         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[14]                         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[15]                         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[15]                         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[1]                          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[1]                          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[2]                          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[2]                          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[3]                          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[3]                          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[4]                          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[4]                          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[5]                          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[5]                          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[6]                          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[6]                          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[7]                          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[7]                          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[8]                          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[8]                          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[9]                          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_DATA_OUT[9]                          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; CLOCK_IN                              ; Rise       ; ADPCM_Decoder_2_Bit:u6|PCM_Data[0]                              ;
+--------+--------------+----------------+------------------+---------------------------------------+------------+-----------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                                                                      ;
+-----------------------------+-------------------------------------------+-------+-------+------------+-------------------------------------------+
; Data Port                   ; Clock Port                                ; Rise  ; Fall  ; Clock Edge ; Clock Reference                           ;
+-----------------------------+-------------------------------------------+-------+-------+------------+-------------------------------------------+
; KEY_0                       ; CLOCK_IN                                  ; 3.220 ; 3.220 ; Rise       ; CLOCK_IN                                  ;
; KEY_1                       ; CLOCK_IN                                  ; 2.635 ; 2.635 ; Rise       ; CLOCK_IN                                  ;
; FLASH_MEMORY_DATA_INOUT[*]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 2.098 ; 2.098 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[0] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 2.026 ; 2.026 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[1] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 2.039 ; 2.039 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[2] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 1.949 ; 1.949 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[3] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 1.937 ; 1.937 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[4] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 2.044 ; 2.044 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[5] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 1.956 ; 1.956 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[6] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 2.072 ; 2.072 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[7] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 2.098 ; 2.098 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
+-----------------------------+-------------------------------------------+-------+-------+------------+-------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                                                         ;
+-----------------------------+-------------------------------------------+--------+--------+------------+-------------------------------------------+
; Data Port                   ; Clock Port                                ; Rise   ; Fall   ; Clock Edge ; Clock Reference                           ;
+-----------------------------+-------------------------------------------+--------+--------+------------+-------------------------------------------+
; KEY_0                       ; CLOCK_IN                                  ; -2.072 ; -2.072 ; Rise       ; CLOCK_IN                                  ;
; KEY_1                       ; CLOCK_IN                                  ; -2.515 ; -2.515 ; Rise       ; CLOCK_IN                                  ;
; FLASH_MEMORY_DATA_INOUT[*]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -1.817 ; -1.817 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[0] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -1.906 ; -1.906 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[1] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -1.919 ; -1.919 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[2] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -1.829 ; -1.829 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[3] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -1.817 ; -1.817 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[4] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -1.924 ; -1.924 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[5] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -1.836 ; -1.836 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[6] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -1.952 ; -1.952 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[7] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -1.978 ; -1.978 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
+-----------------------------+-------------------------------------------+--------+--------+------------+-------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                                                              ;
+-------------------------------+-------------------------------------------+-------+-------+------------+-------------------------------------------+
; Data Port                     ; Clock Port                                ; Rise  ; Fall  ; Clock Edge ; Clock Reference                           ;
+-------------------------------+-------------------------------------------+-------+-------+------------+-------------------------------------------+
; I2C_CLOCK_OUT                 ; CLOCK_IN                                  ; 4.600 ; 4.600 ; Rise       ; CLOCK_IN                                  ;
; I2C_DATA_INOUT                ; CLOCK_IN                                  ; 4.753 ; 4.753 ; Rise       ; CLOCK_IN                                  ;
; I2S_CORE_CLOCK_OUT            ; CLOCK_IN                                  ; 4.670 ; 4.670 ; Rise       ; CLOCK_IN                                  ;
; FLASH_MEMORY_ADDRESS_OUT[*]   ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 4.022 ; 4.022 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[0]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 4.022 ; 4.022 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[1]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.757 ; 3.757 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[2]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.901 ; 3.901 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[3]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.893 ; 3.893 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[4]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.655 ; 3.655 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[5]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.875 ; 3.875 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[6]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.861 ; 3.861 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[7]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.785 ; 3.785 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[8]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.779 ; 3.779 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[9]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.851 ; 3.851 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[10] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.740 ; 3.740 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[11] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.823 ; 3.823 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[12] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.763 ; 3.763 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[13] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.855 ; 3.855 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[14] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.780 ; 3.780 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[15] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.871 ; 3.871 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[16] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.850 ; 3.850 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[17] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.879 ; 3.879 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[18] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.705 ; 3.705 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[19] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.623 ; 3.623 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[20] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.742 ; 3.742 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[21] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.559 ; 3.559 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
; FLASH_MEMORY_nCE_OUT          ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.761 ; 3.761 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
; FLASH_MEMORY_nOE_OUT          ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.758 ; 3.758 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
; I2S_CLOCK_OUT                 ; I2S_Driver:u3|I2S_Clock                   ; 2.688 ;       ; Rise       ; I2S_Driver:u3|I2S_Clock                   ;
; I2S_CLOCK_OUT                 ; I2S_Driver:u3|I2S_Clock                   ;       ; 2.688 ; Fall       ; I2S_Driver:u3|I2S_Clock                   ;
; I2S_DATA_INOUT                ; I2S_Driver:u3|I2S_Clock                   ; 4.947 ; 4.947 ; Fall       ; I2S_Driver:u3|I2S_Clock                   ;
; I2S_LEFT_RIGHT_CLOCK_OUT      ; I2S_Driver:u3|I2S_Clock                   ; 5.185 ; 5.185 ; Fall       ; I2S_Driver:u3|I2S_Clock                   ;
+-------------------------------+-------------------------------------------+-------+-------+------------+-------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                                                                      ;
+-------------------------------+-------------------------------------------+-------+-------+------------+-------------------------------------------+
; Data Port                     ; Clock Port                                ; Rise  ; Fall  ; Clock Edge ; Clock Reference                           ;
+-------------------------------+-------------------------------------------+-------+-------+------------+-------------------------------------------+
; I2C_CLOCK_OUT                 ; CLOCK_IN                                  ; 4.600 ; 4.600 ; Rise       ; CLOCK_IN                                  ;
; I2C_DATA_INOUT                ; CLOCK_IN                                  ; 4.753 ; 4.753 ; Rise       ; CLOCK_IN                                  ;
; I2S_CORE_CLOCK_OUT            ; CLOCK_IN                                  ; 4.670 ; 4.670 ; Rise       ; CLOCK_IN                                  ;
; FLASH_MEMORY_ADDRESS_OUT[*]   ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.559 ; 3.559 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[0]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 4.022 ; 4.022 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[1]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.757 ; 3.757 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[2]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.901 ; 3.901 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[3]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.893 ; 3.893 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[4]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.655 ; 3.655 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[5]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.875 ; 3.875 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[6]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.861 ; 3.861 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[7]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.785 ; 3.785 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[8]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.779 ; 3.779 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[9]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.851 ; 3.851 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[10] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.740 ; 3.740 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[11] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.823 ; 3.823 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[12] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.763 ; 3.763 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[13] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.855 ; 3.855 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[14] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.780 ; 3.780 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[15] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.871 ; 3.871 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[16] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.850 ; 3.850 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[17] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.879 ; 3.879 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[18] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.705 ; 3.705 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[19] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.623 ; 3.623 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[20] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.742 ; 3.742 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[21] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.559 ; 3.559 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
; FLASH_MEMORY_nCE_OUT          ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.761 ; 3.761 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
; FLASH_MEMORY_nOE_OUT          ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.758 ; 3.758 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
; I2S_CLOCK_OUT                 ; I2S_Driver:u3|I2S_Clock                   ; 2.688 ;       ; Rise       ; I2S_Driver:u3|I2S_Clock                   ;
; I2S_CLOCK_OUT                 ; I2S_Driver:u3|I2S_Clock                   ;       ; 2.688 ; Fall       ; I2S_Driver:u3|I2S_Clock                   ;
; I2S_DATA_INOUT                ; I2S_Driver:u3|I2S_Clock                   ; 4.947 ; 4.947 ; Fall       ; I2S_Driver:u3|I2S_Clock                   ;
; I2S_LEFT_RIGHT_CLOCK_OUT      ; I2S_Driver:u3|I2S_Clock                   ; 5.185 ; 5.185 ; Fall       ; I2S_Driver:u3|I2S_Clock                   ;
+-------------------------------+-------------------------------------------+-------+-------+------------+-------------------------------------------+


+------------------------------------------------------------------------------------------------------------+
; Multicorner Timing Analysis Summary                                                                        ;
+--------------------------------------------+-----------+--------+----------+---------+---------------------+
; Clock                                      ; Setup     ; Hold   ; Recovery ; Removal ; Minimum Pulse Width ;
+--------------------------------------------+-----------+--------+----------+---------+---------------------+
; Worst-case Slack                           ; -51.180   ; -2.666 ; 0.0      ; -0.041  ; -1.631              ;
;  CLOCK_IN                                  ; -51.180   ; -2.666 ; N/A      ; N/A     ; -1.631              ;
;  Flash_Memory_Driver:u4|Flash_Memory_Clock ; -1.891    ; 0.215  ; N/A      ; N/A     ; N/A                 ;
;  I2S_ACTIVE_IN                             ; N/A       ; N/A    ; 0.293    ; -0.041  ; N/A                 ;
;  I2S_Driver:u3|I2S_Clock                   ; -3.147    ; 0.215  ; N/A      ; N/A     ; N/A                 ;
;  I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT     ; -2.478    ; 0.215  ; N/A      ; N/A     ; -0.611              ;
; Design-wide TNS                            ; -2401.614 ; -7.994 ; 0.0      ; -0.041  ; N/A                 ;
;  CLOCK_IN                                  ; -2303.828 ; -7.994 ; N/A      ; N/A     ; N/A                 ;
;  Flash_Memory_Driver:u4|Flash_Memory_Clock ; -47.530   ; 0.000  ; N/A      ; N/A     ; N/A                 ;
;  I2S_ACTIVE_IN                             ; N/A       ; N/A    ; 0.000    ; -0.041  ; N/A                 ;
;  I2S_Driver:u3|I2S_Clock                   ; -12.329   ; 0.000  ; N/A      ; N/A     ; N/A                 ;
;  I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT     ; -37.927   ; 0.000  ; N/A      ; N/A     ; N/A                 ;
+--------------------------------------------+-----------+--------+----------+---------+---------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                                                                      ;
+-----------------------------+-------------------------------------------+-------+-------+------------+-------------------------------------------+
; Data Port                   ; Clock Port                                ; Rise  ; Fall  ; Clock Edge ; Clock Reference                           ;
+-----------------------------+-------------------------------------------+-------+-------+------------+-------------------------------------------+
; KEY_0                       ; CLOCK_IN                                  ; 7.587 ; 7.587 ; Rise       ; CLOCK_IN                                  ;
; KEY_1                       ; CLOCK_IN                                  ; 5.754 ; 5.754 ; Rise       ; CLOCK_IN                                  ;
; FLASH_MEMORY_DATA_INOUT[*]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 4.447 ; 4.447 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[0] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 4.258 ; 4.258 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[1] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 4.277 ; 4.277 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[2] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 4.133 ; 4.133 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[3] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 4.111 ; 4.111 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[4] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 4.287 ; 4.287 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[5] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 4.142 ; 4.142 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[6] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 4.440 ; 4.440 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[7] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 4.447 ; 4.447 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
+-----------------------------+-------------------------------------------+-------+-------+------------+-------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                                                         ;
+-----------------------------+-------------------------------------------+--------+--------+------------+-------------------------------------------+
; Data Port                   ; Clock Port                                ; Rise   ; Fall   ; Clock Edge ; Clock Reference                           ;
+-----------------------------+-------------------------------------------+--------+--------+------------+-------------------------------------------+
; KEY_0                       ; CLOCK_IN                                  ; -2.072 ; -2.072 ; Rise       ; CLOCK_IN                                  ;
; KEY_1                       ; CLOCK_IN                                  ; -2.515 ; -2.515 ; Rise       ; CLOCK_IN                                  ;
; FLASH_MEMORY_DATA_INOUT[*]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -1.817 ; -1.817 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[0] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -1.906 ; -1.906 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[1] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -1.919 ; -1.919 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[2] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -1.829 ; -1.829 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[3] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -1.817 ; -1.817 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[4] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -1.924 ; -1.924 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[5] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -1.836 ; -1.836 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[6] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -1.952 ; -1.952 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_DATA_INOUT[7] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; -1.978 ; -1.978 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
+-----------------------------+-------------------------------------------+--------+--------+------------+-------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                                                                ;
+-------------------------------+-------------------------------------------+--------+--------+------------+-------------------------------------------+
; Data Port                     ; Clock Port                                ; Rise   ; Fall   ; Clock Edge ; Clock Reference                           ;
+-------------------------------+-------------------------------------------+--------+--------+------------+-------------------------------------------+
; I2C_CLOCK_OUT                 ; CLOCK_IN                                  ; 8.993  ; 8.993  ; Rise       ; CLOCK_IN                                  ;
; I2C_DATA_INOUT                ; CLOCK_IN                                  ; 9.349  ; 9.349  ; Rise       ; CLOCK_IN                                  ;
; I2S_CORE_CLOCK_OUT            ; CLOCK_IN                                  ; 9.120  ; 9.120  ; Rise       ; CLOCK_IN                                  ;
; FLASH_MEMORY_ADDRESS_OUT[*]   ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.760  ; 7.760  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[0]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.760  ; 7.760  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[1]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.111  ; 7.111  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[2]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.465  ; 7.465  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[3]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.448  ; 7.448  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[4]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 6.840  ; 6.840  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[5]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.418  ; 7.418  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[6]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.400  ; 7.400  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[7]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.182  ; 7.182  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[8]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.148  ; 7.148  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[9]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.387  ; 7.387  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[10] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.099  ; 7.099  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[11] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.349  ; 7.349  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[12] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.111  ; 7.111  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[13] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.379  ; 7.379  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[14] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.137  ; 7.137  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[15] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.396  ; 7.396  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[16] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.372  ; 7.372  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[17] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.398  ; 7.398  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[18] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 6.925  ; 6.925  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[19] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 6.803  ; 6.803  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[20] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.086  ; 7.086  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[21] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 6.561  ; 6.561  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
; FLASH_MEMORY_nCE_OUT          ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.108  ; 7.108  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
; FLASH_MEMORY_nOE_OUT          ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 7.103  ; 7.103  ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
; I2S_CLOCK_OUT                 ; I2S_Driver:u3|I2S_Clock                   ; 5.887  ;        ; Rise       ; I2S_Driver:u3|I2S_Clock                   ;
; I2S_CLOCK_OUT                 ; I2S_Driver:u3|I2S_Clock                   ;        ; 5.887  ; Fall       ; I2S_Driver:u3|I2S_Clock                   ;
; I2S_DATA_INOUT                ; I2S_Driver:u3|I2S_Clock                   ; 9.982  ; 9.982  ; Fall       ; I2S_Driver:u3|I2S_Clock                   ;
; I2S_LEFT_RIGHT_CLOCK_OUT      ; I2S_Driver:u3|I2S_Clock                   ; 10.667 ; 10.667 ; Fall       ; I2S_Driver:u3|I2S_Clock                   ;
+-------------------------------+-------------------------------------------+--------+--------+------------+-------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                                                                      ;
+-------------------------------+-------------------------------------------+-------+-------+------------+-------------------------------------------+
; Data Port                     ; Clock Port                                ; Rise  ; Fall  ; Clock Edge ; Clock Reference                           ;
+-------------------------------+-------------------------------------------+-------+-------+------------+-------------------------------------------+
; I2C_CLOCK_OUT                 ; CLOCK_IN                                  ; 4.600 ; 4.600 ; Rise       ; CLOCK_IN                                  ;
; I2C_DATA_INOUT                ; CLOCK_IN                                  ; 4.753 ; 4.753 ; Rise       ; CLOCK_IN                                  ;
; I2S_CORE_CLOCK_OUT            ; CLOCK_IN                                  ; 4.670 ; 4.670 ; Rise       ; CLOCK_IN                                  ;
; FLASH_MEMORY_ADDRESS_OUT[*]   ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.559 ; 3.559 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[0]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 4.022 ; 4.022 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[1]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.757 ; 3.757 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[2]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.901 ; 3.901 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[3]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.893 ; 3.893 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[4]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.655 ; 3.655 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[5]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.875 ; 3.875 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[6]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.861 ; 3.861 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[7]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.785 ; 3.785 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[8]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.779 ; 3.779 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[9]  ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.851 ; 3.851 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[10] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.740 ; 3.740 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[11] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.823 ; 3.823 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[12] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.763 ; 3.763 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[13] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.855 ; 3.855 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[14] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.780 ; 3.780 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[15] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.871 ; 3.871 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[16] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.850 ; 3.850 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[17] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.879 ; 3.879 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[18] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.705 ; 3.705 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[19] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.623 ; 3.623 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[20] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.742 ; 3.742 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
;  FLASH_MEMORY_ADDRESS_OUT[21] ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.559 ; 3.559 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
; FLASH_MEMORY_nCE_OUT          ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.761 ; 3.761 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
; FLASH_MEMORY_nOE_OUT          ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 3.758 ; 3.758 ; Fall       ; Flash_Memory_Driver:u4|Flash_Memory_Clock ;
; I2S_CLOCK_OUT                 ; I2S_Driver:u3|I2S_Clock                   ; 2.688 ;       ; Rise       ; I2S_Driver:u3|I2S_Clock                   ;
; I2S_CLOCK_OUT                 ; I2S_Driver:u3|I2S_Clock                   ;       ; 2.688 ; Fall       ; I2S_Driver:u3|I2S_Clock                   ;
; I2S_DATA_INOUT                ; I2S_Driver:u3|I2S_Clock                   ; 4.947 ; 4.947 ; Fall       ; I2S_Driver:u3|I2S_Clock                   ;
; I2S_LEFT_RIGHT_CLOCK_OUT      ; I2S_Driver:u3|I2S_Clock                   ; 5.185 ; 5.185 ; Fall       ; I2S_Driver:u3|I2S_Clock                   ;
+-------------------------------+-------------------------------------------+-------+-------+------------+-------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------+
; Setup Transfers                                                                                                                       ;
+-------------------------------------------+-------------------------------------------+--------------+----------+----------+----------+
; From Clock                                ; To Clock                                  ; RR Paths     ; FR Paths ; RF Paths ; FF Paths ;
+-------------------------------------------+-------------------------------------------+--------------+----------+----------+----------+
; CLOCK_IN                                  ; CLOCK_IN                                  ; > 2147483647 ; 0        ; 0        ; 0        ;
; Flash_Memory_Driver:u4|Flash_Memory_Clock ; CLOCK_IN                                  ; 1            ; 1        ; 0        ; 0        ;
; I2S_ACTIVE_IN                             ; CLOCK_IN                                  ; 2            ; 1        ; 0        ; 0        ;
; I2S_Driver:u3|I2S_Clock                   ; CLOCK_IN                                  ; 1            ; 1        ; 0        ; 0        ;
; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT     ; CLOCK_IN                                  ; 256          ; 0        ; 0        ; 0        ;
; Flash_Memory_Driver:u4|Flash_Memory_Clock ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 0            ; 0        ; 0        ; 97       ;
; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT     ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 0            ; 0        ; 22       ; 0        ;
; CLOCK_IN                                  ; I2S_Driver:u3|I2S_Clock                   ; 0            ; 0        ; 32       ; 0        ;
; I2S_Driver:u3|I2S_Clock                   ; I2S_Driver:u3|I2S_Clock                   ; 0            ; 0        ; 0        ; 92       ;
; Flash_Memory_Driver:u4|Flash_Memory_Clock ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT     ; 0            ; 8        ; 0        ; 0        ;
; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT     ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT     ; 307          ; 0        ; 0        ; 0        ;
+-------------------------------------------+-------------------------------------------+--------------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


+---------------------------------------------------------------------------------------------------------------------------------------+
; Hold Transfers                                                                                                                        ;
+-------------------------------------------+-------------------------------------------+--------------+----------+----------+----------+
; From Clock                                ; To Clock                                  ; RR Paths     ; FR Paths ; RF Paths ; FF Paths ;
+-------------------------------------------+-------------------------------------------+--------------+----------+----------+----------+
; CLOCK_IN                                  ; CLOCK_IN                                  ; > 2147483647 ; 0        ; 0        ; 0        ;
; Flash_Memory_Driver:u4|Flash_Memory_Clock ; CLOCK_IN                                  ; 1            ; 1        ; 0        ; 0        ;
; I2S_ACTIVE_IN                             ; CLOCK_IN                                  ; 2            ; 1        ; 0        ; 0        ;
; I2S_Driver:u3|I2S_Clock                   ; CLOCK_IN                                  ; 1            ; 1        ; 0        ; 0        ;
; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT     ; CLOCK_IN                                  ; 256          ; 0        ; 0        ; 0        ;
; Flash_Memory_Driver:u4|Flash_Memory_Clock ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 0            ; 0        ; 0        ; 97       ;
; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT     ; Flash_Memory_Driver:u4|Flash_Memory_Clock ; 0            ; 0        ; 22       ; 0        ;
; CLOCK_IN                                  ; I2S_Driver:u3|I2S_Clock                   ; 0            ; 0        ; 32       ; 0        ;
; I2S_Driver:u3|I2S_Clock                   ; I2S_Driver:u3|I2S_Clock                   ; 0            ; 0        ; 0        ; 92       ;
; Flash_Memory_Driver:u4|Flash_Memory_Clock ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT     ; 0            ; 8        ; 0        ; 0        ;
; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT     ; I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT     ; 307          ; 0        ; 0        ; 0        ;
+-------------------------------------------+-------------------------------------------+--------------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


+---------------------------------------------------------------------------+
; Recovery Transfers                                                        ;
+---------------+---------------+----------+----------+----------+----------+
; From Clock    ; To Clock      ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+---------------+---------------+----------+----------+----------+----------+
; I2S_ACTIVE_IN ; I2S_ACTIVE_IN ; 1        ; 1        ; 0        ; 0        ;
+---------------+---------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


+---------------------------------------------------------------------------+
; Removal Transfers                                                         ;
+---------------+---------------+----------+----------+----------+----------+
; From Clock    ; To Clock      ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+---------------+---------------+----------+----------+----------+----------+
; I2S_ACTIVE_IN ; I2S_ACTIVE_IN ; 1        ; 1        ; 0        ; 0        ;
+---------------+---------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


---------------
; Report TCCS ;
---------------
No dedicated SERDES Transmitter circuitry present in device or used in design.


---------------
; Report RSKM ;
---------------
No dedicated SERDES Receiver circuitry present in device or used in design.


+------------------------------------------------+
; Unconstrained Paths                            ;
+---------------------------------+-------+------+
; Property                        ; Setup ; Hold ;
+---------------------------------+-------+------+
; Illegal Clocks                  ; 0     ; 0    ;
; Unconstrained Clocks            ; 0     ; 0    ;
; Unconstrained Input Ports       ; 10    ; 10   ;
; Unconstrained Input Port Paths  ; 22    ; 22   ;
; Unconstrained Output Ports      ; 30    ; 30   ;
; Unconstrained Output Port Paths ; 30    ; 30   ;
+---------------------------------+-------+------+


+------------------------------------+
; TimeQuest Timing Analyzer Messages ;
+------------------------------------+
Info: *******************************************************************
Info: Running Quartus II TimeQuest Timing Analyzer
    Info: Version 9.0 Build 132 02/25/2009 SJ Web Edition
    Info: Processing started: Sun Feb 14 23:32:44 2010
Info: Command: quartus_sta HD_ADPCM_Codec -c HD_ADPCM_Codec
Info: qsta_default_script.tcl version: #3
Info: Low junction temperature is 0 degrees C
Info: High junction temperature is 85 degrees C
Critical Warning: Synopsys Design Constraints File file not found: 'HD_ADPCM_Codec.sdc'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design.
Info: No user constrained base clocks found in the design. Calling "derive_clocks -period 1.0"
Info: Deriving Clocks
    Info: create_clock -period 1.000 -name CLOCK_IN CLOCK_IN
    Info: create_clock -period 1.000 -name I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT
    Info: create_clock -period 1.000 -name I2S_Driver:u3|I2S_Clock I2S_Driver:u3|I2S_Clock
    Info: create_clock -period 1.000 -name I2S_ACTIVE_IN I2S_ACTIVE_IN
    Info: create_clock -period 1.000 -name Flash_Memory_Driver:u4|Flash_Memory_Clock Flash_Memory_Driver:u4|Flash_Memory_Clock
Info: Analyzing Slow Model
Critical Warning: Timing requirements not met
Info: Worst-case setup slack is -51.180
    Info:     Slack End Point TNS Clock 
    Info: ========= ============= =====================
    Info:   -51.180     -2303.828 CLOCK_IN 
    Info:    -3.147       -12.329 I2S_Driver:u3|I2S_Clock 
    Info:    -2.478       -37.927 I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT 
    Info:    -1.891       -47.530 Flash_Memory_Driver:u4|Flash_Memory_Clock 
Info: Worst-case hold slack is -2.666
    Info:     Slack End Point TNS Clock 
    Info: ========= ============= =====================
    Info:    -2.666        -7.994 CLOCK_IN 
    Info:     0.445         0.000 Flash_Memory_Driver:u4|Flash_Memory_Clock 
    Info:     0.445         0.000 I2S_Driver:u3|I2S_Clock 
    Info:     0.445         0.000 I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT 
Info: Worst-case recovery slack is 0.293
    Info:     Slack End Point TNS Clock 
    Info: ========= ============= =====================
    Info:     0.293         0.000 I2S_ACTIVE_IN 
Info: Worst-case removal slack is -0.041
    Info:     Slack End Point TNS Clock 
    Info: ========= ============= =====================
    Info:    -0.041        -0.041 I2S_ACTIVE_IN 
Critical Warning: Found minimum pulse width or period violations. See Report Minimum Pulse Width for details.
Info: The selected device family is not supported by the report_metastability command.
Info: Analyzing Fast Model
Info: Started post-fitting delay annotation
Warning: Found 78 output pins without output pin load capacitance assignment
    Info: Pin "I2C_DATA_INOUT" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "I2S_DATA_INOUT" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "FLASH_MEMORY_DATA_INOUT[0]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "FLASH_MEMORY_DATA_INOUT[1]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "FLASH_MEMORY_DATA_INOUT[2]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "FLASH_MEMORY_DATA_INOUT[3]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "FLASH_MEMORY_DATA_INOUT[4]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "FLASH_MEMORY_DATA_INOUT[5]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "FLASH_MEMORY_DATA_INOUT[6]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "FLASH_MEMORY_DATA_INOUT[7]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "S_SEVEN_SEGMENT_1_OUT[0]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "S_SEVEN_SEGMENT_1_OUT[1]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "S_SEVEN_SEGMENT_1_OUT[2]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "S_SEVEN_SEGMENT_1_OUT[3]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "S_SEVEN_SEGMENT_1_OUT[4]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "S_SEVEN_SEGMENT_1_OUT[5]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "S_SEVEN_SEGMENT_1_OUT[6]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "S_SEVEN_SEGMENT_2_OUT[0]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "S_SEVEN_SEGMENT_2_OUT[1]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "S_SEVEN_SEGMENT_2_OUT[2]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "S_SEVEN_SEGMENT_2_OUT[3]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "S_SEVEN_SEGMENT_2_OUT[4]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "S_SEVEN_SEGMENT_2_OUT[5]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "S_SEVEN_SEGMENT_2_OUT[6]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "S_SEVEN_SEGMENT_3_OUT[0]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "S_SEVEN_SEGMENT_3_OUT[1]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "S_SEVEN_SEGMENT_3_OUT[2]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "S_SEVEN_SEGMENT_3_OUT[3]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "S_SEVEN_SEGMENT_3_OUT[4]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "S_SEVEN_SEGMENT_3_OUT[5]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "S_SEVEN_SEGMENT_3_OUT[6]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "S_SEVEN_SEGMENT_4_OUT[0]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "S_SEVEN_SEGMENT_4_OUT[1]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "S_SEVEN_SEGMENT_4_OUT[2]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "S_SEVEN_SEGMENT_4_OUT[3]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "S_SEVEN_SEGMENT_4_OUT[4]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "S_SEVEN_SEGMENT_4_OUT[5]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "S_SEVEN_SEGMENT_4_OUT[6]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "S_RED_LEDS_OUT[0]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "S_RED_LEDS_OUT[1]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "S_RED_LEDS_OUT[2]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "S_RED_LEDS_OUT[3]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "S_RED_LEDS_OUT[4]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "S_RED_LEDS_OUT[5]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "S_RED_LEDS_OUT[6]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "S_RED_LEDS_OUT[7]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "S_RED_LEDS_OUT[8]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "S_RED_LEDS_OUT[9]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "I2C_CLOCK_OUT" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "I2S_LEFT_RIGHT_CLOCK_OUT" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "I2S_CLOCK_OUT" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "I2S_CORE_CLOCK_OUT" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "FLASH_MEMORY_ADDRESS_OUT[0]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "FLASH_MEMORY_ADDRESS_OUT[1]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "FLASH_MEMORY_ADDRESS_OUT[2]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "FLASH_MEMORY_ADDRESS_OUT[3]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "FLASH_MEMORY_ADDRESS_OUT[4]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "FLASH_MEMORY_ADDRESS_OUT[5]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "FLASH_MEMORY_ADDRESS_OUT[6]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "FLASH_MEMORY_ADDRESS_OUT[7]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "FLASH_MEMORY_ADDRESS_OUT[8]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "FLASH_MEMORY_ADDRESS_OUT[9]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "FLASH_MEMORY_ADDRESS_OUT[10]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "FLASH_MEMORY_ADDRESS_OUT[11]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "FLASH_MEMORY_ADDRESS_OUT[12]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "FLASH_MEMORY_ADDRESS_OUT[13]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "FLASH_MEMORY_ADDRESS_OUT[14]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "FLASH_MEMORY_ADDRESS_OUT[15]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "FLASH_MEMORY_ADDRESS_OUT[16]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "FLASH_MEMORY_ADDRESS_OUT[17]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "FLASH_MEMORY_ADDRESS_OUT[18]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "FLASH_MEMORY_ADDRESS_OUT[19]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "FLASH_MEMORY_ADDRESS_OUT[20]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "FLASH_MEMORY_ADDRESS_OUT[21]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "FLASH_MEMORY_nWE_OUT" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "FLASH_MEMORY_nOE_OUT" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "FLASH_MEMORY_nRESET_OUT" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "FLASH_MEMORY_nCE_OUT" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
Info: Delay annotation completed successfully
Critical Warning: Timing requirements not met
Info: Worst-case setup slack is -17.515
    Info:     Slack End Point TNS Clock 
    Info: ========= ============= =====================
    Info:   -17.515      -725.765 CLOCK_IN 
    Info:    -0.900        -0.986 I2S_Driver:u3|I2S_Clock 
    Info:    -0.460        -3.086 I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT 
    Info:    -0.446        -6.111 Flash_Memory_Driver:u4|Flash_Memory_Clock 
Info: Worst-case hold slack is -1.697
    Info:     Slack End Point TNS Clock 
    Info: ========= ============= =====================
    Info:    -1.697        -5.088 CLOCK_IN 
    Info:     0.215         0.000 Flash_Memory_Driver:u4|Flash_Memory_Clock 
    Info:     0.215         0.000 I2S_Driver:u3|I2S_Clock 
    Info:     0.215         0.000 I2S_Driver:u3|I2S_PCM_DATA_ACCESS_OUT 
Info: Worst-case recovery slack is 0.409
    Info:     Slack End Point TNS Clock 
    Info: ========= ============= =====================
    Info:     0.409         0.000 I2S_ACTIVE_IN 
Info: Worst-case removal slack is -0.029
    Info:     Slack End Point TNS Clock 
    Info: ========= ============= =====================
    Info:    -0.029        -0.029 I2S_ACTIVE_IN 
Critical Warning: Found minimum pulse width or period violations. See Report Minimum Pulse Width for details.
Info: The selected device family is not supported by the report_metastability command.
Info: Design is not fully constrained for setup requirements
Info: Design is not fully constrained for hold requirements
Info: Quartus II TimeQuest Timing Analyzer was successful. 0 errors, 6 warnings
    Info: Peak virtual memory: 163 megabytes
    Info: Processing ended: Sun Feb 14 23:32:54 2010
    Info: Elapsed time: 00:00:10
    Info: Total CPU time (on all processors): 00:00:10