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[/] [audio/] [trunk/] [HD_ADPCM/] [HD_ADPCM_1Bit_Stereo_Decoder/] [db/] [HD_ADPCM_Codec.hier_info] - Rev 6

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|HD_ADPCM_Codec
CLOCK_IN => ADPCM_Decoder_1_Bit:u6.CLOCK_IN
CLOCK_IN => ADPCM_Decoder_1_Bit:u5.CLOCK_IN
CLOCK_IN => Flash_Memory_Driver:u4.CLOCK_IN
CLOCK_IN => I2S_Driver:u3.CLOCK_IN
CLOCK_IN => I2C_Stream_Counter[2].CLK
CLOCK_IN => I2C_Stream_Counter[1].CLK
CLOCK_IN => I2C_Stream_Counter[0].CLK
CLOCK_IN => Counter[24].CLK
CLOCK_IN => Counter[23].CLK
CLOCK_IN => Counter[22].CLK
CLOCK_IN => Counter[21].CLK
CLOCK_IN => Counter[20].CLK
CLOCK_IN => Counter[19].CLK
CLOCK_IN => Counter[18].CLK
CLOCK_IN => Counter[17].CLK
CLOCK_IN => Counter[16].CLK
CLOCK_IN => Counter[15].CLK
CLOCK_IN => Counter[14].CLK
CLOCK_IN => Counter[13].CLK
CLOCK_IN => Counter[12].CLK
CLOCK_IN => Counter[11].CLK
CLOCK_IN => Counter[10].CLK
CLOCK_IN => Counter[9].CLK
CLOCK_IN => Counter[8].CLK
CLOCK_IN => Counter[7].CLK
CLOCK_IN => Counter[6].CLK
CLOCK_IN => Counter[5].CLK
CLOCK_IN => Counter[4].CLK
CLOCK_IN => Counter[3].CLK
CLOCK_IN => Counter[2].CLK
CLOCK_IN => Counter[1].CLK
CLOCK_IN => Counter[0].CLK
CLOCK_IN => AUDIO_CODEC_VOLUME[6].CLK
CLOCK_IN => AUDIO_CODEC_VOLUME[5].CLK
CLOCK_IN => AUDIO_CODEC_VOLUME[4].CLK
CLOCK_IN => AUDIO_CODEC_VOLUME[3].CLK
CLOCK_IN => AUDIO_CODEC_VOLUME[2].CLK
CLOCK_IN => AUDIO_CODEC_VOLUME[1].CLK
CLOCK_IN => AUDIO_CODEC_VOLUME[0].CLK
CLOCK_IN => I2C_REGISTER_ADDRESS[7].CLK
CLOCK_IN => I2C_REGISTER_ADDRESS[6].CLK
CLOCK_IN => I2C_REGISTER_ADDRESS[5].CLK
CLOCK_IN => I2C_REGISTER_ADDRESS[4].CLK
CLOCK_IN => I2C_REGISTER_ADDRESS[3].CLK
CLOCK_IN => I2C_REGISTER_ADDRESS[2].CLK
CLOCK_IN => I2C_REGISTER_ADDRESS[1].CLK
CLOCK_IN => I2C_REGISTER_ADDRESS[0].CLK
CLOCK_IN => I2C_REGISTER_DATA[7].CLK
CLOCK_IN => I2C_REGISTER_DATA[6].CLK
CLOCK_IN => I2C_REGISTER_DATA[5].CLK
CLOCK_IN => I2C_REGISTER_DATA[4].CLK
CLOCK_IN => I2C_REGISTER_DATA[3].CLK
CLOCK_IN => I2C_REGISTER_DATA[2].CLK
CLOCK_IN => I2C_REGISTER_DATA[1].CLK
CLOCK_IN => I2C_REGISTER_DATA[0].CLK
CLOCK_IN => I2C_ACTIVE_IN.CLK
CLOCK_IN => I2S_ACTIVE_IN.CLK
CLOCK_IN => I2S_CORE_CLOCK.CLK
CLOCK_IN => I2C_Driver:u2.CLOCK_IN
S_SEVEN_SEGMENT_1_OUT[0] <= SevenSegments_Driver:u0.SEVEN_SEGMENT_1_OUT[0]
S_SEVEN_SEGMENT_1_OUT[1] <= SevenSegments_Driver:u0.SEVEN_SEGMENT_1_OUT[1]
S_SEVEN_SEGMENT_1_OUT[2] <= SevenSegments_Driver:u0.SEVEN_SEGMENT_1_OUT[2]
S_SEVEN_SEGMENT_1_OUT[3] <= SevenSegments_Driver:u0.SEVEN_SEGMENT_1_OUT[3]
S_SEVEN_SEGMENT_1_OUT[4] <= SevenSegments_Driver:u0.SEVEN_SEGMENT_1_OUT[4]
S_SEVEN_SEGMENT_1_OUT[5] <= SevenSegments_Driver:u0.SEVEN_SEGMENT_1_OUT[5]
S_SEVEN_SEGMENT_1_OUT[6] <= SevenSegments_Driver:u0.SEVEN_SEGMENT_1_OUT[6]
S_SEVEN_SEGMENT_2_OUT[0] <= SevenSegments_Driver:u0.SEVEN_SEGMENT_2_OUT[0]
S_SEVEN_SEGMENT_2_OUT[1] <= SevenSegments_Driver:u0.SEVEN_SEGMENT_2_OUT[1]
S_SEVEN_SEGMENT_2_OUT[2] <= SevenSegments_Driver:u0.SEVEN_SEGMENT_2_OUT[2]
S_SEVEN_SEGMENT_2_OUT[3] <= SevenSegments_Driver:u0.SEVEN_SEGMENT_2_OUT[3]
S_SEVEN_SEGMENT_2_OUT[4] <= SevenSegments_Driver:u0.SEVEN_SEGMENT_2_OUT[4]
S_SEVEN_SEGMENT_2_OUT[5] <= SevenSegments_Driver:u0.SEVEN_SEGMENT_2_OUT[5]
S_SEVEN_SEGMENT_2_OUT[6] <= SevenSegments_Driver:u0.SEVEN_SEGMENT_2_OUT[6]
S_SEVEN_SEGMENT_3_OUT[0] <= SevenSegments_Driver:u0.SEVEN_SEGMENT_3_OUT[0]
S_SEVEN_SEGMENT_3_OUT[1] <= SevenSegments_Driver:u0.SEVEN_SEGMENT_3_OUT[1]
S_SEVEN_SEGMENT_3_OUT[2] <= SevenSegments_Driver:u0.SEVEN_SEGMENT_3_OUT[2]
S_SEVEN_SEGMENT_3_OUT[3] <= SevenSegments_Driver:u0.SEVEN_SEGMENT_3_OUT[3]
S_SEVEN_SEGMENT_3_OUT[4] <= SevenSegments_Driver:u0.SEVEN_SEGMENT_3_OUT[4]
S_SEVEN_SEGMENT_3_OUT[5] <= SevenSegments_Driver:u0.SEVEN_SEGMENT_3_OUT[5]
S_SEVEN_SEGMENT_3_OUT[6] <= SevenSegments_Driver:u0.SEVEN_SEGMENT_3_OUT[6]
S_SEVEN_SEGMENT_4_OUT[0] <= SevenSegments_Driver:u0.SEVEN_SEGMENT_4_OUT[0]
S_SEVEN_SEGMENT_4_OUT[1] <= SevenSegments_Driver:u0.SEVEN_SEGMENT_4_OUT[1]
S_SEVEN_SEGMENT_4_OUT[2] <= SevenSegments_Driver:u0.SEVEN_SEGMENT_4_OUT[2]
S_SEVEN_SEGMENT_4_OUT[3] <= SevenSegments_Driver:u0.SEVEN_SEGMENT_4_OUT[3]
S_SEVEN_SEGMENT_4_OUT[4] <= SevenSegments_Driver:u0.SEVEN_SEGMENT_4_OUT[4]
S_SEVEN_SEGMENT_4_OUT[5] <= SevenSegments_Driver:u0.SEVEN_SEGMENT_4_OUT[5]
S_SEVEN_SEGMENT_4_OUT[6] <= SevenSegments_Driver:u0.SEVEN_SEGMENT_4_OUT[6]
S_RED_LEDS_OUT[0] <= LEDs_Bar_Driver:u1.LEDS_OUT[0]
S_RED_LEDS_OUT[1] <= LEDs_Bar_Driver:u1.LEDS_OUT[1]
S_RED_LEDS_OUT[2] <= LEDs_Bar_Driver:u1.LEDS_OUT[2]
S_RED_LEDS_OUT[3] <= LEDs_Bar_Driver:u1.LEDS_OUT[3]
S_RED_LEDS_OUT[4] <= LEDs_Bar_Driver:u1.LEDS_OUT[4]
S_RED_LEDS_OUT[5] <= LEDs_Bar_Driver:u1.LEDS_OUT[5]
S_RED_LEDS_OUT[6] <= LEDs_Bar_Driver:u1.LEDS_OUT[6]
S_RED_LEDS_OUT[7] <= LEDs_Bar_Driver:u1.LEDS_OUT[7]
S_RED_LEDS_OUT[8] <= LEDs_Bar_Driver:u1.LEDS_OUT[8]
S_RED_LEDS_OUT[9] <= LEDs_Bar_Driver:u1.LEDS_OUT[9]
I2C_CLOCK_OUT <= I2C_Driver:u2.I2C_CLOCK
I2C_DATA_INOUT <= I2C_Driver:u2.I2C_DATA
I2S_LEFT_RIGHT_CLOCK_OUT <= I2S_Driver:u3.I2S_LEFT_RIGHT_CLOCK_OUT
I2S_CLOCK_OUT <= I2S_Driver:u3.I2S_CLOCK_OUT
I2S_DATA_INOUT <= I2S_Driver:u3.I2S_DATA_INOUT
I2S_CORE_CLOCK_OUT <= I2S_CORE_CLOCK.DB_MAX_OUTPUT_PORT_TYPE
SWITCH_0 => ~NO_FANOUT~
KEY_0 => AUDIO_CODEC_VOLUME~27.OUTPUTSELECT
KEY_0 => AUDIO_CODEC_VOLUME~26.OUTPUTSELECT
KEY_0 => AUDIO_CODEC_VOLUME~25.OUTPUTSELECT
KEY_0 => AUDIO_CODEC_VOLUME~24.OUTPUTSELECT
KEY_0 => AUDIO_CODEC_VOLUME~23.OUTPUTSELECT
KEY_0 => AUDIO_CODEC_VOLUME~22.OUTPUTSELECT
KEY_0 => AUDIO_CODEC_VOLUME~21.OUTPUTSELECT
KEY_1 => AUDIO_CODEC_VOLUME~20.OUTPUTSELECT
KEY_1 => AUDIO_CODEC_VOLUME~19.OUTPUTSELECT
KEY_1 => AUDIO_CODEC_VOLUME~18.OUTPUTSELECT
KEY_1 => AUDIO_CODEC_VOLUME~17.OUTPUTSELECT
KEY_1 => AUDIO_CODEC_VOLUME~16.OUTPUTSELECT
KEY_1 => AUDIO_CODEC_VOLUME~15.OUTPUTSELECT
KEY_1 => AUDIO_CODEC_VOLUME~14.OUTPUTSELECT
FLASH_MEMORY_ADDRESS_OUT[0] <= Flash_Memory_Driver:u4.FLASH_MEMORY_ADDRESS[0]
FLASH_MEMORY_ADDRESS_OUT[1] <= Flash_Memory_Driver:u4.FLASH_MEMORY_ADDRESS[1]
FLASH_MEMORY_ADDRESS_OUT[2] <= Flash_Memory_Driver:u4.FLASH_MEMORY_ADDRESS[2]
FLASH_MEMORY_ADDRESS_OUT[3] <= Flash_Memory_Driver:u4.FLASH_MEMORY_ADDRESS[3]
FLASH_MEMORY_ADDRESS_OUT[4] <= Flash_Memory_Driver:u4.FLASH_MEMORY_ADDRESS[4]
FLASH_MEMORY_ADDRESS_OUT[5] <= Flash_Memory_Driver:u4.FLASH_MEMORY_ADDRESS[5]
FLASH_MEMORY_ADDRESS_OUT[6] <= Flash_Memory_Driver:u4.FLASH_MEMORY_ADDRESS[6]
FLASH_MEMORY_ADDRESS_OUT[7] <= Flash_Memory_Driver:u4.FLASH_MEMORY_ADDRESS[7]
FLASH_MEMORY_ADDRESS_OUT[8] <= Flash_Memory_Driver:u4.FLASH_MEMORY_ADDRESS[8]
FLASH_MEMORY_ADDRESS_OUT[9] <= Flash_Memory_Driver:u4.FLASH_MEMORY_ADDRESS[9]
FLASH_MEMORY_ADDRESS_OUT[10] <= Flash_Memory_Driver:u4.FLASH_MEMORY_ADDRESS[10]
FLASH_MEMORY_ADDRESS_OUT[11] <= Flash_Memory_Driver:u4.FLASH_MEMORY_ADDRESS[11]
FLASH_MEMORY_ADDRESS_OUT[12] <= Flash_Memory_Driver:u4.FLASH_MEMORY_ADDRESS[12]
FLASH_MEMORY_ADDRESS_OUT[13] <= Flash_Memory_Driver:u4.FLASH_MEMORY_ADDRESS[13]
FLASH_MEMORY_ADDRESS_OUT[14] <= Flash_Memory_Driver:u4.FLASH_MEMORY_ADDRESS[14]
FLASH_MEMORY_ADDRESS_OUT[15] <= Flash_Memory_Driver:u4.FLASH_MEMORY_ADDRESS[15]
FLASH_MEMORY_ADDRESS_OUT[16] <= Flash_Memory_Driver:u4.FLASH_MEMORY_ADDRESS[16]
FLASH_MEMORY_ADDRESS_OUT[17] <= Flash_Memory_Driver:u4.FLASH_MEMORY_ADDRESS[17]
FLASH_MEMORY_ADDRESS_OUT[18] <= Flash_Memory_Driver:u4.FLASH_MEMORY_ADDRESS[18]
FLASH_MEMORY_ADDRESS_OUT[19] <= Flash_Memory_Driver:u4.FLASH_MEMORY_ADDRESS[19]
FLASH_MEMORY_ADDRESS_OUT[20] <= Flash_Memory_Driver:u4.FLASH_MEMORY_ADDRESS[20]
FLASH_MEMORY_ADDRESS_OUT[21] <= Flash_Memory_Driver:u4.FLASH_MEMORY_ADDRESS[21]
FLASH_MEMORY_DATA_INOUT[0] <= Flash_Memory_Driver:u4.FLASH_MEMORY_DATA[0]
FLASH_MEMORY_DATA_INOUT[1] <= Flash_Memory_Driver:u4.FLASH_MEMORY_DATA[1]
FLASH_MEMORY_DATA_INOUT[2] <= Flash_Memory_Driver:u4.FLASH_MEMORY_DATA[2]
FLASH_MEMORY_DATA_INOUT[3] <= Flash_Memory_Driver:u4.FLASH_MEMORY_DATA[3]
FLASH_MEMORY_DATA_INOUT[4] <= Flash_Memory_Driver:u4.FLASH_MEMORY_DATA[4]
FLASH_MEMORY_DATA_INOUT[5] <= Flash_Memory_Driver:u4.FLASH_MEMORY_DATA[5]
FLASH_MEMORY_DATA_INOUT[6] <= Flash_Memory_Driver:u4.FLASH_MEMORY_DATA[6]
FLASH_MEMORY_DATA_INOUT[7] <= Flash_Memory_Driver:u4.FLASH_MEMORY_DATA[7]
FLASH_MEMORY_nWE_OUT <= Flash_Memory_Driver:u4.FLASH_MEMORY_nWE
FLASH_MEMORY_nOE_OUT <= Flash_Memory_Driver:u4.FLASH_MEMORY_nOE
FLASH_MEMORY_nRESET_OUT <= Flash_Memory_Driver:u4.FLASH_MEMORY_nRESET
FLASH_MEMORY_nCE_OUT <= Flash_Memory_Driver:u4.FLASH_MEMORY_nCE


|HD_ADPCM_Codec|SevenSegments_Driver:u0
DIGIT_1_IN[0] => Mux6.IN19
DIGIT_1_IN[0] => Mux5.IN19
DIGIT_1_IN[0] => Mux4.IN19
DIGIT_1_IN[0] => Mux3.IN19
DIGIT_1_IN[0] => Mux2.IN19
DIGIT_1_IN[0] => Mux1.IN19
DIGIT_1_IN[0] => Mux0.IN19
DIGIT_1_IN[1] => Mux6.IN18
DIGIT_1_IN[1] => Mux5.IN18
DIGIT_1_IN[1] => Mux4.IN18
DIGIT_1_IN[1] => Mux3.IN18
DIGIT_1_IN[1] => Mux2.IN18
DIGIT_1_IN[1] => Mux1.IN18
DIGIT_1_IN[1] => Mux0.IN18
DIGIT_1_IN[2] => Mux6.IN17
DIGIT_1_IN[2] => Mux5.IN17
DIGIT_1_IN[2] => Mux4.IN17
DIGIT_1_IN[2] => Mux3.IN17
DIGIT_1_IN[2] => Mux2.IN17
DIGIT_1_IN[2] => Mux1.IN17
DIGIT_1_IN[2] => Mux0.IN17
DIGIT_1_IN[3] => Mux6.IN16
DIGIT_1_IN[3] => Mux5.IN16
DIGIT_1_IN[3] => Mux4.IN16
DIGIT_1_IN[3] => Mux3.IN16
DIGIT_1_IN[3] => Mux2.IN16
DIGIT_1_IN[3] => Mux1.IN16
DIGIT_1_IN[3] => Mux0.IN16
DIGIT_2_IN[0] => Mux13.IN19
DIGIT_2_IN[0] => Mux12.IN19
DIGIT_2_IN[0] => Mux11.IN19
DIGIT_2_IN[0] => Mux10.IN19
DIGIT_2_IN[0] => Mux9.IN19
DIGIT_2_IN[0] => Mux8.IN19
DIGIT_2_IN[0] => Mux7.IN19
DIGIT_2_IN[1] => Mux13.IN18
DIGIT_2_IN[1] => Mux12.IN18
DIGIT_2_IN[1] => Mux11.IN18
DIGIT_2_IN[1] => Mux10.IN18
DIGIT_2_IN[1] => Mux9.IN18
DIGIT_2_IN[1] => Mux8.IN18
DIGIT_2_IN[1] => Mux7.IN18
DIGIT_2_IN[2] => Mux13.IN17
DIGIT_2_IN[2] => Mux12.IN17
DIGIT_2_IN[2] => Mux11.IN17
DIGIT_2_IN[2] => Mux10.IN17
DIGIT_2_IN[2] => Mux9.IN17
DIGIT_2_IN[2] => Mux8.IN17
DIGIT_2_IN[2] => Mux7.IN17
DIGIT_2_IN[3] => Mux13.IN16
DIGIT_2_IN[3] => Mux12.IN16
DIGIT_2_IN[3] => Mux11.IN16
DIGIT_2_IN[3] => Mux10.IN16
DIGIT_2_IN[3] => Mux9.IN16
DIGIT_2_IN[3] => Mux8.IN16
DIGIT_2_IN[3] => Mux7.IN16
DIGIT_3_IN[0] => Mux20.IN19
DIGIT_3_IN[0] => Mux19.IN19
DIGIT_3_IN[0] => Mux18.IN19
DIGIT_3_IN[0] => Mux17.IN19
DIGIT_3_IN[0] => Mux16.IN19
DIGIT_3_IN[0] => Mux15.IN19
DIGIT_3_IN[0] => Mux14.IN19
DIGIT_3_IN[1] => Mux20.IN18
DIGIT_3_IN[1] => Mux19.IN18
DIGIT_3_IN[1] => Mux18.IN18
DIGIT_3_IN[1] => Mux17.IN18
DIGIT_3_IN[1] => Mux16.IN18
DIGIT_3_IN[1] => Mux15.IN18
DIGIT_3_IN[1] => Mux14.IN18
DIGIT_3_IN[2] => Mux20.IN17
DIGIT_3_IN[2] => Mux19.IN17
DIGIT_3_IN[2] => Mux18.IN17
DIGIT_3_IN[2] => Mux17.IN17
DIGIT_3_IN[2] => Mux16.IN17
DIGIT_3_IN[2] => Mux15.IN17
DIGIT_3_IN[2] => Mux14.IN17
DIGIT_3_IN[3] => Mux20.IN16
DIGIT_3_IN[3] => Mux19.IN16
DIGIT_3_IN[3] => Mux18.IN16
DIGIT_3_IN[3] => Mux17.IN16
DIGIT_3_IN[3] => Mux16.IN16
DIGIT_3_IN[3] => Mux15.IN16
DIGIT_3_IN[3] => Mux14.IN16
DIGIT_4_IN[0] => Mux27.IN19
DIGIT_4_IN[0] => Mux26.IN19
DIGIT_4_IN[0] => Mux25.IN19
DIGIT_4_IN[0] => Mux24.IN19
DIGIT_4_IN[0] => Mux23.IN19
DIGIT_4_IN[0] => Mux22.IN19
DIGIT_4_IN[0] => Mux21.IN19
DIGIT_4_IN[1] => Mux27.IN18
DIGIT_4_IN[1] => Mux26.IN18
DIGIT_4_IN[1] => Mux25.IN18
DIGIT_4_IN[1] => Mux24.IN18
DIGIT_4_IN[1] => Mux23.IN18
DIGIT_4_IN[1] => Mux22.IN18
DIGIT_4_IN[1] => Mux21.IN18
DIGIT_4_IN[2] => Mux27.IN17
DIGIT_4_IN[2] => Mux26.IN17
DIGIT_4_IN[2] => Mux25.IN17
DIGIT_4_IN[2] => Mux24.IN17
DIGIT_4_IN[2] => Mux23.IN17
DIGIT_4_IN[2] => Mux22.IN17
DIGIT_4_IN[2] => Mux21.IN17
DIGIT_4_IN[3] => Mux27.IN16
DIGIT_4_IN[3] => Mux26.IN16
DIGIT_4_IN[3] => Mux25.IN16
DIGIT_4_IN[3] => Mux24.IN16
DIGIT_4_IN[3] => Mux23.IN16
DIGIT_4_IN[3] => Mux22.IN16
DIGIT_4_IN[3] => Mux21.IN16
SEVEN_SEGMENT_1_OUT[0] <= Mux0.DB_MAX_OUTPUT_PORT_TYPE
SEVEN_SEGMENT_1_OUT[1] <= Mux1.DB_MAX_OUTPUT_PORT_TYPE
SEVEN_SEGMENT_1_OUT[2] <= Mux2.DB_MAX_OUTPUT_PORT_TYPE
SEVEN_SEGMENT_1_OUT[3] <= Mux3.DB_MAX_OUTPUT_PORT_TYPE
SEVEN_SEGMENT_1_OUT[4] <= Mux4.DB_MAX_OUTPUT_PORT_TYPE
SEVEN_SEGMENT_1_OUT[5] <= Mux5.DB_MAX_OUTPUT_PORT_TYPE
SEVEN_SEGMENT_1_OUT[6] <= Mux6.DB_MAX_OUTPUT_PORT_TYPE
SEVEN_SEGMENT_2_OUT[0] <= Mux7.DB_MAX_OUTPUT_PORT_TYPE
SEVEN_SEGMENT_2_OUT[1] <= Mux8.DB_MAX_OUTPUT_PORT_TYPE
SEVEN_SEGMENT_2_OUT[2] <= Mux9.DB_MAX_OUTPUT_PORT_TYPE
SEVEN_SEGMENT_2_OUT[3] <= Mux10.DB_MAX_OUTPUT_PORT_TYPE
SEVEN_SEGMENT_2_OUT[4] <= Mux11.DB_MAX_OUTPUT_PORT_TYPE
SEVEN_SEGMENT_2_OUT[5] <= Mux12.DB_MAX_OUTPUT_PORT_TYPE
SEVEN_SEGMENT_2_OUT[6] <= Mux13.DB_MAX_OUTPUT_PORT_TYPE
SEVEN_SEGMENT_3_OUT[0] <= Mux14.DB_MAX_OUTPUT_PORT_TYPE
SEVEN_SEGMENT_3_OUT[1] <= Mux15.DB_MAX_OUTPUT_PORT_TYPE
SEVEN_SEGMENT_3_OUT[2] <= Mux16.DB_MAX_OUTPUT_PORT_TYPE
SEVEN_SEGMENT_3_OUT[3] <= Mux17.DB_MAX_OUTPUT_PORT_TYPE
SEVEN_SEGMENT_3_OUT[4] <= Mux18.DB_MAX_OUTPUT_PORT_TYPE
SEVEN_SEGMENT_3_OUT[5] <= Mux19.DB_MAX_OUTPUT_PORT_TYPE
SEVEN_SEGMENT_3_OUT[6] <= Mux20.DB_MAX_OUTPUT_PORT_TYPE
SEVEN_SEGMENT_4_OUT[0] <= Mux21.DB_MAX_OUTPUT_PORT_TYPE
SEVEN_SEGMENT_4_OUT[1] <= Mux22.DB_MAX_OUTPUT_PORT_TYPE
SEVEN_SEGMENT_4_OUT[2] <= Mux23.DB_MAX_OUTPUT_PORT_TYPE
SEVEN_SEGMENT_4_OUT[3] <= Mux24.DB_MAX_OUTPUT_PORT_TYPE
SEVEN_SEGMENT_4_OUT[4] <= Mux25.DB_MAX_OUTPUT_PORT_TYPE
SEVEN_SEGMENT_4_OUT[5] <= Mux26.DB_MAX_OUTPUT_PORT_TYPE
SEVEN_SEGMENT_4_OUT[6] <= Mux27.DB_MAX_OUTPUT_PORT_TYPE


|HD_ADPCM_Codec|LEDs_Bar_Driver:u1
SAMPLE_VALUE[0] => Mux7.IN10
SAMPLE_VALUE[0] => Mux6.IN19
SAMPLE_VALUE[0] => Mux4.IN19
SAMPLE_VALUE[0] => Mux2.IN19
SAMPLE_VALUE[0] => Mux0.IN19
SAMPLE_VALUE[1] => Mux8.IN5
SAMPLE_VALUE[1] => Mux7.IN9
SAMPLE_VALUE[1] => Mux6.IN18
SAMPLE_VALUE[1] => Mux5.IN10
SAMPLE_VALUE[1] => Mux4.IN18
SAMPLE_VALUE[1] => Mux2.IN18
SAMPLE_VALUE[1] => Mux1.IN10
SAMPLE_VALUE[1] => Mux0.IN18
SAMPLE_VALUE[2] => Mux6.IN17
SAMPLE_VALUE[2] => Mux5.IN9
SAMPLE_VALUE[2] => Mux4.IN17
SAMPLE_VALUE[2] => Mux3.IN5
SAMPLE_VALUE[2] => Mux2.IN17
SAMPLE_VALUE[2] => Mux1.IN9
SAMPLE_VALUE[2] => Mux0.IN17
SAMPLE_VALUE[3] => Mux8.IN4
SAMPLE_VALUE[3] => Mux7.IN8
SAMPLE_VALUE[3] => Mux6.IN16
SAMPLE_VALUE[3] => Mux5.IN8
SAMPLE_VALUE[3] => Mux4.IN16
SAMPLE_VALUE[3] => Mux3.IN4
SAMPLE_VALUE[3] => Mux2.IN16
SAMPLE_VALUE[3] => Mux1.IN8
SAMPLE_VALUE[3] => Mux0.IN16
SAMPLE_VALUE[3] => LEDS_OUT[7].DATAIN
LEDS_OUT[0] <= Mux0.DB_MAX_OUTPUT_PORT_TYPE
LEDS_OUT[1] <= Mux1.DB_MAX_OUTPUT_PORT_TYPE
LEDS_OUT[2] <= Mux2.DB_MAX_OUTPUT_PORT_TYPE
LEDS_OUT[3] <= Mux3.DB_MAX_OUTPUT_PORT_TYPE
LEDS_OUT[4] <= Mux4.DB_MAX_OUTPUT_PORT_TYPE
LEDS_OUT[5] <= Mux5.DB_MAX_OUTPUT_PORT_TYPE
LEDS_OUT[6] <= Mux6.DB_MAX_OUTPUT_PORT_TYPE
LEDS_OUT[7] <= SAMPLE_VALUE[3].DB_MAX_OUTPUT_PORT_TYPE
LEDS_OUT[8] <= Mux7.DB_MAX_OUTPUT_PORT_TYPE
LEDS_OUT[9] <= Mux8.DB_MAX_OUTPUT_PORT_TYPE


|HD_ADPCM_Codec|I2C_Driver:u2
CLOCK_IN => I2C_Stream_Counter[6].CLK
CLOCK_IN => I2C_Stream_Counter[5].CLK
CLOCK_IN => I2C_Stream_Counter[4].CLK
CLOCK_IN => I2C_Stream_Counter[3].CLK
CLOCK_IN => I2C_Stream_Counter[2].CLK
CLOCK_IN => I2C_Stream_Counter[1].CLK
CLOCK_IN => I2C_Stream_Counter[0].CLK
CLOCK_IN => I2C_CLOCK~reg0.CLK
CLOCK_IN => I2C_DATA~reg0.CLK
CLOCK_IN => Counter[24].CLK
CLOCK_IN => Counter[23].CLK
CLOCK_IN => Counter[22].CLK
CLOCK_IN => Counter[21].CLK
CLOCK_IN => Counter[20].CLK
CLOCK_IN => Counter[19].CLK
CLOCK_IN => Counter[18].CLK
CLOCK_IN => Counter[17].CLK
CLOCK_IN => Counter[16].CLK
CLOCK_IN => Counter[15].CLK
CLOCK_IN => Counter[14].CLK
CLOCK_IN => Counter[13].CLK
CLOCK_IN => Counter[12].CLK
CLOCK_IN => Counter[11].CLK
CLOCK_IN => Counter[10].CLK
CLOCK_IN => Counter[9].CLK
CLOCK_IN => Counter[8].CLK
CLOCK_IN => Counter[7].CLK
CLOCK_IN => Counter[6].CLK
CLOCK_IN => Counter[5].CLK
CLOCK_IN => Counter[4].CLK
CLOCK_IN => Counter[3].CLK
CLOCK_IN => Counter[2].CLK
CLOCK_IN => Counter[1].CLK
CLOCK_IN => Counter[0].CLK
ACTIVE_IN => I2C_Stream_Counter~13.OUTPUTSELECT
ACTIVE_IN => I2C_Stream_Counter~12.OUTPUTSELECT
ACTIVE_IN => I2C_Stream_Counter~11.OUTPUTSELECT
ACTIVE_IN => I2C_Stream_Counter~10.OUTPUTSELECT
ACTIVE_IN => I2C_Stream_Counter~9.OUTPUTSELECT
ACTIVE_IN => I2C_Stream_Counter~8.OUTPUTSELECT
ACTIVE_IN => I2C_Stream_Counter~7.OUTPUTSELECT
SLAVE_ADDRESS[0] => Mux1.IN77
SLAVE_ADDRESS[0] => Mux1.IN78
SLAVE_ADDRESS[0] => Mux1.IN79
SLAVE_ADDRESS[1] => Mux1.IN74
SLAVE_ADDRESS[1] => Mux1.IN75
SLAVE_ADDRESS[1] => Mux1.IN76
SLAVE_ADDRESS[2] => Mux1.IN71
SLAVE_ADDRESS[2] => Mux1.IN72
SLAVE_ADDRESS[2] => Mux1.IN73
SLAVE_ADDRESS[3] => Mux1.IN68
SLAVE_ADDRESS[3] => Mux1.IN69
SLAVE_ADDRESS[3] => Mux1.IN70
SLAVE_ADDRESS[4] => Mux1.IN65
SLAVE_ADDRESS[4] => Mux1.IN66
SLAVE_ADDRESS[4] => Mux1.IN67
SLAVE_ADDRESS[5] => Mux1.IN62
SLAVE_ADDRESS[5] => Mux1.IN63
SLAVE_ADDRESS[5] => Mux1.IN64
SLAVE_ADDRESS[6] => Mux1.IN59
SLAVE_ADDRESS[6] => Mux1.IN60
SLAVE_ADDRESS[6] => Mux1.IN61
SLAVE_ADDRESS[7] => Mux1.IN56
SLAVE_ADDRESS[7] => Mux1.IN57
SLAVE_ADDRESS[7] => Mux1.IN58
REGISTER_ADDRESS[0] => Mux1.IN101
REGISTER_ADDRESS[0] => Mux1.IN102
REGISTER_ADDRESS[0] => Mux1.IN103
REGISTER_ADDRESS[1] => Mux1.IN98
REGISTER_ADDRESS[1] => Mux1.IN99
REGISTER_ADDRESS[1] => Mux1.IN100
REGISTER_ADDRESS[2] => Mux1.IN95
REGISTER_ADDRESS[2] => Mux1.IN96
REGISTER_ADDRESS[2] => Mux1.IN97
REGISTER_ADDRESS[3] => Mux1.IN92
REGISTER_ADDRESS[3] => Mux1.IN93
REGISTER_ADDRESS[3] => Mux1.IN94
REGISTER_ADDRESS[4] => Mux1.IN89
REGISTER_ADDRESS[4] => Mux1.IN90
REGISTER_ADDRESS[4] => Mux1.IN91
REGISTER_ADDRESS[5] => Mux1.IN86
REGISTER_ADDRESS[5] => Mux1.IN87
REGISTER_ADDRESS[5] => Mux1.IN88
REGISTER_ADDRESS[6] => Mux1.IN83
REGISTER_ADDRESS[6] => Mux1.IN84
REGISTER_ADDRESS[6] => Mux1.IN85
REGISTER_ADDRESS[7] => Mux1.IN80
REGISTER_ADDRESS[7] => Mux1.IN81
REGISTER_ADDRESS[7] => Mux1.IN82
REGISTER_DATA[0] => Mux1.IN125
REGISTER_DATA[0] => Mux1.IN126
REGISTER_DATA[0] => Mux1.IN127
REGISTER_DATA[1] => Mux1.IN122
REGISTER_DATA[1] => Mux1.IN123
REGISTER_DATA[1] => Mux1.IN124
REGISTER_DATA[2] => Mux1.IN119
REGISTER_DATA[2] => Mux1.IN120
REGISTER_DATA[2] => Mux1.IN121
REGISTER_DATA[3] => Mux1.IN116
REGISTER_DATA[3] => Mux1.IN117
REGISTER_DATA[3] => Mux1.IN118
REGISTER_DATA[4] => Mux1.IN113
REGISTER_DATA[4] => Mux1.IN114
REGISTER_DATA[4] => Mux1.IN115
REGISTER_DATA[5] => Mux1.IN110
REGISTER_DATA[5] => Mux1.IN111
REGISTER_DATA[5] => Mux1.IN112
REGISTER_DATA[6] => Mux1.IN107
REGISTER_DATA[6] => Mux1.IN108
REGISTER_DATA[6] => Mux1.IN109
REGISTER_DATA[7] => Mux1.IN104
REGISTER_DATA[7] => Mux1.IN105
REGISTER_DATA[7] => Mux1.IN106
I2C_CLOCK <= I2C_CLOCK~reg0.DB_MAX_OUTPUT_PORT_TYPE
I2C_DATA <= comb~1


|HD_ADPCM_Codec|I2S_Driver:u3
CLOCK_IN => Counter[24].CLK
CLOCK_IN => Counter[23].CLK
CLOCK_IN => Counter[22].CLK
CLOCK_IN => Counter[21].CLK
CLOCK_IN => Counter[20].CLK
CLOCK_IN => Counter[19].CLK
CLOCK_IN => Counter[18].CLK
CLOCK_IN => Counter[17].CLK
CLOCK_IN => Counter[16].CLK
CLOCK_IN => Counter[15].CLK
CLOCK_IN => Counter[14].CLK
CLOCK_IN => Counter[13].CLK
CLOCK_IN => Counter[12].CLK
CLOCK_IN => Counter[11].CLK
CLOCK_IN => Counter[10].CLK
CLOCK_IN => Counter[9].CLK
CLOCK_IN => Counter[8].CLK
CLOCK_IN => Counter[7].CLK
CLOCK_IN => Counter[6].CLK
CLOCK_IN => Counter[5].CLK
CLOCK_IN => Counter[4].CLK
CLOCK_IN => Counter[3].CLK
CLOCK_IN => Counter[2].CLK
CLOCK_IN => Counter[1].CLK
CLOCK_IN => Counter[0].CLK
CLOCK_IN => I2S_Clock.CLK
ACTIVE_IN => Active_Module[0].CLK
ACTIVE_IN => Active_Module[0].ACLR
PCM_DATA_LEFT_IN[0] => Mux0.IN47
PCM_DATA_LEFT_IN[1] => Mux0.IN46
PCM_DATA_LEFT_IN[2] => Mux0.IN45
PCM_DATA_LEFT_IN[3] => Mux0.IN44
PCM_DATA_LEFT_IN[4] => Mux0.IN43
PCM_DATA_LEFT_IN[5] => Mux0.IN42
PCM_DATA_LEFT_IN[6] => Mux0.IN41
PCM_DATA_LEFT_IN[7] => Mux0.IN40
PCM_DATA_LEFT_IN[8] => Mux0.IN39
PCM_DATA_LEFT_IN[9] => Mux0.IN38
PCM_DATA_LEFT_IN[10] => Mux0.IN37
PCM_DATA_LEFT_IN[11] => Mux0.IN36
PCM_DATA_LEFT_IN[12] => Mux0.IN35
PCM_DATA_LEFT_IN[13] => Mux0.IN34
PCM_DATA_LEFT_IN[14] => Mux0.IN33
PCM_DATA_LEFT_IN[15] => Mux0.IN32
PCM_DATA_RIGHT_IN[0] => Mux0.IN63
PCM_DATA_RIGHT_IN[1] => Mux0.IN62
PCM_DATA_RIGHT_IN[2] => Mux0.IN61
PCM_DATA_RIGHT_IN[3] => Mux0.IN60
PCM_DATA_RIGHT_IN[4] => Mux0.IN59
PCM_DATA_RIGHT_IN[5] => Mux0.IN58
PCM_DATA_RIGHT_IN[6] => Mux0.IN57
PCM_DATA_RIGHT_IN[7] => Mux0.IN56
PCM_DATA_RIGHT_IN[8] => Mux0.IN55
PCM_DATA_RIGHT_IN[9] => Mux0.IN54
PCM_DATA_RIGHT_IN[10] => Mux0.IN53
PCM_DATA_RIGHT_IN[11] => Mux0.IN52
PCM_DATA_RIGHT_IN[12] => Mux0.IN51
PCM_DATA_RIGHT_IN[13] => Mux0.IN50
PCM_DATA_RIGHT_IN[14] => Mux0.IN49
PCM_DATA_RIGHT_IN[15] => Mux0.IN48
I2S_LEFT_RIGHT_CLOCK_OUT <= I2S_LEFT_RIGHT_CLOCK_OUT~reg0.DB_MAX_OUTPUT_PORT_TYPE
I2S_CLOCK_OUT <= I2S_Clock.DB_MAX_OUTPUT_PORT_TYPE
I2S_DATA_INOUT <= comb~1
I2S_PCM_DATA_ACCESS_OUT <= I2S_PCM_DATA_ACCESS_OUT~reg0.DB_MAX_OUTPUT_PORT_TYPE


|HD_ADPCM_Codec|Flash_Memory_Driver:u4
CLOCK_IN => Counter[24].CLK
CLOCK_IN => Counter[23].CLK
CLOCK_IN => Counter[22].CLK
CLOCK_IN => Counter[21].CLK
CLOCK_IN => Counter[20].CLK
CLOCK_IN => Counter[19].CLK
CLOCK_IN => Counter[18].CLK
CLOCK_IN => Counter[17].CLK
CLOCK_IN => Counter[16].CLK
CLOCK_IN => Counter[15].CLK
CLOCK_IN => Counter[14].CLK
CLOCK_IN => Counter[13].CLK
CLOCK_IN => Counter[12].CLK
CLOCK_IN => Counter[11].CLK
CLOCK_IN => Counter[10].CLK
CLOCK_IN => Counter[9].CLK
CLOCK_IN => Counter[8].CLK
CLOCK_IN => Counter[7].CLK
CLOCK_IN => Counter[6].CLK
CLOCK_IN => Counter[5].CLK
CLOCK_IN => Counter[4].CLK
CLOCK_IN => Counter[3].CLK
CLOCK_IN => Counter[2].CLK
CLOCK_IN => Counter[1].CLK
CLOCK_IN => Counter[0].CLK
CLOCK_IN => Flash_Memory_Clock.CLK
ACTIVE_IN => Flash_Memory_Clock~0.OUTPUTSELECT
FLASH_MEMORY_ADDRESS_IN[0] => Mux26.IN2
FLASH_MEMORY_ADDRESS_IN[1] => Mux25.IN2
FLASH_MEMORY_ADDRESS_IN[2] => Mux24.IN2
FLASH_MEMORY_ADDRESS_IN[3] => Mux23.IN2
FLASH_MEMORY_ADDRESS_IN[4] => Mux22.IN2
FLASH_MEMORY_ADDRESS_IN[5] => Mux21.IN2
FLASH_MEMORY_ADDRESS_IN[6] => Mux20.IN2
FLASH_MEMORY_ADDRESS_IN[7] => Mux19.IN2
FLASH_MEMORY_ADDRESS_IN[8] => Mux18.IN2
FLASH_MEMORY_ADDRESS_IN[9] => Mux17.IN2
FLASH_MEMORY_ADDRESS_IN[10] => Mux16.IN2
FLASH_MEMORY_ADDRESS_IN[11] => Mux15.IN2
FLASH_MEMORY_ADDRESS_IN[12] => Mux14.IN2
FLASH_MEMORY_ADDRESS_IN[13] => Mux13.IN2
FLASH_MEMORY_ADDRESS_IN[14] => Mux12.IN2
FLASH_MEMORY_ADDRESS_IN[15] => Mux11.IN2
FLASH_MEMORY_ADDRESS_IN[16] => Mux10.IN2
FLASH_MEMORY_ADDRESS_IN[17] => Mux9.IN2
FLASH_MEMORY_ADDRESS_IN[18] => Mux8.IN2
FLASH_MEMORY_ADDRESS_IN[19] => Mux7.IN2
FLASH_MEMORY_ADDRESS_IN[20] => Mux6.IN2
FLASH_MEMORY_ADDRESS_IN[21] => Mux5.IN2
FLASH_MEMORY_DATA_OUT[0] <= FLASH_MEMORY_DATA_OUT[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
FLASH_MEMORY_DATA_OUT[1] <= FLASH_MEMORY_DATA_OUT[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
FLASH_MEMORY_DATA_OUT[2] <= FLASH_MEMORY_DATA_OUT[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
FLASH_MEMORY_DATA_OUT[3] <= FLASH_MEMORY_DATA_OUT[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
FLASH_MEMORY_DATA_OUT[4] <= FLASH_MEMORY_DATA_OUT[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
FLASH_MEMORY_DATA_OUT[5] <= FLASH_MEMORY_DATA_OUT[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
FLASH_MEMORY_DATA_OUT[6] <= FLASH_MEMORY_DATA_OUT[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
FLASH_MEMORY_DATA_OUT[7] <= FLASH_MEMORY_DATA_OUT[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
DATA_VALID <= Flash_Memory_Data_Valid.DB_MAX_OUTPUT_PORT_TYPE
FLASH_MEMORY_nWE <= FLASH_MEMORY_nWE~reg0.DB_MAX_OUTPUT_PORT_TYPE
FLASH_MEMORY_nOE <= FLASH_MEMORY_nOE~reg0.DB_MAX_OUTPUT_PORT_TYPE
FLASH_MEMORY_nRESET <= FLASH_MEMORY_nRESET~reg0.DB_MAX_OUTPUT_PORT_TYPE
FLASH_MEMORY_nCE <= FLASH_MEMORY_nCE~reg0.DB_MAX_OUTPUT_PORT_TYPE
FLASH_MEMORY_ADDRESS[0] <= FLASH_MEMORY_ADDRESS[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
FLASH_MEMORY_ADDRESS[1] <= FLASH_MEMORY_ADDRESS[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
FLASH_MEMORY_ADDRESS[2] <= FLASH_MEMORY_ADDRESS[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
FLASH_MEMORY_ADDRESS[3] <= FLASH_MEMORY_ADDRESS[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
FLASH_MEMORY_ADDRESS[4] <= FLASH_MEMORY_ADDRESS[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
FLASH_MEMORY_ADDRESS[5] <= FLASH_MEMORY_ADDRESS[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
FLASH_MEMORY_ADDRESS[6] <= FLASH_MEMORY_ADDRESS[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
FLASH_MEMORY_ADDRESS[7] <= FLASH_MEMORY_ADDRESS[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
FLASH_MEMORY_ADDRESS[8] <= FLASH_MEMORY_ADDRESS[8]~reg0.DB_MAX_OUTPUT_PORT_TYPE
FLASH_MEMORY_ADDRESS[9] <= FLASH_MEMORY_ADDRESS[9]~reg0.DB_MAX_OUTPUT_PORT_TYPE
FLASH_MEMORY_ADDRESS[10] <= FLASH_MEMORY_ADDRESS[10]~reg0.DB_MAX_OUTPUT_PORT_TYPE
FLASH_MEMORY_ADDRESS[11] <= FLASH_MEMORY_ADDRESS[11]~reg0.DB_MAX_OUTPUT_PORT_TYPE
FLASH_MEMORY_ADDRESS[12] <= FLASH_MEMORY_ADDRESS[12]~reg0.DB_MAX_OUTPUT_PORT_TYPE
FLASH_MEMORY_ADDRESS[13] <= FLASH_MEMORY_ADDRESS[13]~reg0.DB_MAX_OUTPUT_PORT_TYPE
FLASH_MEMORY_ADDRESS[14] <= FLASH_MEMORY_ADDRESS[14]~reg0.DB_MAX_OUTPUT_PORT_TYPE
FLASH_MEMORY_ADDRESS[15] <= FLASH_MEMORY_ADDRESS[15]~reg0.DB_MAX_OUTPUT_PORT_TYPE
FLASH_MEMORY_ADDRESS[16] <= FLASH_MEMORY_ADDRESS[16]~reg0.DB_MAX_OUTPUT_PORT_TYPE
FLASH_MEMORY_ADDRESS[17] <= FLASH_MEMORY_ADDRESS[17]~reg0.DB_MAX_OUTPUT_PORT_TYPE
FLASH_MEMORY_ADDRESS[18] <= FLASH_MEMORY_ADDRESS[18]~reg0.DB_MAX_OUTPUT_PORT_TYPE
FLASH_MEMORY_ADDRESS[19] <= FLASH_MEMORY_ADDRESS[19]~reg0.DB_MAX_OUTPUT_PORT_TYPE
FLASH_MEMORY_ADDRESS[20] <= FLASH_MEMORY_ADDRESS[20]~reg0.DB_MAX_OUTPUT_PORT_TYPE
FLASH_MEMORY_ADDRESS[21] <= FLASH_MEMORY_ADDRESS[21]~reg0.DB_MAX_OUTPUT_PORT_TYPE


|HD_ADPCM_Codec|ADPCM_Decoder_1_Bit:u5
CLOCK_IN => PCM_Data_Difference[16].CLK
CLOCK_IN => PCM_Data_Difference[15].CLK
CLOCK_IN => PCM_Data_Difference[14].CLK
CLOCK_IN => PCM_Data_Difference[13].CLK
CLOCK_IN => PCM_Data_Difference[12].CLK
CLOCK_IN => PCM_Data_Difference[11].CLK
CLOCK_IN => PCM_Data_Difference[10].CLK
CLOCK_IN => PCM_Data_Difference[9].CLK
CLOCK_IN => PCM_Data_Difference[8].CLK
CLOCK_IN => PCM_Data_Difference[7].CLK
CLOCK_IN => PCM_Data_Difference[6].CLK
CLOCK_IN => PCM_Data_Difference[5].CLK
CLOCK_IN => PCM_Data_Difference[4].CLK
CLOCK_IN => PCM_Data_Difference[3].CLK
CLOCK_IN => PCM_Data_Difference[2].CLK
CLOCK_IN => PCM_Data_Difference[1].CLK
CLOCK_IN => PCM_Data_Difference[0].CLK
CLOCK_IN => ADPCM_Decoder_Step_Size_Table_Pointer[9].CLK
CLOCK_IN => ADPCM_Decoder_Step_Size_Table_Pointer[8].CLK
CLOCK_IN => ADPCM_Decoder_Step_Size_Table_Pointer[7].CLK
CLOCK_IN => ADPCM_Decoder_Step_Size_Table_Pointer[6].CLK
CLOCK_IN => ADPCM_Decoder_Step_Size_Table_Pointer[5].CLK
CLOCK_IN => ADPCM_Decoder_Step_Size_Table_Pointer[4].CLK
CLOCK_IN => ADPCM_Decoder_Step_Size_Table_Pointer[3].CLK
CLOCK_IN => ADPCM_Decoder_Step_Size_Table_Pointer[2].CLK
CLOCK_IN => ADPCM_Decoder_Step_Size_Table_Pointer[1].CLK
CLOCK_IN => ADPCM_Decoder_Step_Size_Table_Pointer[0].CLK
CLOCK_IN => Last_PCM_Data[16].CLK
CLOCK_IN => Last_PCM_Data[15].CLK
CLOCK_IN => Last_PCM_Data[14].CLK
CLOCK_IN => Last_PCM_Data[13].CLK
CLOCK_IN => Last_PCM_Data[12].CLK
CLOCK_IN => Last_PCM_Data[11].CLK
CLOCK_IN => Last_PCM_Data[10].CLK
CLOCK_IN => Last_PCM_Data[9].CLK
CLOCK_IN => Last_PCM_Data[8].CLK
CLOCK_IN => Last_PCM_Data[7].CLK
CLOCK_IN => Last_PCM_Data[6].CLK
CLOCK_IN => Last_PCM_Data[5].CLK
CLOCK_IN => Last_PCM_Data[4].CLK
CLOCK_IN => Last_PCM_Data[3].CLK
CLOCK_IN => Last_PCM_Data[2].CLK
CLOCK_IN => Last_PCM_Data[1].CLK
CLOCK_IN => Last_PCM_Data[0].CLK
CLOCK_IN => PCM_Data[15].CLK
CLOCK_IN => PCM_Data[14].CLK
CLOCK_IN => PCM_Data[13].CLK
CLOCK_IN => PCM_Data[12].CLK
CLOCK_IN => PCM_Data[11].CLK
CLOCK_IN => PCM_Data[10].CLK
CLOCK_IN => PCM_Data[9].CLK
CLOCK_IN => PCM_Data[8].CLK
CLOCK_IN => PCM_Data[7].CLK
CLOCK_IN => PCM_Data[6].CLK
CLOCK_IN => PCM_Data[5].CLK
CLOCK_IN => PCM_Data[4].CLK
CLOCK_IN => PCM_Data[3].CLK
CLOCK_IN => PCM_Data[2].CLK
CLOCK_IN => PCM_Data[1].CLK
CLOCK_IN => PCM_Data[0].CLK
CLOCK_IN => ADPCM_Decoder_State_Counter[2].CLK
CLOCK_IN => ADPCM_Decoder_State_Counter[1].CLK
CLOCK_IN => ADPCM_Decoder_State_Counter[0].CLK
CLOCK_IN => Last_ADPCM_Data.CLK
CLOCK_IN => PCM_DATA_OUT[15]~reg0.CLK
CLOCK_IN => PCM_DATA_OUT[14]~reg0.CLK
CLOCK_IN => PCM_DATA_OUT[13]~reg0.CLK
CLOCK_IN => PCM_DATA_OUT[12]~reg0.CLK
CLOCK_IN => PCM_DATA_OUT[11]~reg0.CLK
CLOCK_IN => PCM_DATA_OUT[10]~reg0.CLK
CLOCK_IN => PCM_DATA_OUT[9]~reg0.CLK
CLOCK_IN => PCM_DATA_OUT[8]~reg0.CLK
CLOCK_IN => PCM_DATA_OUT[7]~reg0.CLK
CLOCK_IN => PCM_DATA_OUT[6]~reg0.CLK
CLOCK_IN => PCM_DATA_OUT[5]~reg0.CLK
CLOCK_IN => PCM_DATA_OUT[4]~reg0.CLK
CLOCK_IN => PCM_DATA_OUT[3]~reg0.CLK
CLOCK_IN => PCM_DATA_OUT[2]~reg0.CLK
CLOCK_IN => PCM_DATA_OUT[1]~reg0.CLK
CLOCK_IN => PCM_DATA_OUT[0]~reg0.CLK
CLOCK_IN => Active_Module.CLK
ACTIVE_IN => Active_Module~0.DATAB
ACTIVE_IN => process_0~0.IN1
ADPCM_DATA_IN => Mux27.IN0
ADPCM_DATA_IN => Last_PCM_Data~16.OUTPUTSELECT
ADPCM_DATA_IN => Last_PCM_Data~15.OUTPUTSELECT
ADPCM_DATA_IN => Last_PCM_Data~14.OUTPUTSELECT
ADPCM_DATA_IN => Last_PCM_Data~13.OUTPUTSELECT
ADPCM_DATA_IN => Last_PCM_Data~12.OUTPUTSELECT
ADPCM_DATA_IN => Last_PCM_Data~11.OUTPUTSELECT
ADPCM_DATA_IN => Last_PCM_Data~10.OUTPUTSELECT
ADPCM_DATA_IN => Last_PCM_Data~9.OUTPUTSELECT
ADPCM_DATA_IN => Last_PCM_Data~8.OUTPUTSELECT
ADPCM_DATA_IN => Last_PCM_Data~7.OUTPUTSELECT
ADPCM_DATA_IN => Last_PCM_Data~6.OUTPUTSELECT
ADPCM_DATA_IN => Last_PCM_Data~5.OUTPUTSELECT
ADPCM_DATA_IN => Last_PCM_Data~4.OUTPUTSELECT
ADPCM_DATA_IN => Last_PCM_Data~3.OUTPUTSELECT
ADPCM_DATA_IN => Last_PCM_Data~2.OUTPUTSELECT
ADPCM_DATA_IN => Last_PCM_Data~1.OUTPUTSELECT
ADPCM_DATA_IN => Last_PCM_Data~0.OUTPUTSELECT
ADPCM_DATA_IN => process_0~1.IN1
PCM_DATA_OUT[0] <= PCM_DATA_OUT[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
PCM_DATA_OUT[1] <= PCM_DATA_OUT[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
PCM_DATA_OUT[2] <= PCM_DATA_OUT[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
PCM_DATA_OUT[3] <= PCM_DATA_OUT[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
PCM_DATA_OUT[4] <= PCM_DATA_OUT[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
PCM_DATA_OUT[5] <= PCM_DATA_OUT[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
PCM_DATA_OUT[6] <= PCM_DATA_OUT[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
PCM_DATA_OUT[7] <= PCM_DATA_OUT[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
PCM_DATA_OUT[8] <= PCM_DATA_OUT[8]~reg0.DB_MAX_OUTPUT_PORT_TYPE
PCM_DATA_OUT[9] <= PCM_DATA_OUT[9]~reg0.DB_MAX_OUTPUT_PORT_TYPE
PCM_DATA_OUT[10] <= PCM_DATA_OUT[10]~reg0.DB_MAX_OUTPUT_PORT_TYPE
PCM_DATA_OUT[11] <= PCM_DATA_OUT[11]~reg0.DB_MAX_OUTPUT_PORT_TYPE
PCM_DATA_OUT[12] <= PCM_DATA_OUT[12]~reg0.DB_MAX_OUTPUT_PORT_TYPE
PCM_DATA_OUT[13] <= PCM_DATA_OUT[13]~reg0.DB_MAX_OUTPUT_PORT_TYPE
PCM_DATA_OUT[14] <= PCM_DATA_OUT[14]~reg0.DB_MAX_OUTPUT_PORT_TYPE
PCM_DATA_OUT[15] <= PCM_DATA_OUT[15]~reg0.DB_MAX_OUTPUT_PORT_TYPE


|HD_ADPCM_Codec|ADPCM_Decoder_1_Bit:u6
CLOCK_IN => PCM_Data_Difference[16].CLK
CLOCK_IN => PCM_Data_Difference[15].CLK
CLOCK_IN => PCM_Data_Difference[14].CLK
CLOCK_IN => PCM_Data_Difference[13].CLK
CLOCK_IN => PCM_Data_Difference[12].CLK
CLOCK_IN => PCM_Data_Difference[11].CLK
CLOCK_IN => PCM_Data_Difference[10].CLK
CLOCK_IN => PCM_Data_Difference[9].CLK
CLOCK_IN => PCM_Data_Difference[8].CLK
CLOCK_IN => PCM_Data_Difference[7].CLK
CLOCK_IN => PCM_Data_Difference[6].CLK
CLOCK_IN => PCM_Data_Difference[5].CLK
CLOCK_IN => PCM_Data_Difference[4].CLK
CLOCK_IN => PCM_Data_Difference[3].CLK
CLOCK_IN => PCM_Data_Difference[2].CLK
CLOCK_IN => PCM_Data_Difference[1].CLK
CLOCK_IN => PCM_Data_Difference[0].CLK
CLOCK_IN => ADPCM_Decoder_Step_Size_Table_Pointer[9].CLK
CLOCK_IN => ADPCM_Decoder_Step_Size_Table_Pointer[8].CLK
CLOCK_IN => ADPCM_Decoder_Step_Size_Table_Pointer[7].CLK
CLOCK_IN => ADPCM_Decoder_Step_Size_Table_Pointer[6].CLK
CLOCK_IN => ADPCM_Decoder_Step_Size_Table_Pointer[5].CLK
CLOCK_IN => ADPCM_Decoder_Step_Size_Table_Pointer[4].CLK
CLOCK_IN => ADPCM_Decoder_Step_Size_Table_Pointer[3].CLK
CLOCK_IN => ADPCM_Decoder_Step_Size_Table_Pointer[2].CLK
CLOCK_IN => ADPCM_Decoder_Step_Size_Table_Pointer[1].CLK
CLOCK_IN => ADPCM_Decoder_Step_Size_Table_Pointer[0].CLK
CLOCK_IN => Last_PCM_Data[16].CLK
CLOCK_IN => Last_PCM_Data[15].CLK
CLOCK_IN => Last_PCM_Data[14].CLK
CLOCK_IN => Last_PCM_Data[13].CLK
CLOCK_IN => Last_PCM_Data[12].CLK
CLOCK_IN => Last_PCM_Data[11].CLK
CLOCK_IN => Last_PCM_Data[10].CLK
CLOCK_IN => Last_PCM_Data[9].CLK
CLOCK_IN => Last_PCM_Data[8].CLK
CLOCK_IN => Last_PCM_Data[7].CLK
CLOCK_IN => Last_PCM_Data[6].CLK
CLOCK_IN => Last_PCM_Data[5].CLK
CLOCK_IN => Last_PCM_Data[4].CLK
CLOCK_IN => Last_PCM_Data[3].CLK
CLOCK_IN => Last_PCM_Data[2].CLK
CLOCK_IN => Last_PCM_Data[1].CLK
CLOCK_IN => Last_PCM_Data[0].CLK
CLOCK_IN => PCM_Data[15].CLK
CLOCK_IN => PCM_Data[14].CLK
CLOCK_IN => PCM_Data[13].CLK
CLOCK_IN => PCM_Data[12].CLK
CLOCK_IN => PCM_Data[11].CLK
CLOCK_IN => PCM_Data[10].CLK
CLOCK_IN => PCM_Data[9].CLK
CLOCK_IN => PCM_Data[8].CLK
CLOCK_IN => PCM_Data[7].CLK
CLOCK_IN => PCM_Data[6].CLK
CLOCK_IN => PCM_Data[5].CLK
CLOCK_IN => PCM_Data[4].CLK
CLOCK_IN => PCM_Data[3].CLK
CLOCK_IN => PCM_Data[2].CLK
CLOCK_IN => PCM_Data[1].CLK
CLOCK_IN => PCM_Data[0].CLK
CLOCK_IN => ADPCM_Decoder_State_Counter[2].CLK
CLOCK_IN => ADPCM_Decoder_State_Counter[1].CLK
CLOCK_IN => ADPCM_Decoder_State_Counter[0].CLK
CLOCK_IN => Last_ADPCM_Data.CLK
CLOCK_IN => PCM_DATA_OUT[15]~reg0.CLK
CLOCK_IN => PCM_DATA_OUT[14]~reg0.CLK
CLOCK_IN => PCM_DATA_OUT[13]~reg0.CLK
CLOCK_IN => PCM_DATA_OUT[12]~reg0.CLK
CLOCK_IN => PCM_DATA_OUT[11]~reg0.CLK
CLOCK_IN => PCM_DATA_OUT[10]~reg0.CLK
CLOCK_IN => PCM_DATA_OUT[9]~reg0.CLK
CLOCK_IN => PCM_DATA_OUT[8]~reg0.CLK
CLOCK_IN => PCM_DATA_OUT[7]~reg0.CLK
CLOCK_IN => PCM_DATA_OUT[6]~reg0.CLK
CLOCK_IN => PCM_DATA_OUT[5]~reg0.CLK
CLOCK_IN => PCM_DATA_OUT[4]~reg0.CLK
CLOCK_IN => PCM_DATA_OUT[3]~reg0.CLK
CLOCK_IN => PCM_DATA_OUT[2]~reg0.CLK
CLOCK_IN => PCM_DATA_OUT[1]~reg0.CLK
CLOCK_IN => PCM_DATA_OUT[0]~reg0.CLK
CLOCK_IN => Active_Module.CLK
ACTIVE_IN => Active_Module~0.DATAB
ACTIVE_IN => process_0~0.IN1
ADPCM_DATA_IN => Mux27.IN0
ADPCM_DATA_IN => Last_PCM_Data~16.OUTPUTSELECT
ADPCM_DATA_IN => Last_PCM_Data~15.OUTPUTSELECT
ADPCM_DATA_IN => Last_PCM_Data~14.OUTPUTSELECT
ADPCM_DATA_IN => Last_PCM_Data~13.OUTPUTSELECT
ADPCM_DATA_IN => Last_PCM_Data~12.OUTPUTSELECT
ADPCM_DATA_IN => Last_PCM_Data~11.OUTPUTSELECT
ADPCM_DATA_IN => Last_PCM_Data~10.OUTPUTSELECT
ADPCM_DATA_IN => Last_PCM_Data~9.OUTPUTSELECT
ADPCM_DATA_IN => Last_PCM_Data~8.OUTPUTSELECT
ADPCM_DATA_IN => Last_PCM_Data~7.OUTPUTSELECT
ADPCM_DATA_IN => Last_PCM_Data~6.OUTPUTSELECT
ADPCM_DATA_IN => Last_PCM_Data~5.OUTPUTSELECT
ADPCM_DATA_IN => Last_PCM_Data~4.OUTPUTSELECT
ADPCM_DATA_IN => Last_PCM_Data~3.OUTPUTSELECT
ADPCM_DATA_IN => Last_PCM_Data~2.OUTPUTSELECT
ADPCM_DATA_IN => Last_PCM_Data~1.OUTPUTSELECT
ADPCM_DATA_IN => Last_PCM_Data~0.OUTPUTSELECT
ADPCM_DATA_IN => process_0~1.IN1
PCM_DATA_OUT[0] <= PCM_DATA_OUT[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
PCM_DATA_OUT[1] <= PCM_DATA_OUT[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
PCM_DATA_OUT[2] <= PCM_DATA_OUT[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
PCM_DATA_OUT[3] <= PCM_DATA_OUT[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
PCM_DATA_OUT[4] <= PCM_DATA_OUT[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
PCM_DATA_OUT[5] <= PCM_DATA_OUT[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
PCM_DATA_OUT[6] <= PCM_DATA_OUT[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
PCM_DATA_OUT[7] <= PCM_DATA_OUT[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
PCM_DATA_OUT[8] <= PCM_DATA_OUT[8]~reg0.DB_MAX_OUTPUT_PORT_TYPE
PCM_DATA_OUT[9] <= PCM_DATA_OUT[9]~reg0.DB_MAX_OUTPUT_PORT_TYPE
PCM_DATA_OUT[10] <= PCM_DATA_OUT[10]~reg0.DB_MAX_OUTPUT_PORT_TYPE
PCM_DATA_OUT[11] <= PCM_DATA_OUT[11]~reg0.DB_MAX_OUTPUT_PORT_TYPE
PCM_DATA_OUT[12] <= PCM_DATA_OUT[12]~reg0.DB_MAX_OUTPUT_PORT_TYPE
PCM_DATA_OUT[13] <= PCM_DATA_OUT[13]~reg0.DB_MAX_OUTPUT_PORT_TYPE
PCM_DATA_OUT[14] <= PCM_DATA_OUT[14]~reg0.DB_MAX_OUTPUT_PORT_TYPE
PCM_DATA_OUT[15] <= PCM_DATA_OUT[15]~reg0.DB_MAX_OUTPUT_PORT_TYPE


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