URL https://opencores.org/ocsvn/axi_vga/axi_vga/trunk

Subversion Repositories axi_vga

[/] [axi_vga/] [trunk/] [sim/] [modelsim.do] - Rev 2

#vlib work
vlib work
#vlog  $env(XILINX)/verilog/src/glbl.v

vlog +define+SIM_RTL -f files.list 
vsim -t ps  work.testbench  -l vsim.log