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##### >>>   UCF File for Xilinx Spartan-3 FPGA Board   <<< #####
### Created by Spartan-3 UCF Generator on 12/28/2005 at 12:26
### Spartan-3 Clock Oscillator:
### Spartan-3 Pushbutton Switches:
### Spartan-3 Slide Switches:
NET sw[7] LOC=K13;  # SW7 (active high when up)
 # SW7 (active high when up)
NET sw[6] LOC=K14;  # SW6 (active high when up)
 # SW6 (active high when up)
NET sw[5] LOC=J13;  # SW5 (active high when up)
 # SW5 (active high when up)
NET sw[4] LOC=J14;  # SW4 (active high when up)
 # SW4 (active high when up)
NET sw[3] LOC=H13;  # SW3 (active high when up)
 # SW3 (active high when up)
NET sw[2] LOC=H14;  # SW2 (active high when up)
 # SW2 (active high when up)
NET sw[1] LOC=G12;  # SW1 (active high when up)
 # SW1 (active high when up)
NET sw[0] LOC=F12;  # SW0 (active high when up)



 # SW0 (active high when up)
### Spartan-3 Discrete LEDs:
NET led[7] LOC=P11;  # LD7 (active high)
 # LD7 (active high)
NET led[6] LOC=P12;  # LD6 (active high)
 # LD6 (active high)
NET led[5] LOC=N12;  # LD5 (active high)
 # LD5 (active high)
NET led[4] LOC=P13;  # LD4 (active high)
 # LD4 (active high)
NET led[3] LOC=N14;  # LD3 (active high)
 # LD3 (active high)
NET led[2] LOC=L12;  # LD2 (active high)
 # LD2 (active high)
NET led[1] LOC=P14;  # LD1 (active high)
 # LD1 (active high)
NET led[0] LOC=K12;  # LD0 (active high)


 # LD0 (active high)
### Spartan-3 7-Segment LED:   digit enables:
NET digsel[3] LOC=E13;  # left digit (active low)
 # left digit (active low)
NET digsel[2] LOC=F14;  # middle left digit (active low)
 # middle left digit (active low)
NET digsel[1] LOC=G14;  # middle right digit (active low)
 # middle right digit (active low)
NET digsel[0] LOC=D14;  # right digit (active low)

 # right digit (active low)
### Spartan-3 7-Segment LED:   segment enables:
NET display[0] LOC=E14;  # LED display segment a (active low)
 # LED display segment a (active low)
NET display[1] LOC=G13;  # LED display segment b (active low)
 # LED display segment b (active low)
NET display[2] LOC=N15;  # LED display segment c (active low)
 # LED display segment c (active low)
NET display[3] LOC=P15;  # LED display segment d (active low)
 # LED display segment d (active low)
NET display[4] LOC=R16;  # LED display segment e (active low)
 # LED display segment e (active low)
NET display[5] LOC=F13;  # LED display segment f (active low)
 # LED display segment f (active low)
NET display[6] LOC=N16;  # LED display segment g (active low)
### Spartan-3 SRAM:Enables for IC10:
### Spartan-3 SRAM:Enables for both IC10 and IC11:
### Spartan-3 SRAM:Address for both IC10 and IC11:
 # LED display segment g (active low)
### Spartan-3 SRAM:Enables for IC10:
### Spartan-3 SRAM:Enables for both IC10 and IC11:
### Spartan-3 SRAM:Address for both IC10 and IC11:
NET xmaddress[17] LOC=L3;  # A17
 # A17
NET xmaddress[16] LOC=K5;  # A16
 # A16
NET xmaddress[15] LOC=K3;  # A15
 # A15
NET xmaddress[14] LOC=J3;  # A14
 # A14
NET xmaddress[13] LOC=J4;  # A13
 # A13
NET xmaddress[12] LOC=H4;  # A12
 # A12
NET xmaddress[11] LOC=H3;  # A11
 # A11
NET xmaddress[10] LOC=G5;  # A10
 # A10
NET xmaddress[9] LOC=E4;  # A9
 # A9
NET xmaddress[8] LOC=E3;  # A8
 # A8
NET xmaddress[7] LOC=F4;  # A7
 # A7
NET xmaddress[6] LOC=F3;  # A6
 # A6
NET xmaddress[5] LOC=G4;  # A5
 # A5
NET xmaddress[4] LOC=L4;  # A4
 # A4
NET xmaddress[3] LOC=M3;  # A3
 # A3
NET xmaddress[2] LOC=M4;  # A2
 # A2
NET xmaddress[1] LOC=N3;  # A1
 # A1
NET xmaddress[0] LOC=L5;  # A0

 # A0
### Spartan-3 SRAM:Data for IC10:
NET xmdata[15] LOC=R1;  # D15
 # D15
NET xmdata[14] LOC=P1;  # D14
 # D14
NET xmdata[13] LOC=L2;  # D13
 # D13
NET xmdata[12] LOC=J2;  # D12
 # D12
NET xmdata[11] LOC=H1;  # D11
 # D11
NET xmdata[10] LOC=F2;  # D10
 # D10
NET xmdata[9] LOC=P8;  # D9
 # D9
NET xmdata[8] LOC=D3;  # D8
 # D8
NET xmdata[7] LOC=B1;  # D7
 # D7
NET xmdata[6] LOC=C1;  # D6
 # D6
NET xmdata[5] LOC=C2;  # D5
 # D5
NET xmdata[4] LOC=R5;  # D4
 # D4
NET xmdata[3] LOC=T5;  # D3
 # D3
NET xmdata[2] LOC=R6;  # D2
 # D2
NET xmdata[1] LOC=T8;  # D1
 # D1
NET xmdata[0] LOC=N7;  # D0


 # D0
# LB1 - lower byte enable (active low)
# WE - write enable (active low)
# WE - write enable (active low)
#PACE: Start of Constraints generated by PACE
#PACE: Start of PACE I/O Pin Assignments
NET "clkin"  LOC = "T9" | IOSTANDARD = LVCMOS33 ; # CLK - 50MHz oscillator
# CLK - 50MHz oscillator
NET "digsel<0>" IOSTANDARD = LVCMOS33 ;
NET "digsel<1>" IOSTANDARD = LVCMOS33 ;
NET "digsel<2>" IOSTANDARD = LVCMOS33 ;
NET "digsel<3>" IOSTANDARD = LVCMOS33 ;
NET "display<0>" IOSTANDARD = LVCMOS33 ;
NET "display<1>" IOSTANDARD = LVCMOS33 ;
NET "display<2>" IOSTANDARD = LVCMOS33 ;
NET "display<3>" IOSTANDARD = LVCMOS33 ;
NET "display<4>" IOSTANDARD = LVCMOS33 ;
NET "display<5>" IOSTANDARD = LVCMOS33 ;
NET "display<6>" IOSTANDARD = LVCMOS33 ;
NET "dp" LOC = "P16"; # LED display decimal point (active low)
NET "dp" IOSTANDARD = LVCMOS33;
NET "pb0" IOSTANDARD = LVCMOS33;
NET "pb1" IOSTANDARD = LVCMOS33;
NET "pb2" IOSTANDARD = LVCMOS33;
NET "pb3" IOSTANDARD = LVCMOS33;
NET "led<0>" IOSTANDARD = LVCMOS33 ;
NET "led<1>" IOSTANDARD = LVCMOS33 ;
NET "led<2>" IOSTANDARD = LVCMOS33 ;
NET "led<3>" IOSTANDARD = LVCMOS33 ;
NET "led<4>" IOSTANDARD = LVCMOS33 ;
NET "led<5>" IOSTANDARD = LVCMOS33 ;
NET "led<6>" IOSTANDARD = LVCMOS33 ;
NET "led<7>" IOSTANDARD = LVCMOS33 ;
NET "pb0" LOC = "L14"; # BTN3 (active high)
NET "pb1" LOC = "L13"; # BTN2 (active high)
NET "pb2" LOC = "M14"; # BTN1 (active high)
NET "pb3" LOC = "M13"; # BTN0 (active high)
NET "serialin"  LOC = "T13" | IOSTANDARD = LVCMOS33 ;
NET "serialout"  LOC = "R13" | IOSTANDARD = LVCMOS33 ;
NET "sw<0>" IOSTANDARD = LVCMOS33 ;
NET "sw<1>" IOSTANDARD = LVCMOS33 ;
NET "sw<2>" IOSTANDARD = LVCMOS33 ;
NET "sw<3>" IOSTANDARD = LVCMOS33 ;
NET "sw<4>" IOSTANDARD = LVCMOS33 ;
NET "sw<5>" IOSTANDARD = LVCMOS33 ;
NET "sw<6>" IOSTANDARD = LVCMOS33 ;
NET "sw<7>" IOSTANDARD = LVCMOS33 ;
NET "xmaddress<0>" IOSTANDARD = LVCMOS33  | SLEW = FAST ;
NET "xmaddress<10>" IOSTANDARD = LVCMOS33  | SLEW = FAST ;
NET "xmaddress<11>" IOSTANDARD = LVCMOS33  | SLEW = FAST ;
NET "xmaddress<12>" IOSTANDARD = LVCMOS33  | SLEW = FAST ;
NET "xmaddress<13>" IOSTANDARD = LVCMOS33  | SLEW = FAST ;
NET "xmaddress<14>" IOSTANDARD = LVCMOS33  | SLEW = FAST ;
NET "xmaddress<15>" IOSTANDARD = LVCMOS33  | SLEW = FAST ;
NET "xmaddress<16>" IOSTANDARD = LVCMOS33  | SLEW = FAST ;
NET "xmaddress<17>" IOSTANDARD = LVCMOS33  | SLEW = FAST ;
NET "xmaddress<1>" IOSTANDARD = LVCMOS33  | SLEW = FAST ;
NET "xmaddress<2>" IOSTANDARD = LVCMOS33  | SLEW = FAST ;
NET "xmaddress<3>" IOSTANDARD = LVCMOS33  | SLEW = FAST ;
NET "xmaddress<4>" IOSTANDARD = LVCMOS33  | SLEW = FAST ;
NET "xmaddress<5>" IOSTANDARD = LVCMOS33  | SLEW = FAST ;
NET "xmaddress<6>" IOSTANDARD = LVCMOS33  | SLEW = FAST ;
NET "xmaddress<7>" IOSTANDARD = LVCMOS33  | SLEW = FAST ;
NET "xmaddress<8>" IOSTANDARD = LVCMOS33  | SLEW = FAST ;
NET "xmaddress<9>" IOSTANDARD = LVCMOS33  | SLEW = FAST ;
NET "xmce"  LOC = "P7" | IOSTANDARD = LVCMOS33  | SLEW = FAST ; # CE1 - chip enable (active low)
NET "xmdata<0>" IOSTANDARD = LVCMOS33  | SLEW = FAST ;
NET "xmdata<10>" IOSTANDARD = LVCMOS33  | SLEW = FAST ;
NET "xmdata<11>" IOSTANDARD = LVCMOS33  | SLEW = FAST ;
NET "xmdata<12>" IOSTANDARD = LVCMOS33  | SLEW = FAST ;
NET "xmdata<13>" IOSTANDARD = LVCMOS33  | SLEW = FAST ;
NET "xmdata<14>" IOSTANDARD = LVCMOS33  | SLEW = FAST ;
NET "xmdata<15>" IOSTANDARD = LVCMOS33  | SLEW = FAST ;
NET "xmdata<1>" IOSTANDARD = LVCMOS33  | SLEW = FAST ;
NET "xmdata<2>" IOSTANDARD = LVCMOS33  | SLEW = FAST ;
NET "xmdata<3>" IOSTANDARD = LVCMOS33  | SLEW = FAST ;
NET "xmdata<4>" IOSTANDARD = LVCMOS33  | SLEW = FAST ;
NET "xmdata<5>" IOSTANDARD = LVCMOS33  | SLEW = FAST ;
NET "xmdata<6>" IOSTANDARD = LVCMOS33  | SLEW = FAST ;
NET "xmdata<7>" IOSTANDARD = LVCMOS33  | SLEW = FAST ;
NET "xmdata<8>" IOSTANDARD = LVCMOS33  | SLEW = FAST ;
NET "xmdata<9>" IOSTANDARD = LVCMOS33  | SLEW = FAST ;
NET "xmlb"  LOC = "P6" | IOSTANDARD = LVCMOS33 ; # LB1 - lower byte enable (active low)
NET "xmsend"  LOC = "K4" | IOSTANDARD = LVCMOS33  | SLEW = FAST ; # OE - output enable (active low)|
NET "xmub"  LOC = "T4" | IOSTANDARD = LVCMOS33 ; # UB1 - upper byte enable (active low)
NET "xmwrite"  LOC = "G3" | IOSTANDARD = LVCMOS33  | SLEW = FAST ; # WE - write enable (active low)
#PACE: Start of PACE Area Constraints
#PACE: Start of PACE Prohibit Constraints
CONFIG PROHIBIT = C3;
CONFIG PROHIBIT = D1;
CONFIG PROHIBIT = D2;
CONFIG PROHIBIT = E1;
CONFIG PROHIBIT = E2;
CONFIG PROHIBIT = F5;
CONFIG PROHIBIT = G2;
CONFIG PROHIBIT = G1;
CONFIG PROHIBIT = J1;
CONFIG PROHIBIT = K1;
CONFIG PROHIBIT = K2;
CONFIG PROHIBIT = M2;
CONFIG PROHIBIT = M1;
CONFIG PROHIBIT = N2;
CONFIG PROHIBIT = N1;
CONFIG PROHIBIT = P2;
CONFIG PROHIBIT = M16;
CONFIG PROHIBIT = M15;
CONFIG PROHIBIT = T14;
CONFIG PROHIBIT = P5;
CONFIG PROHIBIT = N5;
CONFIG PROHIBIT = R9;
CONFIG PROHIBIT = T10;
CONFIG PROHIBIT = N10;
CONFIG PROHIBIT = R11;
CONFIG PROHIBIT = T12;
CONFIG PROHIBIT = R12;
CONFIG PROHIBIT = R4;
#PACE: End of Constraints generated by PACE
NET "clkin" TNM_NET = "clkin";
TIMESPEC "TS_clkin" = PERIOD "clkin" 35 MHz HIGH 50 %;