Subversion Repositories dma_axi

//---------------------------------------------------------
//-- File generated by RobustVerilog parser
//-- Version: 1.0
//-- Invoked Fri Mar 25 23:36:55 2011
//--
//-- Source file: prgen_mux.v
//---------------------------------------------------------
 
 
 
 
module prgen_mux8(sel,ch_x,x);
 
   parameter                  WIDTH      = 8;
 
 
   input [3-1:0]     sel;
   input [8*WIDTH-1:0]     ch_x;
   output [WIDTH-1:0]           x;
 
 
   reg [WIDTH-1:0]              x;
 
 
   always @(/*AUTOSENSE*/ch_x or sel)
     begin
    case (sel)                                  
      3'd0 :x = ch_x[WIDTH-1+WIDTH*0:WIDTH*0];
      3'd1 :x = ch_x[WIDTH-1+WIDTH*1:WIDTH*1];
      3'd2 :x = ch_x[WIDTH-1+WIDTH*2:WIDTH*2];
      3'd3 :x = ch_x[WIDTH-1+WIDTH*3:WIDTH*3];
      3'd4 :x = ch_x[WIDTH-1+WIDTH*4:WIDTH*4];
      3'd5 :x = ch_x[WIDTH-1+WIDTH*5:WIDTH*5];
      3'd6 :x = ch_x[WIDTH-1+WIDTH*6:WIDTH*6];
      3'd7 :x = ch_x[WIDTH-1+WIDTH*7:WIDTH*7];
 
      default :                                 
        x = ch_x[WIDTH-1:0];      
    endcase                                     
     end
 
 
endmodule