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[/] [ft816float/] [trunk/] [rtl/] [verilog2/] [DFPUnpack.sv] - Rev 57

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// ============================================================================
//        __
//   \\__/ o\    (C) 2020-2021  Robert Finch, Waterloo
//    \  __ /    All rights reserved.
//     \/_//     robfinch<remove>@finitron.ca
//       ||
//
//      DPDUnpack.sv
//
// BSD 3-Clause License
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice, this
//    list of conditions and the following disclaimer.
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// 2. Redistributions in binary form must reproduce the above copyright notice,
//    this list of conditions and the following disclaimer in the documentation
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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//                                                                          
// ============================================================================

import DFPPkg::*;

module DFPUnpack128(i, o);
input DFP128 i;
output DFP128U o;

assign o.sign = i.sign;
assign o.exp = {i.combo[4:3]==2'b11 ? i.combo[2:1] : i.combo[4:3],i.expc};
assign o.nan = i.combo==5'b11111;
assign o.qnan = i.combo==5'b11111 && i.expc[11]==1'b0;
assign o.snan = i.combo==5'b11111 && i.expc[11]==1'b1;
assign o.infinity = i.combo==5'b11110;
DPDDecodeN #(.N(11)) u1 (i.sigc, o.sig[131:0]);
assign o.sig[135:132] = i.combo[4:3]==2'b11 ? {3'b100,i.combo[0]} : {1'b0,i.combo[2:0]};
endmodule

module DFPUnpack64(i, o);
input DFP64 i;
output DFP64U o;

assign o.sign = i.sign;
assign o.exp = {i.combo[4:3]==2'b11 ? i.combo[2:1] : i.combo[4:3],i.expc};
assign o.nan = i.combo==5'b11111;
assign o.qnan = i.combo==5'b11111 && i.expc[7]==1'b0;
assign o.snan = i.combo==5'b11111 && i.expc[7]==1'b1;
assign o.infinity = i.combo==5'b11110;
DPDDecodeN #(.N(5)) u1 (i.sigc, o.sig[59:0]);
assign o.sig[63:60] = i.combo[4:3]==2'b11 ? {3'b100,i.combo[0]} : {1'b0,i.combo[2:0]};

endmodule

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