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[/] [lattice6502/] [ghdl/] [usrcode.asm] - Rev 7
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;
cpu 6502
PAGE 40,120
; ****************************************************************************************
; This is intended to be the template for the user code ****
; ****************************************************************************************
; These flags are used for conditional assembly.
; Just select the instructions to be tested.
shiftfg equ 0
intfg equ 0
Xfg equ 0
Yfg equ 0
AddXfg equ 0
AddYfg equ 1
; ********************************************************
return equ $fff6 ;jump to fcoo to return control and restart
sendtxt equ $fff0
hex2txt equ $fff3
irq equ $4002
nmi equ $4003
break equ $10
intrpt equ $04
* = $0010
point dw table2
dw table2 + 1
dw table2 + 2
dw table2 + 3
dw table2 + 4
dw table2 + 5
dw table2 + 6
dw table2 + 7
dw table2 + 8
;
table3 db $00
bittbl1 db $1, $2, $4, $8, $10, $20, $40, $80
nottbl1 db $fe, $fd, $fa, $f7, $ef, $df, $bf, $7f
* = $290 ;user code starts at $290
main clc
clv
cli
IF shiftfg
; *****************************************************
; Shift instruction to be tested follows
; Table2 abs and abs,x
; Table2 zero and zero,x
ldy #$a5
ldx #$03
lda #$5a
sta table2 + 3 ;ror and rol test
lda #$00
clc
rol table2,x
clc
rol table2 + 3
sec
rol table2 + 3
sec
rol table2,x
lda table2 + 3
sta table3 + 3 ;test asl lsr
lda #$00
lsr table3,x
lsr table3 + 3
lsr table3 + 3
lsr table3,x
lda table3 + 3
; *****************************************************
lsr ;test all shift instruction implied
lsr ;ie shift reg_a
lsr
lsr
ENDC
; *****************************************************
IF intfg
; *****************************************************
; Testing of Interrupts
; Comment in or out interrupt as required
lda #$fe
sta nmi
; lda #$fe
; sta irq
; brk
; ****************************************************
ENDC
IF Xfg
; *****************************************************
ldx #$03 ;lda & eor test with reg_x
ldy #1 ;First test zero and zero,x
lda bittbl1 + 3
eor bittbl1,x ;should be 0
bne failtst
ldy #2
lda bittbl1,x
eor bittbl1 + 3
bne failtst
ldx #$04
ldy #3 ;then abs
lda bittbl2 + 4
eor bittbl2,x ;should be 0
bne failtst
ldy #4
lda bittbl2,x
eor bittbl2 + 4
bne failtst
ldy #5 ;ora & and test with reg_x
ldx #$05 ;First test zero and zero,x
ora bittbl1 +5 ;set a bit
and nottbl1,x ;clear it
bne failtst
ldy #6
ora bittbl1,x
and nottbl1 + 5
bne failtst
ldy #7 ;again using abs and abs,x
ldx #$05
ora bittbl2 + 5 ;set a bit
and nottbl2,x ;clear it
bne failtst
ldy #8
ora bittbl2,x
and nottbl2 + 5
bne failtst
passx lda #"P"
jsr sendtxt
lda #"a"
jsr sendtxt
lda #"s"
jsr sendtxt
lda #"s"
jsr sendtxt
lda #" "
jsr sendtxt
lda #"X"
jsr sendtxt
lda #"\r"
jsr sendtxt
jmp (return)
ENDC
; *****************************************************
IF Yfg
; *****************************************************
ldy #$03 ;lda & eor test with reg_x
ldx #1 ;First test zero and zero,y
lda bittbl1 + 3
eor bittbl1,y ;should be 0
bne failtst
ldx #2
lda bittbl1,y
eor bittbl1 + 3
bne failtst
ldy #$04
ldx #3 ;then abs
lda bittbl2 + 4
eor bittbl2,y ;should be 0
bne failtst
ldx #4
lda bittbl2,y
eor bittbl2 + 4
bne failtst
ldx #5 ;ora & and test with reg_x
ldy #$05 ;First test zero and zero,y
ora bittbl1 +5 ;set a bit
and nottbl1,y ;clear it
bne failtst
ldx #6
ora bittbl1,y
and nottbl1 + 5
bne failtst
ldx #7 ;again using abs and abs,y
ldy #$05
ora bittbl2 + 5 ;set a bit
and nottbl2,y ;clear it
bne failtst
ldx #8
ora bittbl2,y
and nottbl2 + 5
bne failtst
passy lda #"P"
jsr sendtxt
lda #"a"
jsr sendtxt
lda #"s"
jsr sendtxt
lda #"s"
jsr sendtxt
lda #" "
jsr sendtxt
lda #"Y"
jsr sendtxt
lda #"\r"
jsr sendtxt
jmp (return)
ENDC
; *****************************************************
IF AddXfg
; *****************************************************
ldx #$03 ;adc & sbc test with reg_x
ldy #1 ;First test zero & zero,x
clc
lda #0
adc bittbl1 + 3
sbc bittbl1,x ;should be 0
bne failtst
ldy #2
clc
lda #0
adc bittbl1,x
sbc bittbl1 + 3
bne failtst
ldx #$04
ldy #3 ;then abs
clc
lda #0
adc bittbl2 + 4
sbc bittbl2,x ;should be 0
bne failtst
ldy #4
clc
lda #0
adc bittbl2,x
sbc bittbl2 + 4
bne failtst
ldy #5 ;ora & cmp test with reg_x
ldx #$05 ;First test zero & zero,x
ora bittbl1 +5 ;set a bit
cmp bittbl1,x ;clear it
bne failtst
ldy #6
ora bittbl1,x
cmp bittbl1 + 5
bne failtst
ldy #7 ;again using abs cmp abs,x
ldx #$05
ora bittbl2 + 5 ;set a bit
cmp bittbl2,x ;clear it
bne failtst
ldy #8
ora bittbl2,x
cmp bittbl2 + 5
bne failtst
passx lda #"P"
jsr sendtxt
lda #"a"
jsr sendtxt
lda #"s"
jsr sendtxt
lda #"s"
jsr sendtxt
lda #" "
jsr sendtxt
lda #"A"
jsr sendtxt
lda #"\r"
jsr sendtxt
jmp (return)
ENDC
IF AddYfg
; *****************************************************
ldy #$03 ;adc & sbc test with reg_x
ldx #1 ;First test zero & zero,y
clc
lda #0
adc bittbl1 + 3
sbc bittbl1,y ;should be 0
bne failtst
ldx #2
clc
lda #0
adc bittbl1,y
sbc bittbl1 + 3
bne failtst
ldy #$04
ldx #3 ;then abs
clc
lda #0
adc bittbl2 + 4
sbc bittbl2,y ;should be 0
bne failtst
ldx #4
clc
lda #0
adc bittbl2,y
sbc bittbl2 + 4
bne failtst
ldy #5 ;ora & cmp test with reg_x
ldx #$05 ;First test zero & zero,y
ora bittbl1 +5 ;set a bit
cmp bittbl1,y ;clear it
bne failtst
ldx #6
ora bittbl1,y
cmp bittbl1 + 5
bne failtst
ldx #7 ;again using abs cmp abs,y
ldy #$05
ora bittbl2 + 5 ;set a bit
cmp bittbl2,y ;clear it
bne failtst
ldx #8
ora bittbl2,y
cmp bittbl2 + 5
bne failtst
passx lda #"P"
jsr sendtxt
lda #"a"
jsr sendtxt
lda #"s"
jsr sendtxt
lda #"s"
jsr sendtxt
lda #" "
jsr sendtxt
lda #"C"
jsr sendtxt
lda #"\r"
jsr sendtxt
jmp (return)
ENDC
failtst php
pha
txa
pha
tya
pha
lda #"Y" ;Display Y register
jsr sendtxt
lda #"="
jsr sendtxt
pla
jsr hex2txt
lda #" "
jsr sendtxt
lda #"X" ;Display X register
jsr sendtxt
lda #"="
jsr sendtxt
pla
jsr hex2txt
lda #" "
jsr sendtxt
lda #"A" ;Display A register
jsr sendtxt
lda #"="
jsr sendtxt
pla
jsr hex2txt
lda #" "
jsr sendtxt
lda #"C" ;Display carry
jsr sendtxt
lda #"="
jsr sendtxt
plp
php
bcc clear1
lda #"1"
jmp cont1
clear1 lda #"0"
cont1 jsr sendtxt
lda #" "
jsr sendtxt
lda #"V" ;Display overflow
jsr sendtxt
lda #"="
jsr sendtxt
plp
php
bvc clear2
lda #"1"
jmp cont2
clear2 lda #"0"
cont2 jsr sendtxt
lda #" "
jsr sendtxt
lda #"Z" ;Display zero
jsr sendtxt
lda #"="
jsr sendtxt
plp
php
beq clear3
lda #"0"
jmp cont3
clear3 lda #"1"
cont3 jsr sendtxt
lda #" "
jsr sendtxt
lda #"M" ;Display minus
jsr sendtxt
lda #"="
jsr sendtxt
plp
php
bpl clear4
lda #"1"
jmp cont4
clear4 lda #"0"
cont4 jsr sendtxt
lda #" "
jsr sendtxt
lda #"I" ;Display Interrupt flag
jsr sendtxt
lda #"="
jsr sendtxt
pla
pha
and #intrpt
beq clear5
lda #"1"
jmp cont5
clear5 lda #"0"
cont5 jsr sendtxt
lda #" "
jsr sendtxt
lda #"B" ;Display Break flag
jsr sendtxt
lda #"="
jsr sendtxt
pla
and #break
beq clear6
lda #"1"
jmp cont6
clear6 lda #"0"
cont6 jsr sendtxt
lda #"\r"
jsr sendtxt
jmp (return)
bittbl2 db $1, $2, $4, $8, $10, $20, $40, $80
nottbl2 db $fe, $fd, $fa, $f7, $ef, $df, $bf, $7f
* = $03e0
table2 db 0
db 1
db 2
db 3
db 4
db 5
db 6
db 7
db 8
db 9
db 10
db 11
db 12
db 13
db 14
db 15
* = $07ff
nop ;I need this to mark end of bin code.
; end of program