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<center><font size=+3><b>OPENCORES.ORG</b></font>
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<font SIZE="2">-- File Name : dffres.vbe --
<p>-- Modul Name : Standar Cell for D Flip-flop using Reset --</p>
<p>-- Purpose : To be used by SCMAP --</p>
<p>-- Author : Martadinata A --</p>
<p>-- Date : 14 November 2000 --</p>
<p>ENTITY dffres IS</p>
<p>PORT (</p>
<p>input : in bit;</p>
<p>clk : in bit;</p>
<p>reset : in bit;</p>
<p>output : out bit;</p>
<p>vdd : in bit;</p>
<p>vss : in bit</p>
<p>);</p>
<p>END dffres;</p>
<p>ARCHITECTURE VBE OF dffres IS</p>
<p>SIGNAL dffres_reg : REG_BIT REGISTER;</p>
<p>&nbsp;</p>
<p>BEGIN</p>
<p>ASSERT ((vdd and not (vss)) = '1')</p>
<p>REPORT &quot;power supply is missing on dffres&quot;</p>
<p>SEVERITY WARNING;</p>
<p>&nbsp;</p>
<p>&nbsp;</p>
<p>dff : BLOCK ( ( clk AND NOT (clk'STABLE)) = '1' )</p>
<p>BEGIN</p>
<p>dffres_reg &lt;= GUARDED '1' WHEN (reset = '1') else NOT input;</p>
<p>END BLOCK dff;</p>
<p>&nbsp;</p>
<p>output &lt;= NOT dffres_reg ;</p>
<p>END ;</p>
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<b><font size=+1>Maintainers and Authors :</font></b>
<p>LCD Driver development team
<p>current members:
 
<ul>
<li>
<a href="mailto:marta@vlsi.itb.ac.id">Hendra Gunawan</a></li>
 
<li>
<a href="mailto:sigit@students.ee.itb.ac.id">Nurhadi Wiyono</a></li>
 
<li>
<a href="mailto:sigit@students.ee.itb.ac.id">Kharisma Sinung P</a></li>
 
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<b><font size=+1>Mailing-list:</font></b>
<ul><a href="mailto:cores@opencores.org_NOSPAM">cores@opencores.org_NOSPAM</a></ul>
 
 
 
 
 
 
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<td align=left><i><small>Last modified on Sunday, 17-Sep-2000 03:58:04 JAVT</i></td>
<td align=right><i><small>Copyright © 1999-2000 OPENCORES.ORG. All rights reserved.</td>
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