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[/] [m16c5x/] [trunk/] [Code/] [MPLAB/] [M16C5x_Tst4.lst] - Rev 3
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MPASM 5.50 M16C5X_TST4.ASM 12-5-2013 8:25:30 PAGE 1LOC OBJECT CODE LINE SOURCE TEXTVALUE00001 ;*******************************************************************************00002 ; M16C5x_Tst4.ASM00003 ;00004 ;00005 ; This program tests the receive function of the SSP UART.00006 ;00007 ; The UART is polled to determine if there is a Rx character available. If a00008 ; Rx character is available, the character is read from the UART RHR (Rx FIFO)00009 ; into a temporary location in the register file. The received character is00010 ; checked for upper/lower case. If it is an upper case character, the charac-00011 ; ter is converted to lower case. If it is a lower case character, the charac-00012 ; ter is converter to upper case. After conversion, the character is sent to00013 ; the UART's Tx FIFO.00014 ;00015 ;*******************************************************************************0001600017 LIST P=16F59, R=DEC0001800019 ;-------------------------------------------------------------------------------00020 ; Set ScratchPadRam here. If you are using a PIC16C5X device, use:00021 ;ScratchPadRam EQU 0x1000022 ; Otherwise, use:00023 ;ScratchPadRam EQU 0x2000024 ;-------------------------------------------------------------------------------0002500000010 00026 ScratchPadRAM EQU 0x100002700028 ;-------------------------------------------------------------------------------00029 ; Variables00030 ;-------------------------------------------------------------------------------0003100000000 00032 INDF EQU 0 ; Indirect Register File Access Location00000001 00033 Tmr0 EQU 1 ; Timer 000000002 00034 PCL EQU 2 ; Low Byte Program Counter00000003 00035 Status EQU 3 ; Processor Status Register00000004 00036 FSR EQU 4 ; File Select Register00000005 00037 PortA EQU 5 ; I/O Port A Address00000006 00038 PortB EQU 6 ; I/O Port B Address00000007 00039 PortC EQU 7 ; I/O Port C Address000400000000A 00041 SPI_CR EQU 0x0A ; SPI Control Register Shadow/Working Copy0000000B 00042 SPI_SR EQU 0x0B ; SPI Status Register Shadow/Working Copy0000000C 00043 SPI_DIO_H EQU 0x0C ; 1st byte To/From from SPI Rcv FIFO0000000D 00044 SPI_DIO_L EQU 0x0D ; 2nd byte To/From from SPI Rcv FIFO000450000000F 00046 DlyCntr EQU 0x0F ; General Purpose Delay Counter Register0004700048 ;-------------------------------------------------------------------------------00049 ; SPI Control Register Bit Map (M16C5x TRIS A register)00050 ;-------------------------------------------------------------------------------0005100000000 00052 SPI_CR_REn EQU 0 ; Enable MISO Data Capture00000001 00053 SPI_CR_SSel EQU 1 ; Slv Select: 0 - Ext SEEPROM, 1 - SSP_UARTMPASM 5.50 M16C5X_TST4.ASM 12-5-2013 8:25:30 PAGE 2LOC OBJECT CODE LINE SOURCE TEXTVALUE00000002 00054 SPI_CR_MD0 EQU 2 ; SPI Md[1:0]: UART - Mode 0 or Mode 300000003 00055 SPI_CR_MD1 EQU 3 ; SEEPROM - Mode 0 or Mode 300000004 00056 SPI_CR_BR0 EQU 4 ; SPI Baud Rate: 0 - Clk/2, ... Clk/12800000005 00057 SPI_CR_BR1 EQU 5 ; Default: 110 - Clk/6400000006 00058 SPI_CR_BR2 EQU 6 ; Clk/2 29.4912 MHz00000007 00059 SPI_CR_DIR EQU 7 ; SPI Shift Direction: 0 - MSB, 1 - LSB0006000061 ;-------------------------------------------------------------------------------00062 ; SPI Status Register Bit Map (M16C5x Port A input)00063 ;-------------------------------------------------------------------------------0006400000000 00065 SPI_SR_TF_EF EQU 0 ; SPI TF Empty Flag (All Data Transmitted)00000001 00066 SPI_SR_TF_FF EQU 1 ; SPI TF Full Flag (Possible Overrun Error)00000002 00067 SPI_SR_RF_EF EQU 2 ; SPI RF Empty Flag (Data Available)00000003 00068 SPI_SR_RF_FF EQU 3 ; SPI RF Full Flag (Possible Overrun Error)00000004 00069 SPI_SR_DE EQU 4 ; SSP UART RS-485 Drive Enable00000005 00070 SPI_SR_RTS EQU 5 ; SSP UART Request-To-Send Modem Control Out00000006 00071 SPI_SR_CTS EQU 6 ; SSP UART Clear-To-Send Modem Control Input00000007 00072 SPI_SR_IRQ EQU 7 ; SSP UART Interrupt Request Output0007300074 ;-------------------------------------------------------------------------------00075 ; SSP UART Control Register (RA = 000) (16-bits Total) (Read-Write)00076 ;-------------------------------------------------------------------------------0007700000003 00078 UART_CR_RA EQU 3 ; Bits 7:5 SPI_DIO_H00000001 00079 UART_CR_WnR EQU 1 ; Bit 4 SPI_DIO_H, if Set Wr, else Rd00000002 00080 UART_CR_MD EQU 2 ; Bits 3:2 SPI_DIO_H, UART Mode: 232/48500000001 00081 UART_CR_RTSo EQU 1 ; Bit 1 SPI_DIO_H, Request-To-Send Output00000001 00082 UART_CR_IE EQU 1 ; Bit 0 SPI_DIO_H, Interrupt Enable00000004 00083 UART_CR_FMT EQU 4 ; Bits 7:4 SPI_DIO_L, Serial Frame Format00000004 00084 UART_CR_BAUD EQU 4 ; Bits 3:0 SPI_DIO_L, Serial Baud Rate0008500086 ;-------------------------------------------------------------------------------00087 ; SSP UART Status Register (RA = 001) (16-bits Total) (Read-Only)00088 ;-------------------------------------------------------------------------------0008900000003 00090 UART_SR_RA EQU 3 ; Bits 7:5 SPI_DIO_H00000001 00091 UART_SR_WnR EQU 1 ; Bit 4 SPI_DIO_H, Ignored if Set00000002 00092 UART_SR_MD EQU 2 ; Bits 3:2 SPI_DIO_H, UART Mode00000001 00093 UART_SR_RTSi EQU 1 ; Bit 1 SPI_DIO_H, RTS signal level00000001 00094 UART_SR_CTSi EQU 1 ; Bit 0 SPI_DIO_H, CTS signal level00000002 00095 UART_SR_RS EQU 2 ; Bits 7:6 SPI_DIO_L, Rx FIFO State00000002 00096 UART_SR_TS EQU 2 ; Bits 5:4 SPI_DIO_L, Tx FIFO State00000001 00097 UART_SR_iRTO EQU 1 ; Bit 3 SPI_DIO_L, Rcv Timeout Interrupt00000001 00098 UART_SR_iRDA EQU 1 ; Bit 2 SPI_DIO_L, Rcv Data Available00000001 00099 UART_SR_iTHE EQU 1 ; Bit 1 SPI_DIO_L, Tx FIFO Half Empty00000001 00100 UART_SR_iTFE EQU 1 ; Bit 0 SPI_DIO_L, Tx FIFO Empty0010100102 ;-------------------------------------------------------------------------------00103 ; SSP UART Baud Rate Register (RA = 001) (16-bits Total) (Write-Only)00104 ;-------------------------------------------------------------------------------0010500000004 00106 UART_BR_PS EQU 4 ; Bits 11:8 : Baud rate prescaler - (M - 1)MPASM 5.50 M16C5X_TST4.ASM 12-5-2013 8:25:30 PAGE 3LOC OBJECT CODE LINE SOURCE TEXTVALUE00000008 00107 UART_BR_Div EQU 8 ; Bits 7:0 : Baud rate divider - (N - 1)0010800109 ;-------------------------------------------------------------------------------00110 ; SSP UART Transmit Data Register (RA = 010) (16-bits Total) (Write-Only)00111 ;-------------------------------------------------------------------------------0011200000003 00113 UART_TD_RA EQU 3 ; Bits 7:5 SPI_DIO_H00000001 00114 UART_TD_WnR EQU 1 ; Bit 4 SPI_DIO_H, Ignored if Not Set00000001 00115 UART_TD_TFC EQU 1 ; Bit 3 SPI_DIO_H, Transmit FIFO Clr/Rst00000001 00116 UART_TD_RFC EQU 1 ; Bit 2 SPI_DIO_H, Receive FIFO Clr/Rst00000001 00117 UART_TD_HLD EQU 1 ; Bit 1 SPI_DIO_H, Tx delayed if Set00000001 00118 UART_TD_Rsvd EQU 1 ; Bit 0 SPI_DIO_H, Reserved00000008 00119 UART_TD_DO EQU 8 ; Bits 7:0 SPI_DIO_L, Tx Data: 7 or 8 bits0012000121 ;-------------------------------------------------------------------------------00122 ; SSP UART Recieve Data Register (RA = 011) (16-bits Total) (Read-Only)00123 ;-------------------------------------------------------------------------------0012400000003 00125 UART_RD_RA EQU 3 ; Bits 7:5 SPI_DIO_H00000001 00126 UART_RD_WnR EQU 1 ; Bit 4 SPI_DIO_H, Ignored if Set00000001 00127 UART_RD_TRDY EQU 1 ; Bit 3 SPI_DIO_H, Transmit Ready00000001 00128 UART_RD_RRDY EQU 1 ; Bit 2 SPI_DIO_H, Receive Ready00000001 00129 UART_RD_RTO EQU 1 ; Bit 1 SPI_DIO_H, Receive Time Out Det.00000001 00130 UART_RD_RERR EQU 1 ; Bit 0 SPI_DIO_H, Receive Error Detect00000008 00131 UART_RD_DI EQU 8 ; Bits 7:0 SPI_DIO_L, Rx Data: 7 or 8 bits0013200133 ;-------------------------------------------------------------------------------00134 ; Set Reset/WDT Vector00135 ;-------------------------------------------------------------------------------0013607FF 00137 ORG 0x7FF00138Message[306]: Crossing page boundary -- ensure page bits are set.07FF 0A00 00139 GOTO Start0014000141 ;-------------------------------------------------------------------------------00142 ; Main Program00143 ;-------------------------------------------------------------------------------001440000 00145 ORG 0x0000014600147 ;-------------------------------------------------------------------------------001480000 0CFF 00149 Start MOVLW 0xFF ; Initialize TRIS A and TRIS B to all 1s0001 0005 00150 TRIS 50002 0006 00151 TRIS 6001520003 0C1E 00153 MOVLW 0x1E ; Load W with SPI CR Initial Value0004 002A 00154 MOVWF SPI_CR ; Save copy of value0005 0007 00155 TRIS 7 ; Initialize SPI CR001560006 0C08 00157 MOVLW 0x08 ; Delay before using SPI I/F0007 002F 00158 MOVWF DlyCntrMPASM 5.50 M16C5X_TST4.ASM 12-5-2013 8:25:30 PAGE 4LOC OBJECT CODE LINE SOURCE TEXTVALUE0008 02EF 00159 SPI_Init_Dly DECFSZ DlyCntr,10009 0A08 00160 GOTO SPI_Init_Dly00161000A 0C13 00162 MOVLW 0x13 ; UART CR (Hi): RS232 2-wire, RTS, IE000B 0027 00163 MOVWF PortC ; Output to SPI and to UART000C 0C00 00164 MOVLW 0x00 ; UART CR (Lo) Set 8N1000D 0027 00165 MOVWF PortC00166000E 0C30 00167 MOVLW 0x30 ; UART BRR (Hi) PS[3:0]000F 0027 00168 MOVWF PortC ; Output to SPI and to UART0010 0C01 00169 MOVLW 0x01 ; UART BRR (Lo) Div[7:0] (921.6k baud)0011 0027 00170 MOVWF PortC001710012 0705 00172 WaitLp1 BTFSS PortA,SPI_SR_TF_EF ; Wait for UART UCR, BRR output0013 0A12 00173 GOTO WaitLp10017400175 ;-------------------------------------------------------------------------------001760014 050A 00177 Rd_UART_RF BSF SPI_CR,SPI_CR_REn ; Enable SPI IF Capture MISO data001780015 020A 00179 MOVF SPI_CR,0 ; Load SPI CR Shadow0016 0007 00180 TRIS 7 ; Enable SPI I/F Receive Function001810017 0C60 00182 Poll_UART_RF MOVLW 0x60 ; UART RF (Hi) RA = 3, WnR = 00018 0027 00183 MOVWF PortC ; Output to SPI and to UART0019 0CFF 00184 MOVLW 0xFF ; UART RD (Lo) 0xFF = "Del" or 0x00 (Nul)001A 0027 00185 MOVWF PortC ; Output to SPI and to UART00186001B 0705 00187 WaitLp2 BTFSS PortA,SPI_SR_TF_EF ; Wait for SPI TF to be empty001C 0A1B 00188 GOTO WaitLp200189001D 0207 00190 MOVF PortC,0 ; Read SPI Receive FIFO001E 002C 00191 MOVWF SPI_DIO_H ; Store UART SR (hi byte)00192001F 0645 00193 WaitLp3 BTFSC PortA,SPI_SR_RF_EF ; Wait for UART Return Data (Hi)0020 0A1F 00194 GOTO WaitLp3001950021 0207 00196 MOVF PortC,0 ; Read SPI Receive FIFO0022 002D 00197 MOVWF SPI_DIO_L ; Store UART SR (hi byte)0019800199 ;-------------------------------------------------------------------------------002000023 074C 00201 Test_RD BTFSS SPI_DIO_H,2 ; Test RRDY bit, if Set, process RD0024 0A17 00202 GOTO Poll_UART_RF ; Loop until character received0025 060C 00203 BTFSC SPI_DIO_H,0 ; Test RD for error; if Set, discard0026 0A17 00204 GOTO Poll_UART_RF ; Loop until error-free character rcvd0020500206 ;-------------------------------------------------------------------------------002070027 06ED 00208 Tst_ExtASCII BTFSC SPI_DIO_L,7 ; Ignore Extended ASCII characters0028 0A3B 00209 GOTO Wr_UART_TF ; Transmit Extended ASCII as is002100029 0C7B 00211 Tst_LowerCase MOVLW 0x7B ; Test against 'z' + 1MPASM 5.50 M16C5X_TST4.ASM 12-5-2013 8:25:30 PAGE 5LOC OBJECT CODE LINE SOURCE TEXTVALUE002A 008D 00212 SUBWF SPI_DIO_L,0 ; Compare RD against 'z'002B 0603 00213 BTFSC Status,0 ; If Status.C, RD > 'z'002C 0A3B 00214 GT_LowerCase GOTO Wr_UART_TF ; not upper or lower case, send data002D 0C61 00215 MOVLW 0x61 ; Load 'a'002E 008D 00216 SUBWF SPI_DIO_L,0 ; Compare RD against 'a'002F 0603 00217 BTFSC Status,0 ; Carry Set if RD >= 'a'0030 0A39 00218 Is_LowerCase GOTO ChangeCase ; Is upper case, change case to lower002190031 0C5B 00220 Tst_UpperCase MOVLW 0x5B ; Test against 'Z' + 10032 008D 00221 SUBWF SPI_DIO_L,0 ; Compare RD against 'Z'0033 0603 00222 BTFSC Status,0 ; Carry set if Rd > 'Z'0034 0A3B 00223 Not_UpperLower GOTO Wr_UART_TF ; Not lower case0035 0C41 00224 MOVLW 0x41 ; Load 'A'0036 008D 00225 SUBWF SPI_DIO_L,0 ; Compare against 'A'0037 0703 00226 BTFSS Status,0 ; Carry set if RD >= 'A'0038 0A3B 00227 LT_UpperCase GOTO Wr_UART_TF ; Tests complete, send data002280039 00229 Is_UpperCase0039 0C20 00230 ChangeCase MOVLW 0x20 ; Change case: LC to UC, or UC to LC003A 01AD 00231 XORWF SPI_DIO_L,10023200233 ;-------------------------------------------------------------------------------00234003B 040A 00235 Wr_UART_TF BCF SPI_CR,SPI_CR_REn ; Disable SPI IF Capture MISO data00236003C 020A 00237 MOVF SPI_CR,0 ; Load SPI CR Shadow003D 0007 00238 TRIS 7 ; Enable SPI I/F Receive Function00239003E 0C50 00240 MOVLW 0x50 ; UART TF (Hi) RA = 2, WnR = 1003F 0027 00241 MOVWF PortC ; Output to SPI and to UART0040 020D 00242 MOVF SPI_DIO_L,0 ; Read data to transmit0041 0027 00243 MOVWF PortC ; Output to SPI TF and to UART002440042 0705 00245 WaitLp4 BTFSS PortA,SPI_SR_TF_EF ; Wait for SPI TF to be empty0043 0A42 00246 GOTO WaitLp4002470044 0A14 00248 GOTO Rd_UART_RF ; Loop Forever, send 0x55 continously0024900250 ;-------------------------------------------------------------------------------0025100252 ENDMPASM 5.50 M16C5X_TST4.ASM 12-5-2013 8:25:30 PAGE 6SYMBOL TABLELABEL VALUEChangeCase 00000039DlyCntr 0000000FFSR 00000004GT_LowerCase 0000002CINDF 00000000Is_LowerCase 00000030Is_UpperCase 00000039LT_UpperCase 00000038Not_UpperLower 00000034PCL 00000002Poll_UART_RF 00000017PortA 00000005PortB 00000006PortC 00000007Rd_UART_RF 00000014SPI_CR 0000000ASPI_CR_BR0 00000004SPI_CR_BR1 00000005SPI_CR_BR2 00000006SPI_CR_DIR 00000007SPI_CR_MD0 00000002SPI_CR_MD1 00000003SPI_CR_REn 00000000SPI_CR_SSel 00000001SPI_DIO_H 0000000CSPI_DIO_L 0000000DSPI_Init_Dly 00000008SPI_SR 0000000BSPI_SR_CTS 00000006SPI_SR_DE 00000004SPI_SR_IRQ 00000007SPI_SR_RF_EF 00000002SPI_SR_RF_FF 00000003SPI_SR_RTS 00000005SPI_SR_TF_EF 00000000SPI_SR_TF_FF 00000001ScratchPadRAM 00000010Start 00000000Status 00000003Test_RD 00000023Tmr0 00000001Tst_ExtASCII 00000027Tst_LowerCase 00000029Tst_UpperCase 00000031UART_BR_Div 00000008UART_BR_PS 00000004UART_CR_BAUD 00000004UART_CR_FMT 00000004UART_CR_IE 00000001UART_CR_MD 00000002UART_CR_RA 00000003UART_CR_RTSo 00000001UART_CR_WnR 00000001MPASM 5.50 M16C5X_TST4.ASM 12-5-2013 8:25:30 PAGE 7SYMBOL TABLELABEL VALUEUART_RD_DI 00000008UART_RD_RA 00000003UART_RD_RERR 00000001UART_RD_RRDY 00000001UART_RD_RTO 00000001UART_RD_TRDY 00000001UART_RD_WnR 00000001UART_SR_CTSi 00000001UART_SR_MD 00000002UART_SR_RA 00000003UART_SR_RS 00000002UART_SR_RTSi 00000001UART_SR_TS 00000002UART_SR_WnR 00000001UART_SR_iRDA 00000001UART_SR_iRTO 00000001UART_SR_iTFE 00000001UART_SR_iTHE 00000001UART_TD_DO 00000008UART_TD_HLD 00000001UART_TD_RA 00000003UART_TD_RFC 00000001UART_TD_Rsvd 00000001UART_TD_TFC 00000001UART_TD_WnR 00000001WaitLp1 00000012WaitLp2 0000001BWaitLp3 0000001FWaitLp4 00000042Wr_UART_TF 0000003B__16F59 00000001MEMORY USAGE MAP ('X' = Used, '-' = Unused)0000 : XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX0040 : XXXXX----------- ---------------- ---------------- ----------------07C0 : ---------------- ---------------- ---------------- ---------------XAll other memory blocks unused.Program Memory Words Used: 70Program Memory Words Free: 1978Errors : 0Warnings : 0 reported, 0 suppressedMessages : 1 reported, 0 suppressed