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https://opencores.org/ocsvn/mips_enhanced/mips_enhanced/trunk
Subversion Repositories mips_enhanced
[/] [mips_enhanced/] [trunk/] [grlib-gpl-1.0.19-b3188/] [designs/] [leon3-gr-xc3s-1500/] [default.sdc] - Rev 2
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# Synplicity, Inc. constraint file
# /home/jiri/ibm/vhdl/grlib/boards/gr-xc3s-1500/default.sdc
# Written on Thu May 11 15:07:16 2006
# by Synplify Pro, 7.1.1 Scope Editor
#
# Clocks
#
#define_clock -name {clk} -freq 50.000 -route 5.0 -clockgroup default_clkgroup
define_clock -name {rxclki} -freq 100.000 -route 2.0 -clockgroup rxclki_clkgroup
define_clock -name {txclk} -freq 100.000 -route 2.0 -clockgroup txclk_clkgroup
define_clock -name {erx_clk} -freq 25.000 -route 5.0 -clockgroup erx_clkgroup
define_clock -name {etx_clk} -freq 25.000 -route 5.0 -clockgroup etx_clkgroup
define_clock -name {usb_clkout} -freq 60.000 -route 4.0 -clockgroup usb_clkgroup
define_clock -name {clk50} -freq 50.000 -route 4.0 -clockgroup vga_clkgroup
define_clock -name {ethclk} -freq 25.000 -route 4.0 -clockgroup eth_clkgroup
define_clock -name {clk3} -freq 25.000 -route 2.0 -clockgroup default_clkgroup
#
# Inputs/Outputs
#
define_output_delay -disable -default 10.00 -improve 0.00 -route 0.00 -ref clk:r
define_input_delay -disable -default 10.00 -improve 0.00 -route 0.00 -ref clk:r
define_output_delay 8.00 -improve 0.00 -route 0.00 -ref {usb_clkout:r}
define_input_delay 8.00 -improve 0.00 -route 0.00 -ref {usb_clkout:r}
#
# Registers
#
#
# Multicycle Path
#
#
# False Path
#
#
# Attributes
#
define_global_attribute syn_useioff {1}
#
# Other Constraints
#