URL
https://opencores.org/ocsvn/mips_enhanced/mips_enhanced/trunk
Subversion Repositories mips_enhanced
[/] [mips_enhanced/] [trunk/] [grlib-gpl-1.0.19-b3188/] [designs/] [leon3-gr-xc3s-1500/] [modelsim.do] - Rev 2
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vsim -quiet work.testbenchview waveadd wave sim:/testbench/cpu/l3/cpu__0/u0/rf0/*add wave sim:/testbench/cpu/l3/cpu__0/u0/p0/m0/c0/icache0/*add wave sim:/testbench/cpu/l3/cpu__0/u0/p0/m0/c0/dcache0/*add wave sim:/testbench/cpu/l3/cpu__0/u0/p0/mips/*add wave sim:/testbench/cpu/l3/cpu__0/u0/p0/mips/e1/*add wave sim:/testbench/cpu/l3/cpu__0/u0/p0/mips/e1/decoder_pipe/*add wave sim:/testbench/cpu/l3/cpu__0/u0/p0/mips/e1/iRF_stage/*add wave sim:/testbench/cpu/l3/cpu__0/u0/p0/mips/e1/iforward/*add wave sim:/testbench/cpu/l3/cpu__0/u0/p0/mips/e1/iexec_stage/*add wave sim:/testbench/cpu/l3/cpu__0/u0/p0/mips/e1/ihazard_unit/*run -all