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[/] [mod_mult_exp/] [trunk/] [rtl/] [vhdl/] [mod_exp/] [blockMemory64/] [coregen.cgp] - Rev 5

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SET busformat = BusFormatAngleBracketNotRipped
SET designentry = VHDL
SET device = xc3s500e
SET devicefamily = spartan3e
SET flowvendor = Other
SET package = fg320
SET speedgrade = -5
SET verilogsim = false
SET vhdlsim = true

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