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[/] [neorv32/] [trunk/] [docs/] [attrs.adoc] - Rev 65
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:author: Dipl.-Ing. Stephan Nolting:email: stnolting@gmail.com:keywords: neorv32, risc-v, riscv, fpga, soft-core, vhdl, microcontroller, cpu, soc, processor, gcc, openocd, gdb:description: A size-optimized, customizable and open-source full-scale 32-bit RISC-V soft-core CPU and SoC written in platform-independent VHDL.:revnumber: v1.6.2:doctype: book:sectnums::stem::reproducible::listing-caption: Listing:toclevels: 4:title-logo-image: neorv32_logo_dark.png[pdfwidth=6.25in,align=center]:favicon: img/icon.png
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