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/*===========================================================================*/
/* Copyright (C) 2001 Authors                                                */
/*                                                                           */
/* This source file may be used and distributed without restriction provided */
/* that this copyright statement is not removed from the file and that any   */
/* derivative work contains the original copyright notice and the associated */
/* disclaimer.                                                               */
/*                                                                           */
/* This source file is free software; you can redistribute it and/or modify  */
/* it under the terms of the GNU Lesser General Public License as published  */
/* by the Free Software Foundation; either version 2.1 of the License, or    */
/* (at your option) any later version.                                       */
/*                                                                           */
/* This source is distributed in the hope that it will be useful, but WITHOUT*/
/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or     */
/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public       */
/* License for more details.                                                 */
/*                                                                           */
/* You should have received a copy of the GNU Lesser General Public License  */
/* along with this source; if not, write to the Free Software Foundation,    */
/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA        */
/*                                                                           */
/*===========================================================================*/
/*                            DIGITAL I/O                                    */
/*---------------------------------------------------------------------------*/
/* Test the Digital I/O interface:                                           */
/*                                   - Interrupts.                           */
/*===========================================================================*/

.global main

.set   P1IN,  0x0020
.set   P1OUT, 0x0021
.set   P1DIR, 0x0022
.set   P1IFG, 0x0023
.set   P1IES, 0x0024
.set   P1IE,  0x0025
.set   P1SEL, 0x0026
.set   P2IN,  0x0028
.set   P2OUT, 0x0029
.set   P2DIR, 0x002A
.set   P2IFG, 0x002B
.set   P2IES, 0x002C
.set   P2IE,  0x002D
.set   P2SEL, 0x002E

main:
        ; Disable interrupts
        dint
        mov.b #0x00, &P1IE
        mov.b #0x00, &P2IE


        /* -------------- PORT 1: TEST INTERRUPT FLAGS  --------------- */

        
        mov.b   #0x00, &P1IES       ;# TEST IF RISING EDGE ENABLED

        mov     #0x0200, r15        ;# Make sure rising edge is detected test 1
p1ifg_re_loop1:
        nop
        nop
        mov.b &P1IFG,  0(r15)
        mov.b   #0x00, &P1IFG
        inc      r15
        cmp     #0x0208, r15
        jne     p1ifg_re_loop1

        mov     #0x0210, r15        ;# Make sure falling edge is ignored
p1ifg_fe_loop1:
        nop
        nop
        mov.b &P1IFG,  0(r15)
        mov.b   #0x00, &P1IFG
        inc      r15
        cmp     #0x0218, r15
        jne     p1ifg_fe_loop1

        mov     #0x0220, r15        ;# Make sure rising edge is detected test 2
p1ifg_re_loop2:
        nop
        nop
        mov.b &P1IFG,  0(r15)
        inc      r15
        cmp     #0x0228, r15
        jne     p1ifg_re_loop2
        mov.b   #0x00, &P1IFG



        mov.b   #0xff, &P1IES       ;# TEST IF FALLING EDGE ENABLED

        mov     #0x0230, r15        ;# Make sure falling edge is detected test 1
p1ifg_fe_loop2:
        nop
        nop
        mov.b &P1IFG,  0(r15)
        mov.b   #0x00, &P1IFG
        inc      r15
        cmp     #0x0238, r15
        jne     p1ifg_fe_loop2

        mov     #0x0240, r15        ;# Make sure rising edge is ignored
p1ifg_re_loop3:
        nop
        nop
        mov.b &P1IFG,  0(r15)
        mov.b   #0x00, &P1IFG
        inc      r15
        cmp     #0x0248, r15
        jne     p1ifg_re_loop3

        mov     #0x0250, r15        ;# Make sure falling edge is detected test 2
p1ifg_fe_loop3:
        nop
        nop
        mov.b &P1IFG,  0(r15)
        inc      r15
        cmp     #0x0258, r15
        jne     p1ifg_fe_loop3
        mov.b   #0x00, &P1IFG


        /* -------------- PORT 2: TEST INTERRUPT FLAGS  --------------- */

        
        mov.b   #0x00, &P2IES       ;# TEST IF RISING EDGE ENABLED

        mov     #0x0200, r15        ;# Make sure rising edge is detected test 1
p2ifg_re_loop1:
        nop
        nop
        mov.b &P2IFG,  0(r15)
        mov.b   #0x00, &P2IFG
        inc      r15
        cmp     #0x0208, r15
        jne     p2ifg_re_loop1

        mov     #0x0210, r15        ;# Make sure falling edge is ignored
p2ifg_fe_loop1:
        nop
        nop
        mov.b &P2IFG,  0(r15)
        mov.b   #0x00, &P2IFG
        inc      r15
        cmp     #0x0218, r15
        jne     p2ifg_fe_loop1

        mov     #0x0220, r15        ;# Make sure rising edge is detected test 2
p2ifg_re_loop2:
        nop
        nop
        mov.b &P2IFG,  0(r15)
        inc      r15
        cmp     #0x0228, r15
        jne     p2ifg_re_loop2
        mov.b   #0x00, &P2IFG



        mov.b   #0xff, &P2IES       ;# TEST IF FALLING EDGE ENABLED

        mov     #0x0230, r15        ;# Make sure falling edge is detected test 1
p2ifg_fe_loop2:
        nop
        nop
        mov.b &P2IFG,  0(r15)
        mov.b   #0x00, &P2IFG
        inc      r15
        cmp     #0x0238, r15
        jne     p2ifg_fe_loop2

        mov     #0x0240, r15        ;# Make sure rising edge is ignored
p2ifg_re_loop3:
        nop
        nop
        mov.b &P2IFG,  0(r15)
        mov.b   #0x00, &P2IFG
        inc      r15
        cmp     #0x0248, r15
        jne     p2ifg_re_loop3

        mov     #0x0250, r15        ;# Make sure falling edge is detected test 2
p2ifg_fe_loop3:
        nop
        nop
        mov.b &P2IFG,  0(r15)
        inc      r15
        cmp     #0x0258, r15
        jne     p2ifg_fe_loop3
        mov.b   #0x00, &P2IFG


        /* --------------            CLEAR MEMORY        --------------- */

        mov     #0x0200, r5
mem_clear_loop:
        mov     #0x00,  0(r5)
        incd      r5
        cmp     #0x0260, r5
        jne     mem_clear_loop


        /* -------------- PORT 1: TEST INTERRUPT VECTOR  --------------- */

        mov     #0x0250, r1     ; Initialize stack
        eint                    ; Enable interrupts

        mov.b   #0x0001, r6
        mov.b        r6, &P1IE
        mov     #0x0200, r15;
p1_irq_loop:
        mov.b        r6, &P1IFG ; Generate soft interrupt
        nop
        nop
        nop
        rla          r6
        mov.b        r6, &P1IE
        inc         r15
        cmp     #0x0208, r15
        jne     p1_irq_loop


        /* -------------- PORT 2: TEST INTERRUPT VECTOR  --------------- */

        mov     #0x0250, r1     ; Initialize stack
        eint                    ; Enable interrupts

        mov.b   #0x0001, r6
        mov.b        r6, &P2IE
        mov     #0x0210, r15;
p2_irq_loop:
        mov.b        r6, &P2IFG ; Generate soft interrupt
        nop
        nop
        nop
        rla          r6
        mov.b        r6, &P2IE
        inc         r15
        cmp     #0x0218, r15
        jne     p2_irq_loop


        /* ----------------------         END OF TEST        --------------- */
end_of_test:
        nop
        br #0xffff


        /* ----------------------      INTERRUPT ROUTINES    --------------- */

PORT1_VECTOR:
        mov.b &P1IFG,  0(r15)
        mov.b  #0x00, &P1IFG
        reti    

PORT2_VECTOR:
        mov.b &P2IFG,  0(r15)
        mov.b  #0x00, &P2IFG
        reti    



        /* ----------------------         INTERRUPT VECTORS  --------------- */

.section .vectors, "a"
.word end_of_test  ; Interrupt  0 (lowest priority)    <unused>
.word end_of_test  ; Interrupt  1                      <unused>
.word PORT1_VECTOR ; Interrupt  2                      <unused>
.word PORT2_VECTOR ; Interrupt  3                      <unused>
.word end_of_test  ; Interrupt  4                      <unused>
.word end_of_test  ; Interrupt  5                      <unused>
.word end_of_test  ; Interrupt  6                      <unused>
.word end_of_test  ; Interrupt  7                      <unused>
.word end_of_test  ; Interrupt  8                      <unused>
.word end_of_test  ; Interrupt  9                      <unused>
.word end_of_test  ; Interrupt 10                      Watchdog timer
.word end_of_test  ; Interrupt 11                      <unused>
.word end_of_test  ; Interrupt 12                      <unused>
.word end_of_test  ; Interrupt 13                      <unused>
.word end_of_test  ; Interrupt 14                      NMI
.word main         ; Interrupt 15 (highest priority)   RESET