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<h1>Introduction</h1>
 
The openMSP430 is a synthesizable 16bit microcontroller core written in Verilog. It is compatible with Texas Instruments' MSP430 microcontroller family and can execute the code generated by an MSP430 toolchain in a cycle accurate way.
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The core comes with some peripherals (16x16 Hardware Multiplier, GPIO, TimerA, generic templates) and a Serial Debug Interface for in-system software development.
 
<h1>Download</h1>
<h3>Design</h3>
The complete tar archive of the project can be downloaded <a href="http://www.opencores.org/download,openmsp430">here</a> (OpenCores account required).<br />
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The following SVN command can be run from a console (or <a href="http://www.syntevo.com/smartsvn/index.html">GUI</a>):
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	<code>svn export http://opencores.org/ocsvn/openmsp430/openmsp430/trunk/ openmsp430</code>
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To keep yourself informed about project updates, you can subscribe to the following <a href="http://opencores.org/websvn,rss?repname=openmsp430&path=/openmsp430/&isdir=1">RSS</a> feed.
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<h3>Documentation</h3>
The online documentation is available as <a href="usercontent,doc,1299010945" title="openMSP430 PDF Doc. R1.8">pdf</a>.
<h1>Features & Limitations</h1>
<h2>Features</h2>
<ul>
	<li><b>Core:</b>
	<ul>
      <li>Full instruction set support.</li>
      <li>All addressing modes are supported.</li>
      <li>IRQ and NMI support.</li>
      <li>Power saving modes functionality is supported.</li>
      <li>Configurable memory size for both program and data.</li>
      <li>Serial Debug Interface (Nexus class 3).</li>
      <li>FPGA friendly (single clock domain, no clock gate).</li>
      <li>Small size (Xilinx: 1650 LUTs / Altera: 1550 LEs / ASIC: 8k gates).</li>
	</ul>
	</li>
	<br />	
	<li><b>Peripherals:</b>
	<ul>
      <li>16x16 Hardware Multiplier.</li>
      <li>Basic Clock Module.</li>
      <li>Watchdog.</li>
      <li>Timer A.</li>
      <li>GPIO (port 1 to 6).</li>
      <li>Templates for 8 and 16 bit peripherals (under BSD license).</li>
	</ul>
	</li>
</ul>
<h2>Limitations</h2>
<ul>
	<li><b>Core:</b>
	<ul>
      <li>Instructions can't be executed from the data memory.</li>
	</ul>
	</li>
	<br />	
	<li><b>Peripherals:</b>
	<ul>
      <li>Basic clock module doesn't offer the full functionality of a real MSP430.</li>
	</ul>
	</li>
</ul>
 
<h1>Links</h1>
Development has been performed using the following freely available (excellent) tools:
<ul>
	<li><a href="http://www.icarus.com/eda/verilog/">Icarus Verilog</a>  : Verilog simulator.</li>
	<li><a href="http://gtkwave.sourceforge.net/">GTKWave Analyzer</a>   : Waveform viewer.</li>
	<li><a href="http://mspgcc4.sourceforge.net/">MSPGCC4</a>            : GCC toolchain for the Texas Instruments MSP430 MCUs.</li>
	<li><a href="http://www.xilinx.com/ise/logic_design_prod/webpack.htm">ISE WebPACK</a>   : Xilinx's FPGA synthesis tool.</li>
</ul>
Discussion group:
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       <img src="http://groups.google.com/intl/en/images/logos/groups_logo_sm.gif"
            height=30 width=140 alt="Google Groups">
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       <tr><td style="padding-left: 5px">
       <b>Subscribe to openMSP430</b>
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       <form action="http://groups.google.com/group/discuss_openmsp430/boxsubscribe">
       <input type=hidden name="hl" value="en">
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       Email: <input type=text name=email>
       <input type=submit name="sub" value="Subscribe">
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       </form>
       <tr><td align=right>
       <a href="http://groups.google.com/group/discuss_openmsp430?hl=en">Visit this group</a>
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   </li>
</ul>
A few MSP430 links:
<ul>
	<li><a href="http://en.wikipedia.org/wiki/MSP430">Wikipedia: MSP430</a></li>
	<li><a href="http://www.ti.com/litv/pdf/slau049f">TI: MSP430x1xx Family User's Guide</a></li>
	<li><a href="http://processors.wiki.ti.com/index.php/Open_Source_Projects_-_MSP430">TI: a list of available MSP430 Open Source projects out there on the web today.</a></li>
</ul>
 
<h1>Legal information</h1>
MSP430 is a trademark of Texas Instruments, Inc. This project is not affiliated in any way with Texas Instruments. All other product names are trademarks or registered trademarks of their respective owners. 
 
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