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[/] [openmsp430/] [trunk/] [fpga/] [altera_de0_nano_soc/] [doc/] [Terasic/] [DE0_NANO_SOC/] [Demonstrations/] [FPGA/] [DE0_NANO_SOC_ADC/] [DE0_NANO_SOC_QSYS/] [synthesis/] [submodules/] [DE0_NANO_SOC_QSYS_mm_interconnect_0.v] - Rev 221

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// DE0_NANO_SOC_QSYS_mm_interconnect_0.v
 
// This file was auto-generated from altera_mm_interconnect_hw.tcl.  If you edit it your changes
// will probably be lost.
// 
// Generated using ACDS version 14.0 209 at 2014.12.18.15:53:15
 
`timescale 1 ps / 1 ps
module DE0_NANO_SOC_QSYS_mm_interconnect_0 (
		input  wire        pll_sys_outclk0_clk,                               //                             pll_sys_outclk0.clk
		input  wire        nios2_qsys_reset_n_reset_bridge_in_reset_reset,    //    nios2_qsys_reset_n_reset_bridge_in_reset.reset
		input  wire        onchip_memory2_reset1_reset_bridge_in_reset_reset, // onchip_memory2_reset1_reset_bridge_in_reset.reset
		input  wire [19:0] nios2_qsys_data_master_address,                    //                      nios2_qsys_data_master.address
		output wire        nios2_qsys_data_master_waitrequest,                //                                            .waitrequest
		input  wire [3:0]  nios2_qsys_data_master_byteenable,                 //                                            .byteenable
		input  wire        nios2_qsys_data_master_read,                       //                                            .read
		output wire [31:0] nios2_qsys_data_master_readdata,                   //                                            .readdata
		output wire        nios2_qsys_data_master_readdatavalid,              //                                            .readdatavalid
		input  wire        nios2_qsys_data_master_write,                      //                                            .write
		input  wire [31:0] nios2_qsys_data_master_writedata,                  //                                            .writedata
		input  wire        nios2_qsys_data_master_debugaccess,                //                                            .debugaccess
		input  wire [19:0] nios2_qsys_instruction_master_address,             //               nios2_qsys_instruction_master.address
		output wire        nios2_qsys_instruction_master_waitrequest,         //                                            .waitrequest
		input  wire        nios2_qsys_instruction_master_read,                //                                            .read
		output wire [31:0] nios2_qsys_instruction_master_readdata,            //                                            .readdata
		output wire        nios2_qsys_instruction_master_readdatavalid,       //                                            .readdatavalid
		output wire [0:0]  adc_ltc2308_slave_address,                         //                           adc_ltc2308_slave.address
		output wire        adc_ltc2308_slave_write,                           //                                            .write
		output wire        adc_ltc2308_slave_read,                            //                                            .read
		input  wire [15:0] adc_ltc2308_slave_readdata,                        //                                            .readdata
		output wire [15:0] adc_ltc2308_slave_writedata,                       //                                            .writedata
		output wire        adc_ltc2308_slave_chipselect,                      //                                            .chipselect
		output wire [0:0]  jtag_uart_avalon_jtag_slave_address,               //                 jtag_uart_avalon_jtag_slave.address
		output wire        jtag_uart_avalon_jtag_slave_write,                 //                                            .write
		output wire        jtag_uart_avalon_jtag_slave_read,                  //                                            .read
		input  wire [31:0] jtag_uart_avalon_jtag_slave_readdata,              //                                            .readdata
		output wire [31:0] jtag_uart_avalon_jtag_slave_writedata,             //                                            .writedata
		input  wire        jtag_uart_avalon_jtag_slave_waitrequest,           //                                            .waitrequest
		output wire        jtag_uart_avalon_jtag_slave_chipselect,            //                                            .chipselect
		output wire [8:0]  nios2_qsys_jtag_debug_module_address,              //                nios2_qsys_jtag_debug_module.address
		output wire        nios2_qsys_jtag_debug_module_write,                //                                            .write
		output wire        nios2_qsys_jtag_debug_module_read,                 //                                            .read
		input  wire [31:0] nios2_qsys_jtag_debug_module_readdata,             //                                            .readdata
		output wire [31:0] nios2_qsys_jtag_debug_module_writedata,            //                                            .writedata
		output wire [3:0]  nios2_qsys_jtag_debug_module_byteenable,           //                                            .byteenable
		input  wire        nios2_qsys_jtag_debug_module_waitrequest,          //                                            .waitrequest
		output wire        nios2_qsys_jtag_debug_module_debugaccess,          //                                            .debugaccess
		output wire [15:0] onchip_memory2_s1_address,                         //                           onchip_memory2_s1.address
		output wire        onchip_memory2_s1_write,                           //                                            .write
		input  wire [31:0] onchip_memory2_s1_readdata,                        //                                            .readdata
		output wire [31:0] onchip_memory2_s1_writedata,                       //                                            .writedata
		output wire [3:0]  onchip_memory2_s1_byteenable,                      //                                            .byteenable
		output wire        onchip_memory2_s1_chipselect,                      //                                            .chipselect
		output wire        onchip_memory2_s1_clken,                           //                                            .clken
		output wire [1:0]  sw_s1_address,                                     //                                       sw_s1.address
		output wire        sw_s1_write,                                       //                                            .write
		input  wire [31:0] sw_s1_readdata,                                    //                                            .readdata
		output wire [31:0] sw_s1_writedata,                                   //                                            .writedata
		output wire        sw_s1_chipselect,                                  //                                            .chipselect
		output wire [0:0]  sysid_qsys_control_slave_address,                  //                    sysid_qsys_control_slave.address
		input  wire [31:0] sysid_qsys_control_slave_readdata                  //                                            .readdata
	);
 
	wire         nios2_qsys_instruction_master_translator_avalon_universal_master_0_waitrequest;   // nios2_qsys_instruction_master_agent:av_waitrequest -> nios2_qsys_instruction_master_translator:uav_waitrequest
	wire   [2:0] nios2_qsys_instruction_master_translator_avalon_universal_master_0_burstcount;    // nios2_qsys_instruction_master_translator:uav_burstcount -> nios2_qsys_instruction_master_agent:av_burstcount
	wire  [31:0] nios2_qsys_instruction_master_translator_avalon_universal_master_0_writedata;     // nios2_qsys_instruction_master_translator:uav_writedata -> nios2_qsys_instruction_master_agent:av_writedata
	wire  [19:0] nios2_qsys_instruction_master_translator_avalon_universal_master_0_address;       // nios2_qsys_instruction_master_translator:uav_address -> nios2_qsys_instruction_master_agent:av_address
	wire         nios2_qsys_instruction_master_translator_avalon_universal_master_0_lock;          // nios2_qsys_instruction_master_translator:uav_lock -> nios2_qsys_instruction_master_agent:av_lock
	wire         nios2_qsys_instruction_master_translator_avalon_universal_master_0_write;         // nios2_qsys_instruction_master_translator:uav_write -> nios2_qsys_instruction_master_agent:av_write
	wire         nios2_qsys_instruction_master_translator_avalon_universal_master_0_read;          // nios2_qsys_instruction_master_translator:uav_read -> nios2_qsys_instruction_master_agent:av_read
	wire  [31:0] nios2_qsys_instruction_master_translator_avalon_universal_master_0_readdata;      // nios2_qsys_instruction_master_agent:av_readdata -> nios2_qsys_instruction_master_translator:uav_readdata
	wire         nios2_qsys_instruction_master_translator_avalon_universal_master_0_debugaccess;   // nios2_qsys_instruction_master_translator:uav_debugaccess -> nios2_qsys_instruction_master_agent:av_debugaccess
	wire   [3:0] nios2_qsys_instruction_master_translator_avalon_universal_master_0_byteenable;    // nios2_qsys_instruction_master_translator:uav_byteenable -> nios2_qsys_instruction_master_agent:av_byteenable
	wire         nios2_qsys_instruction_master_translator_avalon_universal_master_0_readdatavalid; // nios2_qsys_instruction_master_agent:av_readdatavalid -> nios2_qsys_instruction_master_translator:uav_readdatavalid
	wire         nios2_qsys_data_master_translator_avalon_universal_master_0_waitrequest;          // nios2_qsys_data_master_agent:av_waitrequest -> nios2_qsys_data_master_translator:uav_waitrequest
	wire   [2:0] nios2_qsys_data_master_translator_avalon_universal_master_0_burstcount;           // nios2_qsys_data_master_translator:uav_burstcount -> nios2_qsys_data_master_agent:av_burstcount
	wire  [31:0] nios2_qsys_data_master_translator_avalon_universal_master_0_writedata;            // nios2_qsys_data_master_translator:uav_writedata -> nios2_qsys_data_master_agent:av_writedata
	wire  [19:0] nios2_qsys_data_master_translator_avalon_universal_master_0_address;              // nios2_qsys_data_master_translator:uav_address -> nios2_qsys_data_master_agent:av_address
	wire         nios2_qsys_data_master_translator_avalon_universal_master_0_lock;                 // nios2_qsys_data_master_translator:uav_lock -> nios2_qsys_data_master_agent:av_lock
	wire         nios2_qsys_data_master_translator_avalon_universal_master_0_write;                // nios2_qsys_data_master_translator:uav_write -> nios2_qsys_data_master_agent:av_write
	wire         nios2_qsys_data_master_translator_avalon_universal_master_0_read;                 // nios2_qsys_data_master_translator:uav_read -> nios2_qsys_data_master_agent:av_read
	wire  [31:0] nios2_qsys_data_master_translator_avalon_universal_master_0_readdata;             // nios2_qsys_data_master_agent:av_readdata -> nios2_qsys_data_master_translator:uav_readdata
	wire         nios2_qsys_data_master_translator_avalon_universal_master_0_debugaccess;          // nios2_qsys_data_master_translator:uav_debugaccess -> nios2_qsys_data_master_agent:av_debugaccess
	wire   [3:0] nios2_qsys_data_master_translator_avalon_universal_master_0_byteenable;           // nios2_qsys_data_master_translator:uav_byteenable -> nios2_qsys_data_master_agent:av_byteenable
	wire         nios2_qsys_data_master_translator_avalon_universal_master_0_readdatavalid;        // nios2_qsys_data_master_agent:av_readdatavalid -> nios2_qsys_data_master_translator:uav_readdatavalid
	wire         nios2_qsys_jtag_debug_module_agent_m0_waitrequest;                                // nios2_qsys_jtag_debug_module_translator:uav_waitrequest -> nios2_qsys_jtag_debug_module_agent:m0_waitrequest
	wire   [2:0] nios2_qsys_jtag_debug_module_agent_m0_burstcount;                                 // nios2_qsys_jtag_debug_module_agent:m0_burstcount -> nios2_qsys_jtag_debug_module_translator:uav_burstcount
	wire  [31:0] nios2_qsys_jtag_debug_module_agent_m0_writedata;                                  // nios2_qsys_jtag_debug_module_agent:m0_writedata -> nios2_qsys_jtag_debug_module_translator:uav_writedata
	wire  [19:0] nios2_qsys_jtag_debug_module_agent_m0_address;                                    // nios2_qsys_jtag_debug_module_agent:m0_address -> nios2_qsys_jtag_debug_module_translator:uav_address
	wire         nios2_qsys_jtag_debug_module_agent_m0_write;                                      // nios2_qsys_jtag_debug_module_agent:m0_write -> nios2_qsys_jtag_debug_module_translator:uav_write
	wire         nios2_qsys_jtag_debug_module_agent_m0_lock;                                       // nios2_qsys_jtag_debug_module_agent:m0_lock -> nios2_qsys_jtag_debug_module_translator:uav_lock
	wire         nios2_qsys_jtag_debug_module_agent_m0_read;                                       // nios2_qsys_jtag_debug_module_agent:m0_read -> nios2_qsys_jtag_debug_module_translator:uav_read
	wire  [31:0] nios2_qsys_jtag_debug_module_agent_m0_readdata;                                   // nios2_qsys_jtag_debug_module_translator:uav_readdata -> nios2_qsys_jtag_debug_module_agent:m0_readdata
	wire         nios2_qsys_jtag_debug_module_agent_m0_readdatavalid;                              // nios2_qsys_jtag_debug_module_translator:uav_readdatavalid -> nios2_qsys_jtag_debug_module_agent:m0_readdatavalid
	wire         nios2_qsys_jtag_debug_module_agent_m0_debugaccess;                                // nios2_qsys_jtag_debug_module_agent:m0_debugaccess -> nios2_qsys_jtag_debug_module_translator:uav_debugaccess
	wire   [3:0] nios2_qsys_jtag_debug_module_agent_m0_byteenable;                                 // nios2_qsys_jtag_debug_module_agent:m0_byteenable -> nios2_qsys_jtag_debug_module_translator:uav_byteenable
	wire         nios2_qsys_jtag_debug_module_agent_rf_source_endofpacket;                         // nios2_qsys_jtag_debug_module_agent:rf_source_endofpacket -> nios2_qsys_jtag_debug_module_agent_rsp_fifo:in_endofpacket
	wire         nios2_qsys_jtag_debug_module_agent_rf_source_valid;                               // nios2_qsys_jtag_debug_module_agent:rf_source_valid -> nios2_qsys_jtag_debug_module_agent_rsp_fifo:in_valid
	wire         nios2_qsys_jtag_debug_module_agent_rf_source_startofpacket;                       // nios2_qsys_jtag_debug_module_agent:rf_source_startofpacket -> nios2_qsys_jtag_debug_module_agent_rsp_fifo:in_startofpacket
	wire  [96:0] nios2_qsys_jtag_debug_module_agent_rf_source_data;                                // nios2_qsys_jtag_debug_module_agent:rf_source_data -> nios2_qsys_jtag_debug_module_agent_rsp_fifo:in_data
	wire         nios2_qsys_jtag_debug_module_agent_rf_source_ready;                               // nios2_qsys_jtag_debug_module_agent_rsp_fifo:in_ready -> nios2_qsys_jtag_debug_module_agent:rf_source_ready
	wire         nios2_qsys_jtag_debug_module_agent_rsp_fifo_out_endofpacket;                      // nios2_qsys_jtag_debug_module_agent_rsp_fifo:out_endofpacket -> nios2_qsys_jtag_debug_module_agent:rf_sink_endofpacket
	wire         nios2_qsys_jtag_debug_module_agent_rsp_fifo_out_valid;                            // nios2_qsys_jtag_debug_module_agent_rsp_fifo:out_valid -> nios2_qsys_jtag_debug_module_agent:rf_sink_valid
	wire         nios2_qsys_jtag_debug_module_agent_rsp_fifo_out_startofpacket;                    // nios2_qsys_jtag_debug_module_agent_rsp_fifo:out_startofpacket -> nios2_qsys_jtag_debug_module_agent:rf_sink_startofpacket
	wire  [96:0] nios2_qsys_jtag_debug_module_agent_rsp_fifo_out_data;                             // nios2_qsys_jtag_debug_module_agent_rsp_fifo:out_data -> nios2_qsys_jtag_debug_module_agent:rf_sink_data
	wire         nios2_qsys_jtag_debug_module_agent_rsp_fifo_out_ready;                            // nios2_qsys_jtag_debug_module_agent:rf_sink_ready -> nios2_qsys_jtag_debug_module_agent_rsp_fifo:out_ready
	wire         nios2_qsys_jtag_debug_module_agent_rdata_fifo_src_valid;                          // nios2_qsys_jtag_debug_module_agent:rdata_fifo_src_valid -> nios2_qsys_jtag_debug_module_agent:rdata_fifo_sink_valid
	wire  [33:0] nios2_qsys_jtag_debug_module_agent_rdata_fifo_src_data;                           // nios2_qsys_jtag_debug_module_agent:rdata_fifo_src_data -> nios2_qsys_jtag_debug_module_agent:rdata_fifo_sink_data
	wire         nios2_qsys_jtag_debug_module_agent_rdata_fifo_src_ready;                          // nios2_qsys_jtag_debug_module_agent:rdata_fifo_sink_ready -> nios2_qsys_jtag_debug_module_agent:rdata_fifo_src_ready
	wire         cmd_mux_src_endofpacket;                                                          // cmd_mux:src_endofpacket -> nios2_qsys_jtag_debug_module_agent:cp_endofpacket
	wire         cmd_mux_src_valid;                                                                // cmd_mux:src_valid -> nios2_qsys_jtag_debug_module_agent:cp_valid
	wire         cmd_mux_src_startofpacket;                                                        // cmd_mux:src_startofpacket -> nios2_qsys_jtag_debug_module_agent:cp_startofpacket
	wire  [95:0] cmd_mux_src_data;                                                                 // cmd_mux:src_data -> nios2_qsys_jtag_debug_module_agent:cp_data
	wire   [5:0] cmd_mux_src_channel;                                                              // cmd_mux:src_channel -> nios2_qsys_jtag_debug_module_agent:cp_channel
	wire         cmd_mux_src_ready;                                                                // nios2_qsys_jtag_debug_module_agent:cp_ready -> cmd_mux:src_ready
	wire         onchip_memory2_s1_agent_m0_waitrequest;                                           // onchip_memory2_s1_translator:uav_waitrequest -> onchip_memory2_s1_agent:m0_waitrequest
	wire   [2:0] onchip_memory2_s1_agent_m0_burstcount;                                            // onchip_memory2_s1_agent:m0_burstcount -> onchip_memory2_s1_translator:uav_burstcount
	wire  [31:0] onchip_memory2_s1_agent_m0_writedata;                                             // onchip_memory2_s1_agent:m0_writedata -> onchip_memory2_s1_translator:uav_writedata
	wire  [19:0] onchip_memory2_s1_agent_m0_address;                                               // onchip_memory2_s1_agent:m0_address -> onchip_memory2_s1_translator:uav_address
	wire         onchip_memory2_s1_agent_m0_write;                                                 // onchip_memory2_s1_agent:m0_write -> onchip_memory2_s1_translator:uav_write
	wire         onchip_memory2_s1_agent_m0_lock;                                                  // onchip_memory2_s1_agent:m0_lock -> onchip_memory2_s1_translator:uav_lock
	wire         onchip_memory2_s1_agent_m0_read;                                                  // onchip_memory2_s1_agent:m0_read -> onchip_memory2_s1_translator:uav_read
	wire  [31:0] onchip_memory2_s1_agent_m0_readdata;                                              // onchip_memory2_s1_translator:uav_readdata -> onchip_memory2_s1_agent:m0_readdata
	wire         onchip_memory2_s1_agent_m0_readdatavalid;                                         // onchip_memory2_s1_translator:uav_readdatavalid -> onchip_memory2_s1_agent:m0_readdatavalid
	wire         onchip_memory2_s1_agent_m0_debugaccess;                                           // onchip_memory2_s1_agent:m0_debugaccess -> onchip_memory2_s1_translator:uav_debugaccess
	wire   [3:0] onchip_memory2_s1_agent_m0_byteenable;                                            // onchip_memory2_s1_agent:m0_byteenable -> onchip_memory2_s1_translator:uav_byteenable
	wire         onchip_memory2_s1_agent_rf_source_endofpacket;                                    // onchip_memory2_s1_agent:rf_source_endofpacket -> onchip_memory2_s1_agent_rsp_fifo:in_endofpacket
	wire         onchip_memory2_s1_agent_rf_source_valid;                                          // onchip_memory2_s1_agent:rf_source_valid -> onchip_memory2_s1_agent_rsp_fifo:in_valid
	wire         onchip_memory2_s1_agent_rf_source_startofpacket;                                  // onchip_memory2_s1_agent:rf_source_startofpacket -> onchip_memory2_s1_agent_rsp_fifo:in_startofpacket
	wire  [96:0] onchip_memory2_s1_agent_rf_source_data;                                           // onchip_memory2_s1_agent:rf_source_data -> onchip_memory2_s1_agent_rsp_fifo:in_data
	wire         onchip_memory2_s1_agent_rf_source_ready;                                          // onchip_memory2_s1_agent_rsp_fifo:in_ready -> onchip_memory2_s1_agent:rf_source_ready
	wire         onchip_memory2_s1_agent_rsp_fifo_out_endofpacket;                                 // onchip_memory2_s1_agent_rsp_fifo:out_endofpacket -> onchip_memory2_s1_agent:rf_sink_endofpacket
	wire         onchip_memory2_s1_agent_rsp_fifo_out_valid;                                       // onchip_memory2_s1_agent_rsp_fifo:out_valid -> onchip_memory2_s1_agent:rf_sink_valid
	wire         onchip_memory2_s1_agent_rsp_fifo_out_startofpacket;                               // onchip_memory2_s1_agent_rsp_fifo:out_startofpacket -> onchip_memory2_s1_agent:rf_sink_startofpacket
	wire  [96:0] onchip_memory2_s1_agent_rsp_fifo_out_data;                                        // onchip_memory2_s1_agent_rsp_fifo:out_data -> onchip_memory2_s1_agent:rf_sink_data
	wire         onchip_memory2_s1_agent_rsp_fifo_out_ready;                                       // onchip_memory2_s1_agent:rf_sink_ready -> onchip_memory2_s1_agent_rsp_fifo:out_ready
	wire         onchip_memory2_s1_agent_rdata_fifo_src_valid;                                     // onchip_memory2_s1_agent:rdata_fifo_src_valid -> onchip_memory2_s1_agent:rdata_fifo_sink_valid
	wire  [33:0] onchip_memory2_s1_agent_rdata_fifo_src_data;                                      // onchip_memory2_s1_agent:rdata_fifo_src_data -> onchip_memory2_s1_agent:rdata_fifo_sink_data
	wire         onchip_memory2_s1_agent_rdata_fifo_src_ready;                                     // onchip_memory2_s1_agent:rdata_fifo_sink_ready -> onchip_memory2_s1_agent:rdata_fifo_src_ready
	wire         cmd_mux_001_src_endofpacket;                                                      // cmd_mux_001:src_endofpacket -> onchip_memory2_s1_agent:cp_endofpacket
	wire         cmd_mux_001_src_valid;                                                            // cmd_mux_001:src_valid -> onchip_memory2_s1_agent:cp_valid
	wire         cmd_mux_001_src_startofpacket;                                                    // cmd_mux_001:src_startofpacket -> onchip_memory2_s1_agent:cp_startofpacket
	wire  [95:0] cmd_mux_001_src_data;                                                             // cmd_mux_001:src_data -> onchip_memory2_s1_agent:cp_data
	wire   [5:0] cmd_mux_001_src_channel;                                                          // cmd_mux_001:src_channel -> onchip_memory2_s1_agent:cp_channel
	wire         cmd_mux_001_src_ready;                                                            // onchip_memory2_s1_agent:cp_ready -> cmd_mux_001:src_ready
	wire         sysid_qsys_control_slave_agent_m0_waitrequest;                                    // sysid_qsys_control_slave_translator:uav_waitrequest -> sysid_qsys_control_slave_agent:m0_waitrequest
	wire   [2:0] sysid_qsys_control_slave_agent_m0_burstcount;                                     // sysid_qsys_control_slave_agent:m0_burstcount -> sysid_qsys_control_slave_translator:uav_burstcount
	wire  [31:0] sysid_qsys_control_slave_agent_m0_writedata;                                      // sysid_qsys_control_slave_agent:m0_writedata -> sysid_qsys_control_slave_translator:uav_writedata
	wire  [19:0] sysid_qsys_control_slave_agent_m0_address;                                        // sysid_qsys_control_slave_agent:m0_address -> sysid_qsys_control_slave_translator:uav_address
	wire         sysid_qsys_control_slave_agent_m0_write;                                          // sysid_qsys_control_slave_agent:m0_write -> sysid_qsys_control_slave_translator:uav_write
	wire         sysid_qsys_control_slave_agent_m0_lock;                                           // sysid_qsys_control_slave_agent:m0_lock -> sysid_qsys_control_slave_translator:uav_lock
	wire         sysid_qsys_control_slave_agent_m0_read;                                           // sysid_qsys_control_slave_agent:m0_read -> sysid_qsys_control_slave_translator:uav_read
	wire  [31:0] sysid_qsys_control_slave_agent_m0_readdata;                                       // sysid_qsys_control_slave_translator:uav_readdata -> sysid_qsys_control_slave_agent:m0_readdata
	wire         sysid_qsys_control_slave_agent_m0_readdatavalid;                                  // sysid_qsys_control_slave_translator:uav_readdatavalid -> sysid_qsys_control_slave_agent:m0_readdatavalid
	wire         sysid_qsys_control_slave_agent_m0_debugaccess;                                    // sysid_qsys_control_slave_agent:m0_debugaccess -> sysid_qsys_control_slave_translator:uav_debugaccess
	wire   [3:0] sysid_qsys_control_slave_agent_m0_byteenable;                                     // sysid_qsys_control_slave_agent:m0_byteenable -> sysid_qsys_control_slave_translator:uav_byteenable
	wire         sysid_qsys_control_slave_agent_rf_source_endofpacket;                             // sysid_qsys_control_slave_agent:rf_source_endofpacket -> sysid_qsys_control_slave_agent_rsp_fifo:in_endofpacket
	wire         sysid_qsys_control_slave_agent_rf_source_valid;                                   // sysid_qsys_control_slave_agent:rf_source_valid -> sysid_qsys_control_slave_agent_rsp_fifo:in_valid
	wire         sysid_qsys_control_slave_agent_rf_source_startofpacket;                           // sysid_qsys_control_slave_agent:rf_source_startofpacket -> sysid_qsys_control_slave_agent_rsp_fifo:in_startofpacket
	wire  [96:0] sysid_qsys_control_slave_agent_rf_source_data;                                    // sysid_qsys_control_slave_agent:rf_source_data -> sysid_qsys_control_slave_agent_rsp_fifo:in_data
	wire         sysid_qsys_control_slave_agent_rf_source_ready;                                   // sysid_qsys_control_slave_agent_rsp_fifo:in_ready -> sysid_qsys_control_slave_agent:rf_source_ready
	wire         sysid_qsys_control_slave_agent_rsp_fifo_out_endofpacket;                          // sysid_qsys_control_slave_agent_rsp_fifo:out_endofpacket -> sysid_qsys_control_slave_agent:rf_sink_endofpacket
	wire         sysid_qsys_control_slave_agent_rsp_fifo_out_valid;                                // sysid_qsys_control_slave_agent_rsp_fifo:out_valid -> sysid_qsys_control_slave_agent:rf_sink_valid
	wire         sysid_qsys_control_slave_agent_rsp_fifo_out_startofpacket;                        // sysid_qsys_control_slave_agent_rsp_fifo:out_startofpacket -> sysid_qsys_control_slave_agent:rf_sink_startofpacket
	wire  [96:0] sysid_qsys_control_slave_agent_rsp_fifo_out_data;                                 // sysid_qsys_control_slave_agent_rsp_fifo:out_data -> sysid_qsys_control_slave_agent:rf_sink_data
	wire         sysid_qsys_control_slave_agent_rsp_fifo_out_ready;                                // sysid_qsys_control_slave_agent:rf_sink_ready -> sysid_qsys_control_slave_agent_rsp_fifo:out_ready
	wire         sysid_qsys_control_slave_agent_rdata_fifo_src_valid;                              // sysid_qsys_control_slave_agent:rdata_fifo_src_valid -> sysid_qsys_control_slave_agent:rdata_fifo_sink_valid
	wire  [33:0] sysid_qsys_control_slave_agent_rdata_fifo_src_data;                               // sysid_qsys_control_slave_agent:rdata_fifo_src_data -> sysid_qsys_control_slave_agent:rdata_fifo_sink_data
	wire         sysid_qsys_control_slave_agent_rdata_fifo_src_ready;                              // sysid_qsys_control_slave_agent:rdata_fifo_sink_ready -> sysid_qsys_control_slave_agent:rdata_fifo_src_ready
	wire         cmd_mux_002_src_endofpacket;                                                      // cmd_mux_002:src_endofpacket -> sysid_qsys_control_slave_agent:cp_endofpacket
	wire         cmd_mux_002_src_valid;                                                            // cmd_mux_002:src_valid -> sysid_qsys_control_slave_agent:cp_valid
	wire         cmd_mux_002_src_startofpacket;                                                    // cmd_mux_002:src_startofpacket -> sysid_qsys_control_slave_agent:cp_startofpacket
	wire  [95:0] cmd_mux_002_src_data;                                                             // cmd_mux_002:src_data -> sysid_qsys_control_slave_agent:cp_data
	wire   [5:0] cmd_mux_002_src_channel;                                                          // cmd_mux_002:src_channel -> sysid_qsys_control_slave_agent:cp_channel
	wire         cmd_mux_002_src_ready;                                                            // sysid_qsys_control_slave_agent:cp_ready -> cmd_mux_002:src_ready
	wire         jtag_uart_avalon_jtag_slave_agent_m0_waitrequest;                                 // jtag_uart_avalon_jtag_slave_translator:uav_waitrequest -> jtag_uart_avalon_jtag_slave_agent:m0_waitrequest
	wire   [2:0] jtag_uart_avalon_jtag_slave_agent_m0_burstcount;                                  // jtag_uart_avalon_jtag_slave_agent:m0_burstcount -> jtag_uart_avalon_jtag_slave_translator:uav_burstcount
	wire  [31:0] jtag_uart_avalon_jtag_slave_agent_m0_writedata;                                   // jtag_uart_avalon_jtag_slave_agent:m0_writedata -> jtag_uart_avalon_jtag_slave_translator:uav_writedata
	wire  [19:0] jtag_uart_avalon_jtag_slave_agent_m0_address;                                     // jtag_uart_avalon_jtag_slave_agent:m0_address -> jtag_uart_avalon_jtag_slave_translator:uav_address
	wire         jtag_uart_avalon_jtag_slave_agent_m0_write;                                       // jtag_uart_avalon_jtag_slave_agent:m0_write -> jtag_uart_avalon_jtag_slave_translator:uav_write
	wire         jtag_uart_avalon_jtag_slave_agent_m0_lock;                                        // jtag_uart_avalon_jtag_slave_agent:m0_lock -> jtag_uart_avalon_jtag_slave_translator:uav_lock
	wire         jtag_uart_avalon_jtag_slave_agent_m0_read;                                        // jtag_uart_avalon_jtag_slave_agent:m0_read -> jtag_uart_avalon_jtag_slave_translator:uav_read
	wire  [31:0] jtag_uart_avalon_jtag_slave_agent_m0_readdata;                                    // jtag_uart_avalon_jtag_slave_translator:uav_readdata -> jtag_uart_avalon_jtag_slave_agent:m0_readdata
	wire         jtag_uart_avalon_jtag_slave_agent_m0_readdatavalid;                               // jtag_uart_avalon_jtag_slave_translator:uav_readdatavalid -> jtag_uart_avalon_jtag_slave_agent:m0_readdatavalid
	wire         jtag_uart_avalon_jtag_slave_agent_m0_debugaccess;                                 // jtag_uart_avalon_jtag_slave_agent:m0_debugaccess -> jtag_uart_avalon_jtag_slave_translator:uav_debugaccess
	wire   [3:0] jtag_uart_avalon_jtag_slave_agent_m0_byteenable;                                  // jtag_uart_avalon_jtag_slave_agent:m0_byteenable -> jtag_uart_avalon_jtag_slave_translator:uav_byteenable
	wire         jtag_uart_avalon_jtag_slave_agent_rf_source_endofpacket;                          // jtag_uart_avalon_jtag_slave_agent:rf_source_endofpacket -> jtag_uart_avalon_jtag_slave_agent_rsp_fifo:in_endofpacket
	wire         jtag_uart_avalon_jtag_slave_agent_rf_source_valid;                                // jtag_uart_avalon_jtag_slave_agent:rf_source_valid -> jtag_uart_avalon_jtag_slave_agent_rsp_fifo:in_valid
	wire         jtag_uart_avalon_jtag_slave_agent_rf_source_startofpacket;                        // jtag_uart_avalon_jtag_slave_agent:rf_source_startofpacket -> jtag_uart_avalon_jtag_slave_agent_rsp_fifo:in_startofpacket
	wire  [96:0] jtag_uart_avalon_jtag_slave_agent_rf_source_data;                                 // jtag_uart_avalon_jtag_slave_agent:rf_source_data -> jtag_uart_avalon_jtag_slave_agent_rsp_fifo:in_data
	wire         jtag_uart_avalon_jtag_slave_agent_rf_source_ready;                                // jtag_uart_avalon_jtag_slave_agent_rsp_fifo:in_ready -> jtag_uart_avalon_jtag_slave_agent:rf_source_ready
	wire         jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_endofpacket;                       // jtag_uart_avalon_jtag_slave_agent_rsp_fifo:out_endofpacket -> jtag_uart_avalon_jtag_slave_agent:rf_sink_endofpacket
	wire         jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_valid;                             // jtag_uart_avalon_jtag_slave_agent_rsp_fifo:out_valid -> jtag_uart_avalon_jtag_slave_agent:rf_sink_valid
	wire         jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_startofpacket;                     // jtag_uart_avalon_jtag_slave_agent_rsp_fifo:out_startofpacket -> jtag_uart_avalon_jtag_slave_agent:rf_sink_startofpacket
	wire  [96:0] jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_data;                              // jtag_uart_avalon_jtag_slave_agent_rsp_fifo:out_data -> jtag_uart_avalon_jtag_slave_agent:rf_sink_data
	wire         jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_ready;                             // jtag_uart_avalon_jtag_slave_agent:rf_sink_ready -> jtag_uart_avalon_jtag_slave_agent_rsp_fifo:out_ready
	wire         jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_valid;                           // jtag_uart_avalon_jtag_slave_agent:rdata_fifo_src_valid -> jtag_uart_avalon_jtag_slave_agent:rdata_fifo_sink_valid
	wire  [33:0] jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_data;                            // jtag_uart_avalon_jtag_slave_agent:rdata_fifo_src_data -> jtag_uart_avalon_jtag_slave_agent:rdata_fifo_sink_data
	wire         jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_ready;                           // jtag_uart_avalon_jtag_slave_agent:rdata_fifo_sink_ready -> jtag_uart_avalon_jtag_slave_agent:rdata_fifo_src_ready
	wire         cmd_mux_003_src_endofpacket;                                                      // cmd_mux_003:src_endofpacket -> jtag_uart_avalon_jtag_slave_agent:cp_endofpacket
	wire         cmd_mux_003_src_valid;                                                            // cmd_mux_003:src_valid -> jtag_uart_avalon_jtag_slave_agent:cp_valid
	wire         cmd_mux_003_src_startofpacket;                                                    // cmd_mux_003:src_startofpacket -> jtag_uart_avalon_jtag_slave_agent:cp_startofpacket
	wire  [95:0] cmd_mux_003_src_data;                                                             // cmd_mux_003:src_data -> jtag_uart_avalon_jtag_slave_agent:cp_data
	wire   [5:0] cmd_mux_003_src_channel;                                                          // cmd_mux_003:src_channel -> jtag_uart_avalon_jtag_slave_agent:cp_channel
	wire         cmd_mux_003_src_ready;                                                            // jtag_uart_avalon_jtag_slave_agent:cp_ready -> cmd_mux_003:src_ready
	wire         adc_ltc2308_slave_agent_m0_waitrequest;                                           // adc_ltc2308_slave_translator:uav_waitrequest -> adc_ltc2308_slave_agent:m0_waitrequest
	wire   [2:0] adc_ltc2308_slave_agent_m0_burstcount;                                            // adc_ltc2308_slave_agent:m0_burstcount -> adc_ltc2308_slave_translator:uav_burstcount
	wire  [31:0] adc_ltc2308_slave_agent_m0_writedata;                                             // adc_ltc2308_slave_agent:m0_writedata -> adc_ltc2308_slave_translator:uav_writedata
	wire  [19:0] adc_ltc2308_slave_agent_m0_address;                                               // adc_ltc2308_slave_agent:m0_address -> adc_ltc2308_slave_translator:uav_address
	wire         adc_ltc2308_slave_agent_m0_write;                                                 // adc_ltc2308_slave_agent:m0_write -> adc_ltc2308_slave_translator:uav_write
	wire         adc_ltc2308_slave_agent_m0_lock;                                                  // adc_ltc2308_slave_agent:m0_lock -> adc_ltc2308_slave_translator:uav_lock
	wire         adc_ltc2308_slave_agent_m0_read;                                                  // adc_ltc2308_slave_agent:m0_read -> adc_ltc2308_slave_translator:uav_read
	wire  [31:0] adc_ltc2308_slave_agent_m0_readdata;                                              // adc_ltc2308_slave_translator:uav_readdata -> adc_ltc2308_slave_agent:m0_readdata
	wire         adc_ltc2308_slave_agent_m0_readdatavalid;                                         // adc_ltc2308_slave_translator:uav_readdatavalid -> adc_ltc2308_slave_agent:m0_readdatavalid
	wire         adc_ltc2308_slave_agent_m0_debugaccess;                                           // adc_ltc2308_slave_agent:m0_debugaccess -> adc_ltc2308_slave_translator:uav_debugaccess
	wire   [3:0] adc_ltc2308_slave_agent_m0_byteenable;                                            // adc_ltc2308_slave_agent:m0_byteenable -> adc_ltc2308_slave_translator:uav_byteenable
	wire         adc_ltc2308_slave_agent_rf_source_endofpacket;                                    // adc_ltc2308_slave_agent:rf_source_endofpacket -> adc_ltc2308_slave_agent_rsp_fifo:in_endofpacket
	wire         adc_ltc2308_slave_agent_rf_source_valid;                                          // adc_ltc2308_slave_agent:rf_source_valid -> adc_ltc2308_slave_agent_rsp_fifo:in_valid
	wire         adc_ltc2308_slave_agent_rf_source_startofpacket;                                  // adc_ltc2308_slave_agent:rf_source_startofpacket -> adc_ltc2308_slave_agent_rsp_fifo:in_startofpacket
	wire  [96:0] adc_ltc2308_slave_agent_rf_source_data;                                           // adc_ltc2308_slave_agent:rf_source_data -> adc_ltc2308_slave_agent_rsp_fifo:in_data
	wire         adc_ltc2308_slave_agent_rf_source_ready;                                          // adc_ltc2308_slave_agent_rsp_fifo:in_ready -> adc_ltc2308_slave_agent:rf_source_ready
	wire         adc_ltc2308_slave_agent_rsp_fifo_out_endofpacket;                                 // adc_ltc2308_slave_agent_rsp_fifo:out_endofpacket -> adc_ltc2308_slave_agent:rf_sink_endofpacket
	wire         adc_ltc2308_slave_agent_rsp_fifo_out_valid;                                       // adc_ltc2308_slave_agent_rsp_fifo:out_valid -> adc_ltc2308_slave_agent:rf_sink_valid
	wire         adc_ltc2308_slave_agent_rsp_fifo_out_startofpacket;                               // adc_ltc2308_slave_agent_rsp_fifo:out_startofpacket -> adc_ltc2308_slave_agent:rf_sink_startofpacket
	wire  [96:0] adc_ltc2308_slave_agent_rsp_fifo_out_data;                                        // adc_ltc2308_slave_agent_rsp_fifo:out_data -> adc_ltc2308_slave_agent:rf_sink_data
	wire         adc_ltc2308_slave_agent_rsp_fifo_out_ready;                                       // adc_ltc2308_slave_agent:rf_sink_ready -> adc_ltc2308_slave_agent_rsp_fifo:out_ready
	wire         adc_ltc2308_slave_agent_rdata_fifo_src_valid;                                     // adc_ltc2308_slave_agent:rdata_fifo_src_valid -> adc_ltc2308_slave_agent:rdata_fifo_sink_valid
	wire  [33:0] adc_ltc2308_slave_agent_rdata_fifo_src_data;                                      // adc_ltc2308_slave_agent:rdata_fifo_src_data -> adc_ltc2308_slave_agent:rdata_fifo_sink_data
	wire         adc_ltc2308_slave_agent_rdata_fifo_src_ready;                                     // adc_ltc2308_slave_agent:rdata_fifo_sink_ready -> adc_ltc2308_slave_agent:rdata_fifo_src_ready
	wire         cmd_mux_004_src_endofpacket;                                                      // cmd_mux_004:src_endofpacket -> adc_ltc2308_slave_agent:cp_endofpacket
	wire         cmd_mux_004_src_valid;                                                            // cmd_mux_004:src_valid -> adc_ltc2308_slave_agent:cp_valid
	wire         cmd_mux_004_src_startofpacket;                                                    // cmd_mux_004:src_startofpacket -> adc_ltc2308_slave_agent:cp_startofpacket
	wire  [95:0] cmd_mux_004_src_data;                                                             // cmd_mux_004:src_data -> adc_ltc2308_slave_agent:cp_data
	wire   [5:0] cmd_mux_004_src_channel;                                                          // cmd_mux_004:src_channel -> adc_ltc2308_slave_agent:cp_channel
	wire         cmd_mux_004_src_ready;                                                            // adc_ltc2308_slave_agent:cp_ready -> cmd_mux_004:src_ready
	wire         sw_s1_agent_m0_waitrequest;                                                       // sw_s1_translator:uav_waitrequest -> sw_s1_agent:m0_waitrequest
	wire   [2:0] sw_s1_agent_m0_burstcount;                                                        // sw_s1_agent:m0_burstcount -> sw_s1_translator:uav_burstcount
	wire  [31:0] sw_s1_agent_m0_writedata;                                                         // sw_s1_agent:m0_writedata -> sw_s1_translator:uav_writedata
	wire  [19:0] sw_s1_agent_m0_address;                                                           // sw_s1_agent:m0_address -> sw_s1_translator:uav_address
	wire         sw_s1_agent_m0_write;                                                             // sw_s1_agent:m0_write -> sw_s1_translator:uav_write
	wire         sw_s1_agent_m0_lock;                                                              // sw_s1_agent:m0_lock -> sw_s1_translator:uav_lock
	wire         sw_s1_agent_m0_read;                                                              // sw_s1_agent:m0_read -> sw_s1_translator:uav_read
	wire  [31:0] sw_s1_agent_m0_readdata;                                                          // sw_s1_translator:uav_readdata -> sw_s1_agent:m0_readdata
	wire         sw_s1_agent_m0_readdatavalid;                                                     // sw_s1_translator:uav_readdatavalid -> sw_s1_agent:m0_readdatavalid
	wire         sw_s1_agent_m0_debugaccess;                                                       // sw_s1_agent:m0_debugaccess -> sw_s1_translator:uav_debugaccess
	wire   [3:0] sw_s1_agent_m0_byteenable;                                                        // sw_s1_agent:m0_byteenable -> sw_s1_translator:uav_byteenable
	wire         sw_s1_agent_rf_source_endofpacket;                                                // sw_s1_agent:rf_source_endofpacket -> sw_s1_agent_rsp_fifo:in_endofpacket
	wire         sw_s1_agent_rf_source_valid;                                                      // sw_s1_agent:rf_source_valid -> sw_s1_agent_rsp_fifo:in_valid
	wire         sw_s1_agent_rf_source_startofpacket;                                              // sw_s1_agent:rf_source_startofpacket -> sw_s1_agent_rsp_fifo:in_startofpacket
	wire  [96:0] sw_s1_agent_rf_source_data;                                                       // sw_s1_agent:rf_source_data -> sw_s1_agent_rsp_fifo:in_data
	wire         sw_s1_agent_rf_source_ready;                                                      // sw_s1_agent_rsp_fifo:in_ready -> sw_s1_agent:rf_source_ready
	wire         sw_s1_agent_rsp_fifo_out_endofpacket;                                             // sw_s1_agent_rsp_fifo:out_endofpacket -> sw_s1_agent:rf_sink_endofpacket
	wire         sw_s1_agent_rsp_fifo_out_valid;                                                   // sw_s1_agent_rsp_fifo:out_valid -> sw_s1_agent:rf_sink_valid
	wire         sw_s1_agent_rsp_fifo_out_startofpacket;                                           // sw_s1_agent_rsp_fifo:out_startofpacket -> sw_s1_agent:rf_sink_startofpacket
	wire  [96:0] sw_s1_agent_rsp_fifo_out_data;                                                    // sw_s1_agent_rsp_fifo:out_data -> sw_s1_agent:rf_sink_data
	wire         sw_s1_agent_rsp_fifo_out_ready;                                                   // sw_s1_agent:rf_sink_ready -> sw_s1_agent_rsp_fifo:out_ready
	wire         sw_s1_agent_rdata_fifo_src_valid;                                                 // sw_s1_agent:rdata_fifo_src_valid -> sw_s1_agent:rdata_fifo_sink_valid
	wire  [33:0] sw_s1_agent_rdata_fifo_src_data;                                                  // sw_s1_agent:rdata_fifo_src_data -> sw_s1_agent:rdata_fifo_sink_data
	wire         sw_s1_agent_rdata_fifo_src_ready;                                                 // sw_s1_agent:rdata_fifo_sink_ready -> sw_s1_agent:rdata_fifo_src_ready
	wire         cmd_mux_005_src_endofpacket;                                                      // cmd_mux_005:src_endofpacket -> sw_s1_agent:cp_endofpacket
	wire         cmd_mux_005_src_valid;                                                            // cmd_mux_005:src_valid -> sw_s1_agent:cp_valid
	wire         cmd_mux_005_src_startofpacket;                                                    // cmd_mux_005:src_startofpacket -> sw_s1_agent:cp_startofpacket
	wire  [95:0] cmd_mux_005_src_data;                                                             // cmd_mux_005:src_data -> sw_s1_agent:cp_data
	wire   [5:0] cmd_mux_005_src_channel;                                                          // cmd_mux_005:src_channel -> sw_s1_agent:cp_channel
	wire         cmd_mux_005_src_ready;                                                            // sw_s1_agent:cp_ready -> cmd_mux_005:src_ready
	wire         nios2_qsys_instruction_master_agent_cp_endofpacket;                               // nios2_qsys_instruction_master_agent:cp_endofpacket -> router:sink_endofpacket
	wire         nios2_qsys_instruction_master_agent_cp_valid;                                     // nios2_qsys_instruction_master_agent:cp_valid -> router:sink_valid
	wire         nios2_qsys_instruction_master_agent_cp_startofpacket;                             // nios2_qsys_instruction_master_agent:cp_startofpacket -> router:sink_startofpacket
	wire  [95:0] nios2_qsys_instruction_master_agent_cp_data;                                      // nios2_qsys_instruction_master_agent:cp_data -> router:sink_data
	wire         nios2_qsys_instruction_master_agent_cp_ready;                                     // router:sink_ready -> nios2_qsys_instruction_master_agent:cp_ready
	wire         nios2_qsys_data_master_agent_cp_endofpacket;                                      // nios2_qsys_data_master_agent:cp_endofpacket -> router_001:sink_endofpacket
	wire         nios2_qsys_data_master_agent_cp_valid;                                            // nios2_qsys_data_master_agent:cp_valid -> router_001:sink_valid
	wire         nios2_qsys_data_master_agent_cp_startofpacket;                                    // nios2_qsys_data_master_agent:cp_startofpacket -> router_001:sink_startofpacket
	wire  [95:0] nios2_qsys_data_master_agent_cp_data;                                             // nios2_qsys_data_master_agent:cp_data -> router_001:sink_data
	wire         nios2_qsys_data_master_agent_cp_ready;                                            // router_001:sink_ready -> nios2_qsys_data_master_agent:cp_ready
	wire         nios2_qsys_jtag_debug_module_agent_rp_endofpacket;                                // nios2_qsys_jtag_debug_module_agent:rp_endofpacket -> router_002:sink_endofpacket
	wire         nios2_qsys_jtag_debug_module_agent_rp_valid;                                      // nios2_qsys_jtag_debug_module_agent:rp_valid -> router_002:sink_valid
	wire         nios2_qsys_jtag_debug_module_agent_rp_startofpacket;                              // nios2_qsys_jtag_debug_module_agent:rp_startofpacket -> router_002:sink_startofpacket
	wire  [95:0] nios2_qsys_jtag_debug_module_agent_rp_data;                                       // nios2_qsys_jtag_debug_module_agent:rp_data -> router_002:sink_data
	wire         nios2_qsys_jtag_debug_module_agent_rp_ready;                                      // router_002:sink_ready -> nios2_qsys_jtag_debug_module_agent:rp_ready
	wire         router_002_src_endofpacket;                                                       // router_002:src_endofpacket -> rsp_demux:sink_endofpacket
	wire         router_002_src_valid;                                                             // router_002:src_valid -> rsp_demux:sink_valid
	wire         router_002_src_startofpacket;                                                     // router_002:src_startofpacket -> rsp_demux:sink_startofpacket
	wire  [95:0] router_002_src_data;                                                              // router_002:src_data -> rsp_demux:sink_data
	wire   [5:0] router_002_src_channel;                                                           // router_002:src_channel -> rsp_demux:sink_channel
	wire         router_002_src_ready;                                                             // rsp_demux:sink_ready -> router_002:src_ready
	wire         onchip_memory2_s1_agent_rp_endofpacket;                                           // onchip_memory2_s1_agent:rp_endofpacket -> router_003:sink_endofpacket
	wire         onchip_memory2_s1_agent_rp_valid;                                                 // onchip_memory2_s1_agent:rp_valid -> router_003:sink_valid
	wire         onchip_memory2_s1_agent_rp_startofpacket;                                         // onchip_memory2_s1_agent:rp_startofpacket -> router_003:sink_startofpacket
	wire  [95:0] onchip_memory2_s1_agent_rp_data;                                                  // onchip_memory2_s1_agent:rp_data -> router_003:sink_data
	wire         onchip_memory2_s1_agent_rp_ready;                                                 // router_003:sink_ready -> onchip_memory2_s1_agent:rp_ready
	wire         router_003_src_endofpacket;                                                       // router_003:src_endofpacket -> rsp_demux_001:sink_endofpacket
	wire         router_003_src_valid;                                                             // router_003:src_valid -> rsp_demux_001:sink_valid
	wire         router_003_src_startofpacket;                                                     // router_003:src_startofpacket -> rsp_demux_001:sink_startofpacket
	wire  [95:0] router_003_src_data;                                                              // router_003:src_data -> rsp_demux_001:sink_data
	wire   [5:0] router_003_src_channel;                                                           // router_003:src_channel -> rsp_demux_001:sink_channel
	wire         router_003_src_ready;                                                             // rsp_demux_001:sink_ready -> router_003:src_ready
	wire         sysid_qsys_control_slave_agent_rp_endofpacket;                                    // sysid_qsys_control_slave_agent:rp_endofpacket -> router_004:sink_endofpacket
	wire         sysid_qsys_control_slave_agent_rp_valid;                                          // sysid_qsys_control_slave_agent:rp_valid -> router_004:sink_valid
	wire         sysid_qsys_control_slave_agent_rp_startofpacket;                                  // sysid_qsys_control_slave_agent:rp_startofpacket -> router_004:sink_startofpacket
	wire  [95:0] sysid_qsys_control_slave_agent_rp_data;                                           // sysid_qsys_control_slave_agent:rp_data -> router_004:sink_data
	wire         sysid_qsys_control_slave_agent_rp_ready;                                          // router_004:sink_ready -> sysid_qsys_control_slave_agent:rp_ready
	wire         router_004_src_endofpacket;                                                       // router_004:src_endofpacket -> rsp_demux_002:sink_endofpacket
	wire         router_004_src_valid;                                                             // router_004:src_valid -> rsp_demux_002:sink_valid
	wire         router_004_src_startofpacket;                                                     // router_004:src_startofpacket -> rsp_demux_002:sink_startofpacket
	wire  [95:0] router_004_src_data;                                                              // router_004:src_data -> rsp_demux_002:sink_data
	wire   [5:0] router_004_src_channel;                                                           // router_004:src_channel -> rsp_demux_002:sink_channel
	wire         router_004_src_ready;                                                             // rsp_demux_002:sink_ready -> router_004:src_ready
	wire         jtag_uart_avalon_jtag_slave_agent_rp_endofpacket;                                 // jtag_uart_avalon_jtag_slave_agent:rp_endofpacket -> router_005:sink_endofpacket
	wire         jtag_uart_avalon_jtag_slave_agent_rp_valid;                                       // jtag_uart_avalon_jtag_slave_agent:rp_valid -> router_005:sink_valid
	wire         jtag_uart_avalon_jtag_slave_agent_rp_startofpacket;                               // jtag_uart_avalon_jtag_slave_agent:rp_startofpacket -> router_005:sink_startofpacket
	wire  [95:0] jtag_uart_avalon_jtag_slave_agent_rp_data;                                        // jtag_uart_avalon_jtag_slave_agent:rp_data -> router_005:sink_data
	wire         jtag_uart_avalon_jtag_slave_agent_rp_ready;                                       // router_005:sink_ready -> jtag_uart_avalon_jtag_slave_agent:rp_ready
	wire         router_005_src_endofpacket;                                                       // router_005:src_endofpacket -> rsp_demux_003:sink_endofpacket
	wire         router_005_src_valid;                                                             // router_005:src_valid -> rsp_demux_003:sink_valid
	wire         router_005_src_startofpacket;                                                     // router_005:src_startofpacket -> rsp_demux_003:sink_startofpacket
	wire  [95:0] router_005_src_data;                                                              // router_005:src_data -> rsp_demux_003:sink_data
	wire   [5:0] router_005_src_channel;                                                           // router_005:src_channel -> rsp_demux_003:sink_channel
	wire         router_005_src_ready;                                                             // rsp_demux_003:sink_ready -> router_005:src_ready
	wire         adc_ltc2308_slave_agent_rp_endofpacket;                                           // adc_ltc2308_slave_agent:rp_endofpacket -> router_006:sink_endofpacket
	wire         adc_ltc2308_slave_agent_rp_valid;                                                 // adc_ltc2308_slave_agent:rp_valid -> router_006:sink_valid
	wire         adc_ltc2308_slave_agent_rp_startofpacket;                                         // adc_ltc2308_slave_agent:rp_startofpacket -> router_006:sink_startofpacket
	wire  [95:0] adc_ltc2308_slave_agent_rp_data;                                                  // adc_ltc2308_slave_agent:rp_data -> router_006:sink_data
	wire         adc_ltc2308_slave_agent_rp_ready;                                                 // router_006:sink_ready -> adc_ltc2308_slave_agent:rp_ready
	wire         router_006_src_endofpacket;                                                       // router_006:src_endofpacket -> rsp_demux_004:sink_endofpacket
	wire         router_006_src_valid;                                                             // router_006:src_valid -> rsp_demux_004:sink_valid
	wire         router_006_src_startofpacket;                                                     // router_006:src_startofpacket -> rsp_demux_004:sink_startofpacket
	wire  [95:0] router_006_src_data;                                                              // router_006:src_data -> rsp_demux_004:sink_data
	wire   [5:0] router_006_src_channel;                                                           // router_006:src_channel -> rsp_demux_004:sink_channel
	wire         router_006_src_ready;                                                             // rsp_demux_004:sink_ready -> router_006:src_ready
	wire         sw_s1_agent_rp_endofpacket;                                                       // sw_s1_agent:rp_endofpacket -> router_007:sink_endofpacket
	wire         sw_s1_agent_rp_valid;                                                             // sw_s1_agent:rp_valid -> router_007:sink_valid
	wire         sw_s1_agent_rp_startofpacket;                                                     // sw_s1_agent:rp_startofpacket -> router_007:sink_startofpacket
	wire  [95:0] sw_s1_agent_rp_data;                                                              // sw_s1_agent:rp_data -> router_007:sink_data
	wire         sw_s1_agent_rp_ready;                                                             // router_007:sink_ready -> sw_s1_agent:rp_ready
	wire         router_007_src_endofpacket;                                                       // router_007:src_endofpacket -> rsp_demux_005:sink_endofpacket
	wire         router_007_src_valid;                                                             // router_007:src_valid -> rsp_demux_005:sink_valid
	wire         router_007_src_startofpacket;                                                     // router_007:src_startofpacket -> rsp_demux_005:sink_startofpacket
	wire  [95:0] router_007_src_data;                                                              // router_007:src_data -> rsp_demux_005:sink_data
	wire   [5:0] router_007_src_channel;                                                           // router_007:src_channel -> rsp_demux_005:sink_channel
	wire         router_007_src_ready;                                                             // rsp_demux_005:sink_ready -> router_007:src_ready
	wire         router_src_endofpacket;                                                           // router:src_endofpacket -> nios2_qsys_instruction_master_limiter:cmd_sink_endofpacket
	wire         router_src_valid;                                                                 // router:src_valid -> nios2_qsys_instruction_master_limiter:cmd_sink_valid
	wire         router_src_startofpacket;                                                         // router:src_startofpacket -> nios2_qsys_instruction_master_limiter:cmd_sink_startofpacket
	wire  [95:0] router_src_data;                                                                  // router:src_data -> nios2_qsys_instruction_master_limiter:cmd_sink_data
	wire   [5:0] router_src_channel;                                                               // router:src_channel -> nios2_qsys_instruction_master_limiter:cmd_sink_channel
	wire         router_src_ready;                                                                 // nios2_qsys_instruction_master_limiter:cmd_sink_ready -> router:src_ready
	wire         nios2_qsys_instruction_master_limiter_cmd_src_endofpacket;                        // nios2_qsys_instruction_master_limiter:cmd_src_endofpacket -> cmd_demux:sink_endofpacket
	wire         nios2_qsys_instruction_master_limiter_cmd_src_startofpacket;                      // nios2_qsys_instruction_master_limiter:cmd_src_startofpacket -> cmd_demux:sink_startofpacket
	wire  [95:0] nios2_qsys_instruction_master_limiter_cmd_src_data;                               // nios2_qsys_instruction_master_limiter:cmd_src_data -> cmd_demux:sink_data
	wire   [5:0] nios2_qsys_instruction_master_limiter_cmd_src_channel;                            // nios2_qsys_instruction_master_limiter:cmd_src_channel -> cmd_demux:sink_channel
	wire         nios2_qsys_instruction_master_limiter_cmd_src_ready;                              // cmd_demux:sink_ready -> nios2_qsys_instruction_master_limiter:cmd_src_ready
	wire         rsp_mux_src_endofpacket;                                                          // rsp_mux:src_endofpacket -> nios2_qsys_instruction_master_limiter:rsp_sink_endofpacket
	wire         rsp_mux_src_valid;                                                                // rsp_mux:src_valid -> nios2_qsys_instruction_master_limiter:rsp_sink_valid
	wire         rsp_mux_src_startofpacket;                                                        // rsp_mux:src_startofpacket -> nios2_qsys_instruction_master_limiter:rsp_sink_startofpacket
	wire  [95:0] rsp_mux_src_data;                                                                 // rsp_mux:src_data -> nios2_qsys_instruction_master_limiter:rsp_sink_data
	wire   [5:0] rsp_mux_src_channel;                                                              // rsp_mux:src_channel -> nios2_qsys_instruction_master_limiter:rsp_sink_channel
	wire         rsp_mux_src_ready;                                                                // nios2_qsys_instruction_master_limiter:rsp_sink_ready -> rsp_mux:src_ready
	wire         nios2_qsys_instruction_master_limiter_rsp_src_endofpacket;                        // nios2_qsys_instruction_master_limiter:rsp_src_endofpacket -> nios2_qsys_instruction_master_agent:rp_endofpacket
	wire         nios2_qsys_instruction_master_limiter_rsp_src_valid;                              // nios2_qsys_instruction_master_limiter:rsp_src_valid -> nios2_qsys_instruction_master_agent:rp_valid
	wire         nios2_qsys_instruction_master_limiter_rsp_src_startofpacket;                      // nios2_qsys_instruction_master_limiter:rsp_src_startofpacket -> nios2_qsys_instruction_master_agent:rp_startofpacket
	wire  [95:0] nios2_qsys_instruction_master_limiter_rsp_src_data;                               // nios2_qsys_instruction_master_limiter:rsp_src_data -> nios2_qsys_instruction_master_agent:rp_data
	wire   [5:0] nios2_qsys_instruction_master_limiter_rsp_src_channel;                            // nios2_qsys_instruction_master_limiter:rsp_src_channel -> nios2_qsys_instruction_master_agent:rp_channel
	wire         nios2_qsys_instruction_master_limiter_rsp_src_ready;                              // nios2_qsys_instruction_master_agent:rp_ready -> nios2_qsys_instruction_master_limiter:rsp_src_ready
	wire         router_001_src_endofpacket;                                                       // router_001:src_endofpacket -> nios2_qsys_data_master_limiter:cmd_sink_endofpacket
	wire         router_001_src_valid;                                                             // router_001:src_valid -> nios2_qsys_data_master_limiter:cmd_sink_valid
	wire         router_001_src_startofpacket;                                                     // router_001:src_startofpacket -> nios2_qsys_data_master_limiter:cmd_sink_startofpacket
	wire  [95:0] router_001_src_data;                                                              // router_001:src_data -> nios2_qsys_data_master_limiter:cmd_sink_data
	wire   [5:0] router_001_src_channel;                                                           // router_001:src_channel -> nios2_qsys_data_master_limiter:cmd_sink_channel
	wire         router_001_src_ready;                                                             // nios2_qsys_data_master_limiter:cmd_sink_ready -> router_001:src_ready
	wire         nios2_qsys_data_master_limiter_cmd_src_endofpacket;                               // nios2_qsys_data_master_limiter:cmd_src_endofpacket -> cmd_demux_001:sink_endofpacket
	wire         nios2_qsys_data_master_limiter_cmd_src_startofpacket;                             // nios2_qsys_data_master_limiter:cmd_src_startofpacket -> cmd_demux_001:sink_startofpacket
	wire  [95:0] nios2_qsys_data_master_limiter_cmd_src_data;                                      // nios2_qsys_data_master_limiter:cmd_src_data -> cmd_demux_001:sink_data
	wire   [5:0] nios2_qsys_data_master_limiter_cmd_src_channel;                                   // nios2_qsys_data_master_limiter:cmd_src_channel -> cmd_demux_001:sink_channel
	wire         nios2_qsys_data_master_limiter_cmd_src_ready;                                     // cmd_demux_001:sink_ready -> nios2_qsys_data_master_limiter:cmd_src_ready
	wire         rsp_mux_001_src_endofpacket;                                                      // rsp_mux_001:src_endofpacket -> nios2_qsys_data_master_limiter:rsp_sink_endofpacket
	wire         rsp_mux_001_src_valid;                                                            // rsp_mux_001:src_valid -> nios2_qsys_data_master_limiter:rsp_sink_valid
	wire         rsp_mux_001_src_startofpacket;                                                    // rsp_mux_001:src_startofpacket -> nios2_qsys_data_master_limiter:rsp_sink_startofpacket
	wire  [95:0] rsp_mux_001_src_data;                                                             // rsp_mux_001:src_data -> nios2_qsys_data_master_limiter:rsp_sink_data
	wire   [5:0] rsp_mux_001_src_channel;                                                          // rsp_mux_001:src_channel -> nios2_qsys_data_master_limiter:rsp_sink_channel
	wire         rsp_mux_001_src_ready;                                                            // nios2_qsys_data_master_limiter:rsp_sink_ready -> rsp_mux_001:src_ready
	wire         nios2_qsys_data_master_limiter_rsp_src_endofpacket;                               // nios2_qsys_data_master_limiter:rsp_src_endofpacket -> nios2_qsys_data_master_agent:rp_endofpacket
	wire         nios2_qsys_data_master_limiter_rsp_src_valid;                                     // nios2_qsys_data_master_limiter:rsp_src_valid -> nios2_qsys_data_master_agent:rp_valid
	wire         nios2_qsys_data_master_limiter_rsp_src_startofpacket;                             // nios2_qsys_data_master_limiter:rsp_src_startofpacket -> nios2_qsys_data_master_agent:rp_startofpacket
	wire  [95:0] nios2_qsys_data_master_limiter_rsp_src_data;                                      // nios2_qsys_data_master_limiter:rsp_src_data -> nios2_qsys_data_master_agent:rp_data
	wire   [5:0] nios2_qsys_data_master_limiter_rsp_src_channel;                                   // nios2_qsys_data_master_limiter:rsp_src_channel -> nios2_qsys_data_master_agent:rp_channel
	wire         nios2_qsys_data_master_limiter_rsp_src_ready;                                     // nios2_qsys_data_master_agent:rp_ready -> nios2_qsys_data_master_limiter:rsp_src_ready
	wire         cmd_demux_src0_endofpacket;                                                       // cmd_demux:src0_endofpacket -> cmd_mux:sink0_endofpacket
	wire         cmd_demux_src0_valid;                                                             // cmd_demux:src0_valid -> cmd_mux:sink0_valid
	wire         cmd_demux_src0_startofpacket;                                                     // cmd_demux:src0_startofpacket -> cmd_mux:sink0_startofpacket
	wire  [95:0] cmd_demux_src0_data;                                                              // cmd_demux:src0_data -> cmd_mux:sink0_data
	wire   [5:0] cmd_demux_src0_channel;                                                           // cmd_demux:src0_channel -> cmd_mux:sink0_channel
	wire         cmd_demux_src0_ready;                                                             // cmd_mux:sink0_ready -> cmd_demux:src0_ready
	wire         cmd_demux_src1_endofpacket;                                                       // cmd_demux:src1_endofpacket -> cmd_mux_001:sink0_endofpacket
	wire         cmd_demux_src1_valid;                                                             // cmd_demux:src1_valid -> cmd_mux_001:sink0_valid
	wire         cmd_demux_src1_startofpacket;                                                     // cmd_demux:src1_startofpacket -> cmd_mux_001:sink0_startofpacket
	wire  [95:0] cmd_demux_src1_data;                                                              // cmd_demux:src1_data -> cmd_mux_001:sink0_data
	wire   [5:0] cmd_demux_src1_channel;                                                           // cmd_demux:src1_channel -> cmd_mux_001:sink0_channel
	wire         cmd_demux_src1_ready;                                                             // cmd_mux_001:sink0_ready -> cmd_demux:src1_ready
	wire         cmd_demux_001_src0_endofpacket;                                                   // cmd_demux_001:src0_endofpacket -> cmd_mux:sink1_endofpacket
	wire         cmd_demux_001_src0_valid;                                                         // cmd_demux_001:src0_valid -> cmd_mux:sink1_valid
	wire         cmd_demux_001_src0_startofpacket;                                                 // cmd_demux_001:src0_startofpacket -> cmd_mux:sink1_startofpacket
	wire  [95:0] cmd_demux_001_src0_data;                                                          // cmd_demux_001:src0_data -> cmd_mux:sink1_data
	wire   [5:0] cmd_demux_001_src0_channel;                                                       // cmd_demux_001:src0_channel -> cmd_mux:sink1_channel
	wire         cmd_demux_001_src0_ready;                                                         // cmd_mux:sink1_ready -> cmd_demux_001:src0_ready
	wire         cmd_demux_001_src1_endofpacket;                                                   // cmd_demux_001:src1_endofpacket -> cmd_mux_001:sink1_endofpacket
	wire         cmd_demux_001_src1_valid;                                                         // cmd_demux_001:src1_valid -> cmd_mux_001:sink1_valid
	wire         cmd_demux_001_src1_startofpacket;                                                 // cmd_demux_001:src1_startofpacket -> cmd_mux_001:sink1_startofpacket
	wire  [95:0] cmd_demux_001_src1_data;                                                          // cmd_demux_001:src1_data -> cmd_mux_001:sink1_data
	wire   [5:0] cmd_demux_001_src1_channel;                                                       // cmd_demux_001:src1_channel -> cmd_mux_001:sink1_channel
	wire         cmd_demux_001_src1_ready;                                                         // cmd_mux_001:sink1_ready -> cmd_demux_001:src1_ready
	wire         cmd_demux_001_src2_endofpacket;                                                   // cmd_demux_001:src2_endofpacket -> cmd_mux_002:sink0_endofpacket
	wire         cmd_demux_001_src2_valid;                                                         // cmd_demux_001:src2_valid -> cmd_mux_002:sink0_valid
	wire         cmd_demux_001_src2_startofpacket;                                                 // cmd_demux_001:src2_startofpacket -> cmd_mux_002:sink0_startofpacket
	wire  [95:0] cmd_demux_001_src2_data;                                                          // cmd_demux_001:src2_data -> cmd_mux_002:sink0_data
	wire   [5:0] cmd_demux_001_src2_channel;                                                       // cmd_demux_001:src2_channel -> cmd_mux_002:sink0_channel
	wire         cmd_demux_001_src2_ready;                                                         // cmd_mux_002:sink0_ready -> cmd_demux_001:src2_ready
	wire         cmd_demux_001_src3_endofpacket;                                                   // cmd_demux_001:src3_endofpacket -> cmd_mux_003:sink0_endofpacket
	wire         cmd_demux_001_src3_valid;                                                         // cmd_demux_001:src3_valid -> cmd_mux_003:sink0_valid
	wire         cmd_demux_001_src3_startofpacket;                                                 // cmd_demux_001:src3_startofpacket -> cmd_mux_003:sink0_startofpacket
	wire  [95:0] cmd_demux_001_src3_data;                                                          // cmd_demux_001:src3_data -> cmd_mux_003:sink0_data
	wire   [5:0] cmd_demux_001_src3_channel;                                                       // cmd_demux_001:src3_channel -> cmd_mux_003:sink0_channel
	wire         cmd_demux_001_src3_ready;                                                         // cmd_mux_003:sink0_ready -> cmd_demux_001:src3_ready
	wire         cmd_demux_001_src4_endofpacket;                                                   // cmd_demux_001:src4_endofpacket -> cmd_mux_004:sink0_endofpacket
	wire         cmd_demux_001_src4_valid;                                                         // cmd_demux_001:src4_valid -> cmd_mux_004:sink0_valid
	wire         cmd_demux_001_src4_startofpacket;                                                 // cmd_demux_001:src4_startofpacket -> cmd_mux_004:sink0_startofpacket
	wire  [95:0] cmd_demux_001_src4_data;                                                          // cmd_demux_001:src4_data -> cmd_mux_004:sink0_data
	wire   [5:0] cmd_demux_001_src4_channel;                                                       // cmd_demux_001:src4_channel -> cmd_mux_004:sink0_channel
	wire         cmd_demux_001_src4_ready;                                                         // cmd_mux_004:sink0_ready -> cmd_demux_001:src4_ready
	wire         cmd_demux_001_src5_endofpacket;                                                   // cmd_demux_001:src5_endofpacket -> cmd_mux_005:sink0_endofpacket
	wire         cmd_demux_001_src5_valid;                                                         // cmd_demux_001:src5_valid -> cmd_mux_005:sink0_valid
	wire         cmd_demux_001_src5_startofpacket;                                                 // cmd_demux_001:src5_startofpacket -> cmd_mux_005:sink0_startofpacket
	wire  [95:0] cmd_demux_001_src5_data;                                                          // cmd_demux_001:src5_data -> cmd_mux_005:sink0_data
	wire   [5:0] cmd_demux_001_src5_channel;                                                       // cmd_demux_001:src5_channel -> cmd_mux_005:sink0_channel
	wire         cmd_demux_001_src5_ready;                                                         // cmd_mux_005:sink0_ready -> cmd_demux_001:src5_ready
	wire         rsp_demux_src0_endofpacket;                                                       // rsp_demux:src0_endofpacket -> rsp_mux:sink0_endofpacket
	wire         rsp_demux_src0_valid;                                                             // rsp_demux:src0_valid -> rsp_mux:sink0_valid
	wire         rsp_demux_src0_startofpacket;                                                     // rsp_demux:src0_startofpacket -> rsp_mux:sink0_startofpacket
	wire  [95:0] rsp_demux_src0_data;                                                              // rsp_demux:src0_data -> rsp_mux:sink0_data
	wire   [5:0] rsp_demux_src0_channel;                                                           // rsp_demux:src0_channel -> rsp_mux:sink0_channel
	wire         rsp_demux_src0_ready;                                                             // rsp_mux:sink0_ready -> rsp_demux:src0_ready
	wire         rsp_demux_src1_endofpacket;                                                       // rsp_demux:src1_endofpacket -> rsp_mux_001:sink0_endofpacket
	wire         rsp_demux_src1_valid;                                                             // rsp_demux:src1_valid -> rsp_mux_001:sink0_valid
	wire         rsp_demux_src1_startofpacket;                                                     // rsp_demux:src1_startofpacket -> rsp_mux_001:sink0_startofpacket
	wire  [95:0] rsp_demux_src1_data;                                                              // rsp_demux:src1_data -> rsp_mux_001:sink0_data
	wire   [5:0] rsp_demux_src1_channel;                                                           // rsp_demux:src1_channel -> rsp_mux_001:sink0_channel
	wire         rsp_demux_src1_ready;                                                             // rsp_mux_001:sink0_ready -> rsp_demux:src1_ready
	wire         rsp_demux_001_src0_endofpacket;                                                   // rsp_demux_001:src0_endofpacket -> rsp_mux:sink1_endofpacket
	wire         rsp_demux_001_src0_valid;                                                         // rsp_demux_001:src0_valid -> rsp_mux:sink1_valid
	wire         rsp_demux_001_src0_startofpacket;                                                 // rsp_demux_001:src0_startofpacket -> rsp_mux:sink1_startofpacket
	wire  [95:0] rsp_demux_001_src0_data;                                                          // rsp_demux_001:src0_data -> rsp_mux:sink1_data
	wire   [5:0] rsp_demux_001_src0_channel;                                                       // rsp_demux_001:src0_channel -> rsp_mux:sink1_channel
	wire         rsp_demux_001_src0_ready;                                                         // rsp_mux:sink1_ready -> rsp_demux_001:src0_ready
	wire         rsp_demux_001_src1_endofpacket;                                                   // rsp_demux_001:src1_endofpacket -> rsp_mux_001:sink1_endofpacket
	wire         rsp_demux_001_src1_valid;                                                         // rsp_demux_001:src1_valid -> rsp_mux_001:sink1_valid
	wire         rsp_demux_001_src1_startofpacket;                                                 // rsp_demux_001:src1_startofpacket -> rsp_mux_001:sink1_startofpacket
	wire  [95:0] rsp_demux_001_src1_data;                                                          // rsp_demux_001:src1_data -> rsp_mux_001:sink1_data
	wire   [5:0] rsp_demux_001_src1_channel;                                                       // rsp_demux_001:src1_channel -> rsp_mux_001:sink1_channel
	wire         rsp_demux_001_src1_ready;                                                         // rsp_mux_001:sink1_ready -> rsp_demux_001:src1_ready
	wire         rsp_demux_002_src0_endofpacket;                                                   // rsp_demux_002:src0_endofpacket -> rsp_mux_001:sink2_endofpacket
	wire         rsp_demux_002_src0_valid;                                                         // rsp_demux_002:src0_valid -> rsp_mux_001:sink2_valid
	wire         rsp_demux_002_src0_startofpacket;                                                 // rsp_demux_002:src0_startofpacket -> rsp_mux_001:sink2_startofpacket
	wire  [95:0] rsp_demux_002_src0_data;                                                          // rsp_demux_002:src0_data -> rsp_mux_001:sink2_data
	wire   [5:0] rsp_demux_002_src0_channel;                                                       // rsp_demux_002:src0_channel -> rsp_mux_001:sink2_channel
	wire         rsp_demux_002_src0_ready;                                                         // rsp_mux_001:sink2_ready -> rsp_demux_002:src0_ready
	wire         rsp_demux_003_src0_endofpacket;                                                   // rsp_demux_003:src0_endofpacket -> rsp_mux_001:sink3_endofpacket
	wire         rsp_demux_003_src0_valid;                                                         // rsp_demux_003:src0_valid -> rsp_mux_001:sink3_valid
	wire         rsp_demux_003_src0_startofpacket;                                                 // rsp_demux_003:src0_startofpacket -> rsp_mux_001:sink3_startofpacket
	wire  [95:0] rsp_demux_003_src0_data;                                                          // rsp_demux_003:src0_data -> rsp_mux_001:sink3_data
	wire   [5:0] rsp_demux_003_src0_channel;                                                       // rsp_demux_003:src0_channel -> rsp_mux_001:sink3_channel
	wire         rsp_demux_003_src0_ready;                                                         // rsp_mux_001:sink3_ready -> rsp_demux_003:src0_ready
	wire         rsp_demux_004_src0_endofpacket;                                                   // rsp_demux_004:src0_endofpacket -> rsp_mux_001:sink4_endofpacket
	wire         rsp_demux_004_src0_valid;                                                         // rsp_demux_004:src0_valid -> rsp_mux_001:sink4_valid
	wire         rsp_demux_004_src0_startofpacket;                                                 // rsp_demux_004:src0_startofpacket -> rsp_mux_001:sink4_startofpacket
	wire  [95:0] rsp_demux_004_src0_data;                                                          // rsp_demux_004:src0_data -> rsp_mux_001:sink4_data
	wire   [5:0] rsp_demux_004_src0_channel;                                                       // rsp_demux_004:src0_channel -> rsp_mux_001:sink4_channel
	wire         rsp_demux_004_src0_ready;                                                         // rsp_mux_001:sink4_ready -> rsp_demux_004:src0_ready
	wire         rsp_demux_005_src0_endofpacket;                                                   // rsp_demux_005:src0_endofpacket -> rsp_mux_001:sink5_endofpacket
	wire         rsp_demux_005_src0_valid;                                                         // rsp_demux_005:src0_valid -> rsp_mux_001:sink5_valid
	wire         rsp_demux_005_src0_startofpacket;                                                 // rsp_demux_005:src0_startofpacket -> rsp_mux_001:sink5_startofpacket
	wire  [95:0] rsp_demux_005_src0_data;                                                          // rsp_demux_005:src0_data -> rsp_mux_001:sink5_data
	wire   [5:0] rsp_demux_005_src0_channel;                                                       // rsp_demux_005:src0_channel -> rsp_mux_001:sink5_channel
	wire         rsp_demux_005_src0_ready;                                                         // rsp_mux_001:sink5_ready -> rsp_demux_005:src0_ready
	wire   [5:0] nios2_qsys_instruction_master_limiter_cmd_valid_data;                             // nios2_qsys_instruction_master_limiter:cmd_src_valid -> cmd_demux:sink_valid
	wire   [5:0] nios2_qsys_data_master_limiter_cmd_valid_data;                                    // nios2_qsys_data_master_limiter:cmd_src_valid -> cmd_demux_001:sink_valid
 
	altera_merlin_master_translator #(
		.AV_ADDRESS_W                (20),
		.AV_DATA_W                   (32),
		.AV_BURSTCOUNT_W             (1),
		.AV_BYTEENABLE_W             (4),
		.UAV_ADDRESS_W               (20),
		.UAV_BURSTCOUNT_W            (3),
		.USE_READ                    (1),
		.USE_WRITE                   (0),
		.USE_BEGINBURSTTRANSFER      (0),
		.USE_BEGINTRANSFER           (0),
		.USE_CHIPSELECT              (0),
		.USE_BURSTCOUNT              (0),
		.USE_READDATAVALID           (1),
		.USE_WAITREQUEST             (1),
		.USE_READRESPONSE            (0),
		.USE_WRITERESPONSE           (0),
		.AV_SYMBOLS_PER_WORD         (4),
		.AV_ADDRESS_SYMBOLS          (1),
		.AV_BURSTCOUNT_SYMBOLS       (0),
		.AV_CONSTANT_BURST_BEHAVIOR  (0),
		.UAV_CONSTANT_BURST_BEHAVIOR (0),
		.AV_LINEWRAPBURSTS           (1),
		.AV_REGISTERINCOMINGSIGNALS  (0)
	) nios2_qsys_instruction_master_translator (
		.clk                      (pll_sys_outclk0_clk),                                                              //                       clk.clk
		.reset                    (nios2_qsys_reset_n_reset_bridge_in_reset_reset),                                   //                     reset.reset
		.uav_address              (nios2_qsys_instruction_master_translator_avalon_universal_master_0_address),       // avalon_universal_master_0.address
		.uav_burstcount           (nios2_qsys_instruction_master_translator_avalon_universal_master_0_burstcount),    //                          .burstcount
		.uav_read                 (nios2_qsys_instruction_master_translator_avalon_universal_master_0_read),          //                          .read
		.uav_write                (nios2_qsys_instruction_master_translator_avalon_universal_master_0_write),         //                          .write
		.uav_waitrequest          (nios2_qsys_instruction_master_translator_avalon_universal_master_0_waitrequest),   //                          .waitrequest
		.uav_readdatavalid        (nios2_qsys_instruction_master_translator_avalon_universal_master_0_readdatavalid), //                          .readdatavalid
		.uav_byteenable           (nios2_qsys_instruction_master_translator_avalon_universal_master_0_byteenable),    //                          .byteenable
		.uav_readdata             (nios2_qsys_instruction_master_translator_avalon_universal_master_0_readdata),      //                          .readdata
		.uav_writedata            (nios2_qsys_instruction_master_translator_avalon_universal_master_0_writedata),     //                          .writedata
		.uav_lock                 (nios2_qsys_instruction_master_translator_avalon_universal_master_0_lock),          //                          .lock
		.uav_debugaccess          (nios2_qsys_instruction_master_translator_avalon_universal_master_0_debugaccess),   //                          .debugaccess
		.av_address               (nios2_qsys_instruction_master_address),                                            //      avalon_anti_master_0.address
		.av_waitrequest           (nios2_qsys_instruction_master_waitrequest),                                        //                          .waitrequest
		.av_read                  (nios2_qsys_instruction_master_read),                                               //                          .read
		.av_readdata              (nios2_qsys_instruction_master_readdata),                                           //                          .readdata
		.av_readdatavalid         (nios2_qsys_instruction_master_readdatavalid),                                      //                          .readdatavalid
		.av_burstcount            (1'b1),                                                                             //               (terminated)
		.av_byteenable            (4'b1111),                                                                          //               (terminated)
		.av_beginbursttransfer    (1'b0),                                                                             //               (terminated)
		.av_begintransfer         (1'b0),                                                                             //               (terminated)
		.av_chipselect            (1'b0),                                                                             //               (terminated)
		.av_write                 (1'b0),                                                                             //               (terminated)
		.av_writedata             (32'b00000000000000000000000000000000),                                             //               (terminated)
		.av_lock                  (1'b0),                                                                             //               (terminated)
		.av_debugaccess           (1'b0),                                                                             //               (terminated)
		.uav_clken                (),                                                                                 //               (terminated)
		.av_clken                 (1'b1),                                                                             //               (terminated)
		.uav_response             (2'b00),                                                                            //               (terminated)
		.av_response              (),                                                                                 //               (terminated)
		.uav_writeresponserequest (),                                                                                 //               (terminated)
		.uav_writeresponsevalid   (1'b0),                                                                             //               (terminated)
		.av_writeresponserequest  (1'b0),                                                                             //               (terminated)
		.av_writeresponsevalid    ()                                                                                  //               (terminated)
	);
 
	altera_merlin_master_translator #(
		.AV_ADDRESS_W                (20),
		.AV_DATA_W                   (32),
		.AV_BURSTCOUNT_W             (1),
		.AV_BYTEENABLE_W             (4),
		.UAV_ADDRESS_W               (20),
		.UAV_BURSTCOUNT_W            (3),
		.USE_READ                    (1),
		.USE_WRITE                   (1),
		.USE_BEGINBURSTTRANSFER      (0),
		.USE_BEGINTRANSFER           (0),
		.USE_CHIPSELECT              (0),
		.USE_BURSTCOUNT              (0),
		.USE_READDATAVALID           (1),
		.USE_WAITREQUEST             (1),
		.USE_READRESPONSE            (0),
		.USE_WRITERESPONSE           (0),
		.AV_SYMBOLS_PER_WORD         (4),
		.AV_ADDRESS_SYMBOLS          (1),
		.AV_BURSTCOUNT_SYMBOLS       (0),
		.AV_CONSTANT_BURST_BEHAVIOR  (0),
		.UAV_CONSTANT_BURST_BEHAVIOR (0),
		.AV_LINEWRAPBURSTS           (0),
		.AV_REGISTERINCOMINGSIGNALS  (0)
	) nios2_qsys_data_master_translator (
		.clk                      (pll_sys_outclk0_clk),                                                       //                       clk.clk
		.reset                    (nios2_qsys_reset_n_reset_bridge_in_reset_reset),                            //                     reset.reset
		.uav_address              (nios2_qsys_data_master_translator_avalon_universal_master_0_address),       // avalon_universal_master_0.address
		.uav_burstcount           (nios2_qsys_data_master_translator_avalon_universal_master_0_burstcount),    //                          .burstcount
		.uav_read                 (nios2_qsys_data_master_translator_avalon_universal_master_0_read),          //                          .read
		.uav_write                (nios2_qsys_data_master_translator_avalon_universal_master_0_write),         //                          .write
		.uav_waitrequest          (nios2_qsys_data_master_translator_avalon_universal_master_0_waitrequest),   //                          .waitrequest
		.uav_readdatavalid        (nios2_qsys_data_master_translator_avalon_universal_master_0_readdatavalid), //                          .readdatavalid
		.uav_byteenable           (nios2_qsys_data_master_translator_avalon_universal_master_0_byteenable),    //                          .byteenable
		.uav_readdata             (nios2_qsys_data_master_translator_avalon_universal_master_0_readdata),      //                          .readdata
		.uav_writedata            (nios2_qsys_data_master_translator_avalon_universal_master_0_writedata),     //                          .writedata
		.uav_lock                 (nios2_qsys_data_master_translator_avalon_universal_master_0_lock),          //                          .lock
		.uav_debugaccess          (nios2_qsys_data_master_translator_avalon_universal_master_0_debugaccess),   //                          .debugaccess
		.av_address               (nios2_qsys_data_master_address),                                            //      avalon_anti_master_0.address
		.av_waitrequest           (nios2_qsys_data_master_waitrequest),                                        //                          .waitrequest
		.av_byteenable            (nios2_qsys_data_master_byteenable),                                         //                          .byteenable
		.av_read                  (nios2_qsys_data_master_read),                                               //                          .read
		.av_readdata              (nios2_qsys_data_master_readdata),                                           //                          .readdata
		.av_readdatavalid         (nios2_qsys_data_master_readdatavalid),                                      //                          .readdatavalid
		.av_write                 (nios2_qsys_data_master_write),                                              //                          .write
		.av_writedata             (nios2_qsys_data_master_writedata),                                          //                          .writedata
		.av_debugaccess           (nios2_qsys_data_master_debugaccess),                                        //                          .debugaccess
		.av_burstcount            (1'b1),                                                                      //               (terminated)
		.av_beginbursttransfer    (1'b0),                                                                      //               (terminated)
		.av_begintransfer         (1'b0),                                                                      //               (terminated)
		.av_chipselect            (1'b0),                                                                      //               (terminated)
		.av_lock                  (1'b0),                                                                      //               (terminated)
		.uav_clken                (),                                                                          //               (terminated)
		.av_clken                 (1'b1),                                                                      //               (terminated)
		.uav_response             (2'b00),                                                                     //               (terminated)
		.av_response              (),                                                                          //               (terminated)
		.uav_writeresponserequest (),                                                                          //               (terminated)
		.uav_writeresponsevalid   (1'b0),                                                                      //               (terminated)
		.av_writeresponserequest  (1'b0),                                                                      //               (terminated)
		.av_writeresponsevalid    ()                                                                           //               (terminated)
	);
 
	altera_merlin_slave_translator #(
		.AV_ADDRESS_W                   (9),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (4),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (20),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (0),
		.USE_WAITREQUEST                (1),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0)
	) nios2_qsys_jtag_debug_module_translator (
		.clk                      (pll_sys_outclk0_clk),                                 //                      clk.clk
		.reset                    (nios2_qsys_reset_n_reset_bridge_in_reset_reset),      //                    reset.reset
		.uav_address              (nios2_qsys_jtag_debug_module_agent_m0_address),       // avalon_universal_slave_0.address
		.uav_burstcount           (nios2_qsys_jtag_debug_module_agent_m0_burstcount),    //                         .burstcount
		.uav_read                 (nios2_qsys_jtag_debug_module_agent_m0_read),          //                         .read
		.uav_write                (nios2_qsys_jtag_debug_module_agent_m0_write),         //                         .write
		.uav_waitrequest          (nios2_qsys_jtag_debug_module_agent_m0_waitrequest),   //                         .waitrequest
		.uav_readdatavalid        (nios2_qsys_jtag_debug_module_agent_m0_readdatavalid), //                         .readdatavalid
		.uav_byteenable           (nios2_qsys_jtag_debug_module_agent_m0_byteenable),    //                         .byteenable
		.uav_readdata             (nios2_qsys_jtag_debug_module_agent_m0_readdata),      //                         .readdata
		.uav_writedata            (nios2_qsys_jtag_debug_module_agent_m0_writedata),     //                         .writedata
		.uav_lock                 (nios2_qsys_jtag_debug_module_agent_m0_lock),          //                         .lock
		.uav_debugaccess          (nios2_qsys_jtag_debug_module_agent_m0_debugaccess),   //                         .debugaccess
		.av_address               (nios2_qsys_jtag_debug_module_address),                //      avalon_anti_slave_0.address
		.av_write                 (nios2_qsys_jtag_debug_module_write),                  //                         .write
		.av_read                  (nios2_qsys_jtag_debug_module_read),                   //                         .read
		.av_readdata              (nios2_qsys_jtag_debug_module_readdata),               //                         .readdata
		.av_writedata             (nios2_qsys_jtag_debug_module_writedata),              //                         .writedata
		.av_byteenable            (nios2_qsys_jtag_debug_module_byteenable),             //                         .byteenable
		.av_waitrequest           (nios2_qsys_jtag_debug_module_waitrequest),            //                         .waitrequest
		.av_debugaccess           (nios2_qsys_jtag_debug_module_debugaccess),            //                         .debugaccess
		.av_begintransfer         (),                                                    //              (terminated)
		.av_beginbursttransfer    (),                                                    //              (terminated)
		.av_burstcount            (),                                                    //              (terminated)
		.av_readdatavalid         (1'b0),                                                //              (terminated)
		.av_writebyteenable       (),                                                    //              (terminated)
		.av_lock                  (),                                                    //              (terminated)
		.av_chipselect            (),                                                    //              (terminated)
		.av_clken                 (),                                                    //              (terminated)
		.uav_clken                (1'b0),                                                //              (terminated)
		.av_outputenable          (),                                                    //              (terminated)
		.uav_response             (),                                                    //              (terminated)
		.av_response              (2'b00),                                               //              (terminated)
		.uav_writeresponserequest (1'b0),                                                //              (terminated)
		.uav_writeresponsevalid   (),                                                    //              (terminated)
		.av_writeresponserequest  (),                                                    //              (terminated)
		.av_writeresponsevalid    (1'b0)                                                 //              (terminated)
	);
 
	altera_merlin_slave_translator #(
		.AV_ADDRESS_W                   (16),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (4),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (20),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (1),
		.USE_READDATAVALID              (0),
		.USE_WAITREQUEST                (0),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (0),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0)
	) onchip_memory2_s1_translator (
		.clk                      (pll_sys_outclk0_clk),                               //                      clk.clk
		.reset                    (onchip_memory2_reset1_reset_bridge_in_reset_reset), //                    reset.reset
		.uav_address              (onchip_memory2_s1_agent_m0_address),                // avalon_universal_slave_0.address
		.uav_burstcount           (onchip_memory2_s1_agent_m0_burstcount),             //                         .burstcount
		.uav_read                 (onchip_memory2_s1_agent_m0_read),                   //                         .read
		.uav_write                (onchip_memory2_s1_agent_m0_write),                  //                         .write
		.uav_waitrequest          (onchip_memory2_s1_agent_m0_waitrequest),            //                         .waitrequest
		.uav_readdatavalid        (onchip_memory2_s1_agent_m0_readdatavalid),          //                         .readdatavalid
		.uav_byteenable           (onchip_memory2_s1_agent_m0_byteenable),             //                         .byteenable
		.uav_readdata             (onchip_memory2_s1_agent_m0_readdata),               //                         .readdata
		.uav_writedata            (onchip_memory2_s1_agent_m0_writedata),              //                         .writedata
		.uav_lock                 (onchip_memory2_s1_agent_m0_lock),                   //                         .lock
		.uav_debugaccess          (onchip_memory2_s1_agent_m0_debugaccess),            //                         .debugaccess
		.av_address               (onchip_memory2_s1_address),                         //      avalon_anti_slave_0.address
		.av_write                 (onchip_memory2_s1_write),                           //                         .write
		.av_readdata              (onchip_memory2_s1_readdata),                        //                         .readdata
		.av_writedata             (onchip_memory2_s1_writedata),                       //                         .writedata
		.av_byteenable            (onchip_memory2_s1_byteenable),                      //                         .byteenable
		.av_chipselect            (onchip_memory2_s1_chipselect),                      //                         .chipselect
		.av_clken                 (onchip_memory2_s1_clken),                           //                         .clken
		.av_read                  (),                                                  //              (terminated)
		.av_begintransfer         (),                                                  //              (terminated)
		.av_beginbursttransfer    (),                                                  //              (terminated)
		.av_burstcount            (),                                                  //              (terminated)
		.av_readdatavalid         (1'b0),                                              //              (terminated)
		.av_waitrequest           (1'b0),                                              //              (terminated)
		.av_writebyteenable       (),                                                  //              (terminated)
		.av_lock                  (),                                                  //              (terminated)
		.uav_clken                (1'b0),                                              //              (terminated)
		.av_debugaccess           (),                                                  //              (terminated)
		.av_outputenable          (),                                                  //              (terminated)
		.uav_response             (),                                                  //              (terminated)
		.av_response              (2'b00),                                             //              (terminated)
		.uav_writeresponserequest (1'b0),                                              //              (terminated)
		.uav_writeresponsevalid   (),                                                  //              (terminated)
		.av_writeresponserequest  (),                                                  //              (terminated)
		.av_writeresponsevalid    (1'b0)                                               //              (terminated)
	);
 
	altera_merlin_slave_translator #(
		.AV_ADDRESS_W                   (1),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (4),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (20),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (0),
		.USE_WAITREQUEST                (0),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0)
	) sysid_qsys_control_slave_translator (
		.clk                      (pll_sys_outclk0_clk),                               //                      clk.clk
		.reset                    (onchip_memory2_reset1_reset_bridge_in_reset_reset), //                    reset.reset
		.uav_address              (sysid_qsys_control_slave_agent_m0_address),         // avalon_universal_slave_0.address
		.uav_burstcount           (sysid_qsys_control_slave_agent_m0_burstcount),      //                         .burstcount
		.uav_read                 (sysid_qsys_control_slave_agent_m0_read),            //                         .read
		.uav_write                (sysid_qsys_control_slave_agent_m0_write),           //                         .write
		.uav_waitrequest          (sysid_qsys_control_slave_agent_m0_waitrequest),     //                         .waitrequest
		.uav_readdatavalid        (sysid_qsys_control_slave_agent_m0_readdatavalid),   //                         .readdatavalid
		.uav_byteenable           (sysid_qsys_control_slave_agent_m0_byteenable),      //                         .byteenable
		.uav_readdata             (sysid_qsys_control_slave_agent_m0_readdata),        //                         .readdata
		.uav_writedata            (sysid_qsys_control_slave_agent_m0_writedata),       //                         .writedata
		.uav_lock                 (sysid_qsys_control_slave_agent_m0_lock),            //                         .lock
		.uav_debugaccess          (sysid_qsys_control_slave_agent_m0_debugaccess),     //                         .debugaccess
		.av_address               (sysid_qsys_control_slave_address),                  //      avalon_anti_slave_0.address
		.av_readdata              (sysid_qsys_control_slave_readdata),                 //                         .readdata
		.av_write                 (),                                                  //              (terminated)
		.av_read                  (),                                                  //              (terminated)
		.av_writedata             (),                                                  //              (terminated)
		.av_begintransfer         (),                                                  //              (terminated)
		.av_beginbursttransfer    (),                                                  //              (terminated)
		.av_burstcount            (),                                                  //              (terminated)
		.av_byteenable            (),                                                  //              (terminated)
		.av_readdatavalid         (1'b0),                                              //              (terminated)
		.av_waitrequest           (1'b0),                                              //              (terminated)
		.av_writebyteenable       (),                                                  //              (terminated)
		.av_lock                  (),                                                  //              (terminated)
		.av_chipselect            (),                                                  //              (terminated)
		.av_clken                 (),                                                  //              (terminated)
		.uav_clken                (1'b0),                                              //              (terminated)
		.av_debugaccess           (),                                                  //              (terminated)
		.av_outputenable          (),                                                  //              (terminated)
		.uav_response             (),                                                  //              (terminated)
		.av_response              (2'b00),                                             //              (terminated)
		.uav_writeresponserequest (1'b0),                                              //              (terminated)
		.uav_writeresponsevalid   (),                                                  //              (terminated)
		.av_writeresponserequest  (),                                                  //              (terminated)
		.av_writeresponsevalid    (1'b0)                                               //              (terminated)
	);
 
	altera_merlin_slave_translator #(
		.AV_ADDRESS_W                   (1),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (1),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (20),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (0),
		.USE_WAITREQUEST                (1),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0)
	) jtag_uart_avalon_jtag_slave_translator (
		.clk                      (pll_sys_outclk0_clk),                                //                      clk.clk
		.reset                    (onchip_memory2_reset1_reset_bridge_in_reset_reset),  //                    reset.reset
		.uav_address              (jtag_uart_avalon_jtag_slave_agent_m0_address),       // avalon_universal_slave_0.address
		.uav_burstcount           (jtag_uart_avalon_jtag_slave_agent_m0_burstcount),    //                         .burstcount
		.uav_read                 (jtag_uart_avalon_jtag_slave_agent_m0_read),          //                         .read
		.uav_write                (jtag_uart_avalon_jtag_slave_agent_m0_write),         //                         .write
		.uav_waitrequest          (jtag_uart_avalon_jtag_slave_agent_m0_waitrequest),   //                         .waitrequest
		.uav_readdatavalid        (jtag_uart_avalon_jtag_slave_agent_m0_readdatavalid), //                         .readdatavalid
		.uav_byteenable           (jtag_uart_avalon_jtag_slave_agent_m0_byteenable),    //                         .byteenable
		.uav_readdata             (jtag_uart_avalon_jtag_slave_agent_m0_readdata),      //                         .readdata
		.uav_writedata            (jtag_uart_avalon_jtag_slave_agent_m0_writedata),     //                         .writedata
		.uav_lock                 (jtag_uart_avalon_jtag_slave_agent_m0_lock),          //                         .lock
		.uav_debugaccess          (jtag_uart_avalon_jtag_slave_agent_m0_debugaccess),   //                         .debugaccess
		.av_address               (jtag_uart_avalon_jtag_slave_address),                //      avalon_anti_slave_0.address
		.av_write                 (jtag_uart_avalon_jtag_slave_write),                  //                         .write
		.av_read                  (jtag_uart_avalon_jtag_slave_read),                   //                         .read
		.av_readdata              (jtag_uart_avalon_jtag_slave_readdata),               //                         .readdata
		.av_writedata             (jtag_uart_avalon_jtag_slave_writedata),              //                         .writedata
		.av_waitrequest           (jtag_uart_avalon_jtag_slave_waitrequest),            //                         .waitrequest
		.av_chipselect            (jtag_uart_avalon_jtag_slave_chipselect),             //                         .chipselect
		.av_begintransfer         (),                                                   //              (terminated)
		.av_beginbursttransfer    (),                                                   //              (terminated)
		.av_burstcount            (),                                                   //              (terminated)
		.av_byteenable            (),                                                   //              (terminated)
		.av_readdatavalid         (1'b0),                                               //              (terminated)
		.av_writebyteenable       (),                                                   //              (terminated)
		.av_lock                  (),                                                   //              (terminated)
		.av_clken                 (),                                                   //              (terminated)
		.uav_clken                (1'b0),                                               //              (terminated)
		.av_debugaccess           (),                                                   //              (terminated)
		.av_outputenable          (),                                                   //              (terminated)
		.uav_response             (),                                                   //              (terminated)
		.av_response              (2'b00),                                              //              (terminated)
		.uav_writeresponserequest (1'b0),                                               //              (terminated)
		.uav_writeresponsevalid   (),                                                   //              (terminated)
		.av_writeresponserequest  (),                                                   //              (terminated)
		.av_writeresponsevalid    (1'b0)                                                //              (terminated)
	);
 
	altera_merlin_slave_translator #(
		.AV_ADDRESS_W                   (1),
		.AV_DATA_W                      (16),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (1),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (20),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (0),
		.USE_WAITREQUEST                (0),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0)
	) adc_ltc2308_slave_translator (
		.clk                      (pll_sys_outclk0_clk),                               //                      clk.clk
		.reset                    (onchip_memory2_reset1_reset_bridge_in_reset_reset), //                    reset.reset
		.uav_address              (adc_ltc2308_slave_agent_m0_address),                // avalon_universal_slave_0.address
		.uav_burstcount           (adc_ltc2308_slave_agent_m0_burstcount),             //                         .burstcount
		.uav_read                 (adc_ltc2308_slave_agent_m0_read),                   //                         .read
		.uav_write                (adc_ltc2308_slave_agent_m0_write),                  //                         .write
		.uav_waitrequest          (adc_ltc2308_slave_agent_m0_waitrequest),            //                         .waitrequest
		.uav_readdatavalid        (adc_ltc2308_slave_agent_m0_readdatavalid),          //                         .readdatavalid
		.uav_byteenable           (adc_ltc2308_slave_agent_m0_byteenable),             //                         .byteenable
		.uav_readdata             (adc_ltc2308_slave_agent_m0_readdata),               //                         .readdata
		.uav_writedata            (adc_ltc2308_slave_agent_m0_writedata),              //                         .writedata
		.uav_lock                 (adc_ltc2308_slave_agent_m0_lock),                   //                         .lock
		.uav_debugaccess          (adc_ltc2308_slave_agent_m0_debugaccess),            //                         .debugaccess
		.av_address               (adc_ltc2308_slave_address),                         //      avalon_anti_slave_0.address
		.av_write                 (adc_ltc2308_slave_write),                           //                         .write
		.av_read                  (adc_ltc2308_slave_read),                            //                         .read
		.av_readdata              (adc_ltc2308_slave_readdata),                        //                         .readdata
		.av_writedata             (adc_ltc2308_slave_writedata),                       //                         .writedata
		.av_chipselect            (adc_ltc2308_slave_chipselect),                      //                         .chipselect
		.av_begintransfer         (),                                                  //              (terminated)
		.av_beginbursttransfer    (),                                                  //              (terminated)
		.av_burstcount            (),                                                  //              (terminated)
		.av_byteenable            (),                                                  //              (terminated)
		.av_readdatavalid         (1'b0),                                              //              (terminated)
		.av_waitrequest           (1'b0),                                              //              (terminated)
		.av_writebyteenable       (),                                                  //              (terminated)
		.av_lock                  (),                                                  //              (terminated)
		.av_clken                 (),                                                  //              (terminated)
		.uav_clken                (1'b0),                                              //              (terminated)
		.av_debugaccess           (),                                                  //              (terminated)
		.av_outputenable          (),                                                  //              (terminated)
		.uav_response             (),                                                  //              (terminated)
		.av_response              (2'b00),                                             //              (terminated)
		.uav_writeresponserequest (1'b0),                                              //              (terminated)
		.uav_writeresponsevalid   (),                                                  //              (terminated)
		.av_writeresponserequest  (),                                                  //              (terminated)
		.av_writeresponsevalid    (1'b0)                                               //              (terminated)
	);
 
	altera_merlin_slave_translator #(
		.AV_ADDRESS_W                   (2),
		.AV_DATA_W                      (32),
		.UAV_DATA_W                     (32),
		.AV_BURSTCOUNT_W                (1),
		.AV_BYTEENABLE_W                (1),
		.UAV_BYTEENABLE_W               (4),
		.UAV_ADDRESS_W                  (20),
		.UAV_BURSTCOUNT_W               (3),
		.AV_READLATENCY                 (0),
		.USE_READDATAVALID              (0),
		.USE_WAITREQUEST                (0),
		.USE_UAV_CLKEN                  (0),
		.USE_READRESPONSE               (0),
		.USE_WRITERESPONSE              (0),
		.AV_SYMBOLS_PER_WORD            (4),
		.AV_ADDRESS_SYMBOLS             (0),
		.AV_BURSTCOUNT_SYMBOLS          (0),
		.AV_CONSTANT_BURST_BEHAVIOR     (0),
		.UAV_CONSTANT_BURST_BEHAVIOR    (0),
		.AV_REQUIRE_UNALIGNED_ADDRESSES (0),
		.CHIPSELECT_THROUGH_READLATENCY (0),
		.AV_READ_WAIT_CYCLES            (1),
		.AV_WRITE_WAIT_CYCLES           (0),
		.AV_SETUP_WAIT_CYCLES           (0),
		.AV_DATA_HOLD_CYCLES            (0)
	) sw_s1_translator (
		.clk                      (pll_sys_outclk0_clk),                               //                      clk.clk
		.reset                    (onchip_memory2_reset1_reset_bridge_in_reset_reset), //                    reset.reset
		.uav_address              (sw_s1_agent_m0_address),                            // avalon_universal_slave_0.address
		.uav_burstcount           (sw_s1_agent_m0_burstcount),                         //                         .burstcount
		.uav_read                 (sw_s1_agent_m0_read),                               //                         .read
		.uav_write                (sw_s1_agent_m0_write),                              //                         .write
		.uav_waitrequest          (sw_s1_agent_m0_waitrequest),                        //                         .waitrequest
		.uav_readdatavalid        (sw_s1_agent_m0_readdatavalid),                      //                         .readdatavalid
		.uav_byteenable           (sw_s1_agent_m0_byteenable),                         //                         .byteenable
		.uav_readdata             (sw_s1_agent_m0_readdata),                           //                         .readdata
		.uav_writedata            (sw_s1_agent_m0_writedata),                          //                         .writedata
		.uav_lock                 (sw_s1_agent_m0_lock),                               //                         .lock
		.uav_debugaccess          (sw_s1_agent_m0_debugaccess),                        //                         .debugaccess
		.av_address               (sw_s1_address),                                     //      avalon_anti_slave_0.address
		.av_write                 (sw_s1_write),                                       //                         .write
		.av_readdata              (sw_s1_readdata),                                    //                         .readdata
		.av_writedata             (sw_s1_writedata),                                   //                         .writedata
		.av_chipselect            (sw_s1_chipselect),                                  //                         .chipselect
		.av_read                  (),                                                  //              (terminated)
		.av_begintransfer         (),                                                  //              (terminated)
		.av_beginbursttransfer    (),                                                  //              (terminated)
		.av_burstcount            (),                                                  //              (terminated)
		.av_byteenable            (),                                                  //              (terminated)
		.av_readdatavalid         (1'b0),                                              //              (terminated)
		.av_waitrequest           (1'b0),                                              //              (terminated)
		.av_writebyteenable       (),                                                  //              (terminated)
		.av_lock                  (),                                                  //              (terminated)
		.av_clken                 (),                                                  //              (terminated)
		.uav_clken                (1'b0),                                              //              (terminated)
		.av_debugaccess           (),                                                  //              (terminated)
		.av_outputenable          (),                                                  //              (terminated)
		.uav_response             (),                                                  //              (terminated)
		.av_response              (2'b00),                                             //              (terminated)
		.uav_writeresponserequest (1'b0),                                              //              (terminated)
		.uav_writeresponsevalid   (),                                                  //              (terminated)
		.av_writeresponserequest  (),                                                  //              (terminated)
		.av_writeresponsevalid    (1'b0)                                               //              (terminated)
	);
 
	altera_merlin_master_agent #(
		.PKT_PROTECTION_H          (86),
		.PKT_PROTECTION_L          (84),
		.PKT_BEGIN_BURST           (75),
		.PKT_BURSTWRAP_H           (67),
		.PKT_BURSTWRAP_L           (65),
		.PKT_BURST_SIZE_H          (70),
		.PKT_BURST_SIZE_L          (68),
		.PKT_BURST_TYPE_H          (72),
		.PKT_BURST_TYPE_L          (71),
		.PKT_BYTE_CNT_H            (64),
		.PKT_BYTE_CNT_L            (62),
		.PKT_ADDR_H                (55),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (56),
		.PKT_TRANS_POSTED          (57),
		.PKT_TRANS_WRITE           (58),
		.PKT_TRANS_READ            (59),
		.PKT_TRANS_LOCK            (60),
		.PKT_TRANS_EXCLUSIVE       (61),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (79),
		.PKT_SRC_ID_L              (77),
		.PKT_DEST_ID_H             (82),
		.PKT_DEST_ID_L             (80),
		.PKT_THREAD_ID_H           (83),
		.PKT_THREAD_ID_L           (83),
		.PKT_CACHE_H               (90),
		.PKT_CACHE_L               (87),
		.PKT_DATA_SIDEBAND_H       (74),
		.PKT_DATA_SIDEBAND_L       (74),
		.PKT_QOS_H                 (76),
		.PKT_QOS_L                 (76),
		.PKT_ADDR_SIDEBAND_H       (73),
		.PKT_ADDR_SIDEBAND_L       (73),
		.PKT_RESPONSE_STATUS_H     (92),
		.PKT_RESPONSE_STATUS_L     (91),
		.PKT_ORI_BURST_SIZE_L      (93),
		.PKT_ORI_BURST_SIZE_H      (95),
		.ST_DATA_W                 (96),
		.ST_CHANNEL_W              (6),
		.AV_BURSTCOUNT_W           (3),
		.SUPPRESS_0_BYTEEN_RSP     (0),
		.ID                        (1),
		.BURSTWRAP_VALUE           (3),
		.CACHE_VALUE               (0),
		.SECURE_ACCESS_BIT         (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0)
	) nios2_qsys_instruction_master_agent (
		.clk                     (pll_sys_outclk0_clk),                                                              //       clk.clk
		.reset                   (nios2_qsys_reset_n_reset_bridge_in_reset_reset),                                   // clk_reset.reset
		.av_address              (nios2_qsys_instruction_master_translator_avalon_universal_master_0_address),       //        av.address
		.av_write                (nios2_qsys_instruction_master_translator_avalon_universal_master_0_write),         //          .write
		.av_read                 (nios2_qsys_instruction_master_translator_avalon_universal_master_0_read),          //          .read
		.av_writedata            (nios2_qsys_instruction_master_translator_avalon_universal_master_0_writedata),     //          .writedata
		.av_readdata             (nios2_qsys_instruction_master_translator_avalon_universal_master_0_readdata),      //          .readdata
		.av_waitrequest          (nios2_qsys_instruction_master_translator_avalon_universal_master_0_waitrequest),   //          .waitrequest
		.av_readdatavalid        (nios2_qsys_instruction_master_translator_avalon_universal_master_0_readdatavalid), //          .readdatavalid
		.av_byteenable           (nios2_qsys_instruction_master_translator_avalon_universal_master_0_byteenable),    //          .byteenable
		.av_burstcount           (nios2_qsys_instruction_master_translator_avalon_universal_master_0_burstcount),    //          .burstcount
		.av_debugaccess          (nios2_qsys_instruction_master_translator_avalon_universal_master_0_debugaccess),   //          .debugaccess
		.av_lock                 (nios2_qsys_instruction_master_translator_avalon_universal_master_0_lock),          //          .lock
		.cp_valid                (nios2_qsys_instruction_master_agent_cp_valid),                                     //        cp.valid
		.cp_data                 (nios2_qsys_instruction_master_agent_cp_data),                                      //          .data
		.cp_startofpacket        (nios2_qsys_instruction_master_agent_cp_startofpacket),                             //          .startofpacket
		.cp_endofpacket          (nios2_qsys_instruction_master_agent_cp_endofpacket),                               //          .endofpacket
		.cp_ready                (nios2_qsys_instruction_master_agent_cp_ready),                                     //          .ready
		.rp_valid                (nios2_qsys_instruction_master_limiter_rsp_src_valid),                              //        rp.valid
		.rp_data                 (nios2_qsys_instruction_master_limiter_rsp_src_data),                               //          .data
		.rp_channel              (nios2_qsys_instruction_master_limiter_rsp_src_channel),                            //          .channel
		.rp_startofpacket        (nios2_qsys_instruction_master_limiter_rsp_src_startofpacket),                      //          .startofpacket
		.rp_endofpacket          (nios2_qsys_instruction_master_limiter_rsp_src_endofpacket),                        //          .endofpacket
		.rp_ready                (nios2_qsys_instruction_master_limiter_rsp_src_ready),                              //          .ready
		.av_response             (),                                                                                 // (terminated)
		.av_writeresponserequest (1'b0),                                                                             // (terminated)
		.av_writeresponsevalid   ()                                                                                  // (terminated)
	);
 
	altera_merlin_master_agent #(
		.PKT_PROTECTION_H          (86),
		.PKT_PROTECTION_L          (84),
		.PKT_BEGIN_BURST           (75),
		.PKT_BURSTWRAP_H           (67),
		.PKT_BURSTWRAP_L           (65),
		.PKT_BURST_SIZE_H          (70),
		.PKT_BURST_SIZE_L          (68),
		.PKT_BURST_TYPE_H          (72),
		.PKT_BURST_TYPE_L          (71),
		.PKT_BYTE_CNT_H            (64),
		.PKT_BYTE_CNT_L            (62),
		.PKT_ADDR_H                (55),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (56),
		.PKT_TRANS_POSTED          (57),
		.PKT_TRANS_WRITE           (58),
		.PKT_TRANS_READ            (59),
		.PKT_TRANS_LOCK            (60),
		.PKT_TRANS_EXCLUSIVE       (61),
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_SRC_ID_H              (79),
		.PKT_SRC_ID_L              (77),
		.PKT_DEST_ID_H             (82),
		.PKT_DEST_ID_L             (80),
		.PKT_THREAD_ID_H           (83),
		.PKT_THREAD_ID_L           (83),
		.PKT_CACHE_H               (90),
		.PKT_CACHE_L               (87),
		.PKT_DATA_SIDEBAND_H       (74),
		.PKT_DATA_SIDEBAND_L       (74),
		.PKT_QOS_H                 (76),
		.PKT_QOS_L                 (76),
		.PKT_ADDR_SIDEBAND_H       (73),
		.PKT_ADDR_SIDEBAND_L       (73),
		.PKT_RESPONSE_STATUS_H     (92),
		.PKT_RESPONSE_STATUS_L     (91),
		.PKT_ORI_BURST_SIZE_L      (93),
		.PKT_ORI_BURST_SIZE_H      (95),
		.ST_DATA_W                 (96),
		.ST_CHANNEL_W              (6),
		.AV_BURSTCOUNT_W           (3),
		.SUPPRESS_0_BYTEEN_RSP     (0),
		.ID                        (0),
		.BURSTWRAP_VALUE           (7),
		.CACHE_VALUE               (0),
		.SECURE_ACCESS_BIT         (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0)
	) nios2_qsys_data_master_agent (
		.clk                     (pll_sys_outclk0_clk),                                                       //       clk.clk
		.reset                   (nios2_qsys_reset_n_reset_bridge_in_reset_reset),                            // clk_reset.reset
		.av_address              (nios2_qsys_data_master_translator_avalon_universal_master_0_address),       //        av.address
		.av_write                (nios2_qsys_data_master_translator_avalon_universal_master_0_write),         //          .write
		.av_read                 (nios2_qsys_data_master_translator_avalon_universal_master_0_read),          //          .read
		.av_writedata            (nios2_qsys_data_master_translator_avalon_universal_master_0_writedata),     //          .writedata
		.av_readdata             (nios2_qsys_data_master_translator_avalon_universal_master_0_readdata),      //          .readdata
		.av_waitrequest          (nios2_qsys_data_master_translator_avalon_universal_master_0_waitrequest),   //          .waitrequest
		.av_readdatavalid        (nios2_qsys_data_master_translator_avalon_universal_master_0_readdatavalid), //          .readdatavalid
		.av_byteenable           (nios2_qsys_data_master_translator_avalon_universal_master_0_byteenable),    //          .byteenable
		.av_burstcount           (nios2_qsys_data_master_translator_avalon_universal_master_0_burstcount),    //          .burstcount
		.av_debugaccess          (nios2_qsys_data_master_translator_avalon_universal_master_0_debugaccess),   //          .debugaccess
		.av_lock                 (nios2_qsys_data_master_translator_avalon_universal_master_0_lock),          //          .lock
		.cp_valid                (nios2_qsys_data_master_agent_cp_valid),                                     //        cp.valid
		.cp_data                 (nios2_qsys_data_master_agent_cp_data),                                      //          .data
		.cp_startofpacket        (nios2_qsys_data_master_agent_cp_startofpacket),                             //          .startofpacket
		.cp_endofpacket          (nios2_qsys_data_master_agent_cp_endofpacket),                               //          .endofpacket
		.cp_ready                (nios2_qsys_data_master_agent_cp_ready),                                     //          .ready
		.rp_valid                (nios2_qsys_data_master_limiter_rsp_src_valid),                              //        rp.valid
		.rp_data                 (nios2_qsys_data_master_limiter_rsp_src_data),                               //          .data
		.rp_channel              (nios2_qsys_data_master_limiter_rsp_src_channel),                            //          .channel
		.rp_startofpacket        (nios2_qsys_data_master_limiter_rsp_src_startofpacket),                      //          .startofpacket
		.rp_endofpacket          (nios2_qsys_data_master_limiter_rsp_src_endofpacket),                        //          .endofpacket
		.rp_ready                (nios2_qsys_data_master_limiter_rsp_src_ready),                              //          .ready
		.av_response             (),                                                                          // (terminated)
		.av_writeresponserequest (1'b0),                                                                      // (terminated)
		.av_writeresponsevalid   ()                                                                           // (terminated)
	);
 
	altera_merlin_slave_agent #(
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BEGIN_BURST           (75),
		.PKT_SYMBOL_W              (8),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_ADDR_H                (55),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (56),
		.PKT_TRANS_POSTED          (57),
		.PKT_TRANS_WRITE           (58),
		.PKT_TRANS_READ            (59),
		.PKT_TRANS_LOCK            (60),
		.PKT_SRC_ID_H              (79),
		.PKT_SRC_ID_L              (77),
		.PKT_DEST_ID_H             (82),
		.PKT_DEST_ID_L             (80),
		.PKT_BURSTWRAP_H           (67),
		.PKT_BURSTWRAP_L           (65),
		.PKT_BYTE_CNT_H            (64),
		.PKT_BYTE_CNT_L            (62),
		.PKT_PROTECTION_H          (86),
		.PKT_PROTECTION_L          (84),
		.PKT_RESPONSE_STATUS_H     (92),
		.PKT_RESPONSE_STATUS_L     (91),
		.PKT_BURST_SIZE_H          (70),
		.PKT_BURST_SIZE_L          (68),
		.PKT_ORI_BURST_SIZE_L      (93),
		.PKT_ORI_BURST_SIZE_H      (95),
		.ST_CHANNEL_W              (6),
		.ST_DATA_W                 (96),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0)
	) nios2_qsys_jtag_debug_module_agent (
		.clk                     (pll_sys_outclk0_clk),                                           //             clk.clk
		.reset                   (nios2_qsys_reset_n_reset_bridge_in_reset_reset),                //       clk_reset.reset
		.m0_address              (nios2_qsys_jtag_debug_module_agent_m0_address),                 //              m0.address
		.m0_burstcount           (nios2_qsys_jtag_debug_module_agent_m0_burstcount),              //                .burstcount
		.m0_byteenable           (nios2_qsys_jtag_debug_module_agent_m0_byteenable),              //                .byteenable
		.m0_debugaccess          (nios2_qsys_jtag_debug_module_agent_m0_debugaccess),             //                .debugaccess
		.m0_lock                 (nios2_qsys_jtag_debug_module_agent_m0_lock),                    //                .lock
		.m0_readdata             (nios2_qsys_jtag_debug_module_agent_m0_readdata),                //                .readdata
		.m0_readdatavalid        (nios2_qsys_jtag_debug_module_agent_m0_readdatavalid),           //                .readdatavalid
		.m0_read                 (nios2_qsys_jtag_debug_module_agent_m0_read),                    //                .read
		.m0_waitrequest          (nios2_qsys_jtag_debug_module_agent_m0_waitrequest),             //                .waitrequest
		.m0_writedata            (nios2_qsys_jtag_debug_module_agent_m0_writedata),               //                .writedata
		.m0_write                (nios2_qsys_jtag_debug_module_agent_m0_write),                   //                .write
		.rp_endofpacket          (nios2_qsys_jtag_debug_module_agent_rp_endofpacket),             //              rp.endofpacket
		.rp_ready                (nios2_qsys_jtag_debug_module_agent_rp_ready),                   //                .ready
		.rp_valid                (nios2_qsys_jtag_debug_module_agent_rp_valid),                   //                .valid
		.rp_data                 (nios2_qsys_jtag_debug_module_agent_rp_data),                    //                .data
		.rp_startofpacket        (nios2_qsys_jtag_debug_module_agent_rp_startofpacket),           //                .startofpacket
		.cp_ready                (cmd_mux_src_ready),                                             //              cp.ready
		.cp_valid                (cmd_mux_src_valid),                                             //                .valid
		.cp_data                 (cmd_mux_src_data),                                              //                .data
		.cp_startofpacket        (cmd_mux_src_startofpacket),                                     //                .startofpacket
		.cp_endofpacket          (cmd_mux_src_endofpacket),                                       //                .endofpacket
		.cp_channel              (cmd_mux_src_channel),                                           //                .channel
		.rf_sink_ready           (nios2_qsys_jtag_debug_module_agent_rsp_fifo_out_ready),         //         rf_sink.ready
		.rf_sink_valid           (nios2_qsys_jtag_debug_module_agent_rsp_fifo_out_valid),         //                .valid
		.rf_sink_startofpacket   (nios2_qsys_jtag_debug_module_agent_rsp_fifo_out_startofpacket), //                .startofpacket
		.rf_sink_endofpacket     (nios2_qsys_jtag_debug_module_agent_rsp_fifo_out_endofpacket),   //                .endofpacket
		.rf_sink_data            (nios2_qsys_jtag_debug_module_agent_rsp_fifo_out_data),          //                .data
		.rf_source_ready         (nios2_qsys_jtag_debug_module_agent_rf_source_ready),            //       rf_source.ready
		.rf_source_valid         (nios2_qsys_jtag_debug_module_agent_rf_source_valid),            //                .valid
		.rf_source_startofpacket (nios2_qsys_jtag_debug_module_agent_rf_source_startofpacket),    //                .startofpacket
		.rf_source_endofpacket   (nios2_qsys_jtag_debug_module_agent_rf_source_endofpacket),      //                .endofpacket
		.rf_source_data          (nios2_qsys_jtag_debug_module_agent_rf_source_data),             //                .data
		.rdata_fifo_sink_ready   (nios2_qsys_jtag_debug_module_agent_rdata_fifo_src_ready),       // rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (nios2_qsys_jtag_debug_module_agent_rdata_fifo_src_valid),       //                .valid
		.rdata_fifo_sink_data    (nios2_qsys_jtag_debug_module_agent_rdata_fifo_src_data),        //                .data
		.rdata_fifo_src_ready    (nios2_qsys_jtag_debug_module_agent_rdata_fifo_src_ready),       //  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (nios2_qsys_jtag_debug_module_agent_rdata_fifo_src_valid),       //                .valid
		.rdata_fifo_src_data     (nios2_qsys_jtag_debug_module_agent_rdata_fifo_src_data),        //                .data
		.m0_response             (2'b00),                                                         //     (terminated)
		.m0_writeresponserequest (),                                                              //     (terminated)
		.m0_writeresponsevalid   (1'b0)                                                           //     (terminated)
	);
 
	altera_avalon_sc_fifo #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (97),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0)
	) nios2_qsys_jtag_debug_module_agent_rsp_fifo (
		.clk               (pll_sys_outclk0_clk),                                           //       clk.clk
		.reset             (nios2_qsys_reset_n_reset_bridge_in_reset_reset),                // clk_reset.reset
		.in_data           (nios2_qsys_jtag_debug_module_agent_rf_source_data),             //        in.data
		.in_valid          (nios2_qsys_jtag_debug_module_agent_rf_source_valid),            //          .valid
		.in_ready          (nios2_qsys_jtag_debug_module_agent_rf_source_ready),            //          .ready
		.in_startofpacket  (nios2_qsys_jtag_debug_module_agent_rf_source_startofpacket),    //          .startofpacket
		.in_endofpacket    (nios2_qsys_jtag_debug_module_agent_rf_source_endofpacket),      //          .endofpacket
		.out_data          (nios2_qsys_jtag_debug_module_agent_rsp_fifo_out_data),          //       out.data
		.out_valid         (nios2_qsys_jtag_debug_module_agent_rsp_fifo_out_valid),         //          .valid
		.out_ready         (nios2_qsys_jtag_debug_module_agent_rsp_fifo_out_ready),         //          .ready
		.out_startofpacket (nios2_qsys_jtag_debug_module_agent_rsp_fifo_out_startofpacket), //          .startofpacket
		.out_endofpacket   (nios2_qsys_jtag_debug_module_agent_rsp_fifo_out_endofpacket),   //          .endofpacket
		.csr_address       (2'b00),                                                         // (terminated)
		.csr_read          (1'b0),                                                          // (terminated)
		.csr_write         (1'b0),                                                          // (terminated)
		.csr_readdata      (),                                                              // (terminated)
		.csr_writedata     (32'b00000000000000000000000000000000),                          // (terminated)
		.almost_full_data  (),                                                              // (terminated)
		.almost_empty_data (),                                                              // (terminated)
		.in_empty          (1'b0),                                                          // (terminated)
		.out_empty         (),                                                              // (terminated)
		.in_error          (1'b0),                                                          // (terminated)
		.out_error         (),                                                              // (terminated)
		.in_channel        (1'b0),                                                          // (terminated)
		.out_channel       ()                                                               // (terminated)
	);
 
	altera_merlin_slave_agent #(
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BEGIN_BURST           (75),
		.PKT_SYMBOL_W              (8),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_ADDR_H                (55),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (56),
		.PKT_TRANS_POSTED          (57),
		.PKT_TRANS_WRITE           (58),
		.PKT_TRANS_READ            (59),
		.PKT_TRANS_LOCK            (60),
		.PKT_SRC_ID_H              (79),
		.PKT_SRC_ID_L              (77),
		.PKT_DEST_ID_H             (82),
		.PKT_DEST_ID_L             (80),
		.PKT_BURSTWRAP_H           (67),
		.PKT_BURSTWRAP_L           (65),
		.PKT_BYTE_CNT_H            (64),
		.PKT_BYTE_CNT_L            (62),
		.PKT_PROTECTION_H          (86),
		.PKT_PROTECTION_L          (84),
		.PKT_RESPONSE_STATUS_H     (92),
		.PKT_RESPONSE_STATUS_L     (91),
		.PKT_BURST_SIZE_H          (70),
		.PKT_BURST_SIZE_L          (68),
		.PKT_ORI_BURST_SIZE_L      (93),
		.PKT_ORI_BURST_SIZE_H      (95),
		.ST_CHANNEL_W              (6),
		.ST_DATA_W                 (96),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0)
	) onchip_memory2_s1_agent (
		.clk                     (pll_sys_outclk0_clk),                                //             clk.clk
		.reset                   (onchip_memory2_reset1_reset_bridge_in_reset_reset),  //       clk_reset.reset
		.m0_address              (onchip_memory2_s1_agent_m0_address),                 //              m0.address
		.m0_burstcount           (onchip_memory2_s1_agent_m0_burstcount),              //                .burstcount
		.m0_byteenable           (onchip_memory2_s1_agent_m0_byteenable),              //                .byteenable
		.m0_debugaccess          (onchip_memory2_s1_agent_m0_debugaccess),             //                .debugaccess
		.m0_lock                 (onchip_memory2_s1_agent_m0_lock),                    //                .lock
		.m0_readdata             (onchip_memory2_s1_agent_m0_readdata),                //                .readdata
		.m0_readdatavalid        (onchip_memory2_s1_agent_m0_readdatavalid),           //                .readdatavalid
		.m0_read                 (onchip_memory2_s1_agent_m0_read),                    //                .read
		.m0_waitrequest          (onchip_memory2_s1_agent_m0_waitrequest),             //                .waitrequest
		.m0_writedata            (onchip_memory2_s1_agent_m0_writedata),               //                .writedata
		.m0_write                (onchip_memory2_s1_agent_m0_write),                   //                .write
		.rp_endofpacket          (onchip_memory2_s1_agent_rp_endofpacket),             //              rp.endofpacket
		.rp_ready                (onchip_memory2_s1_agent_rp_ready),                   //                .ready
		.rp_valid                (onchip_memory2_s1_agent_rp_valid),                   //                .valid
		.rp_data                 (onchip_memory2_s1_agent_rp_data),                    //                .data
		.rp_startofpacket        (onchip_memory2_s1_agent_rp_startofpacket),           //                .startofpacket
		.cp_ready                (cmd_mux_001_src_ready),                              //              cp.ready
		.cp_valid                (cmd_mux_001_src_valid),                              //                .valid
		.cp_data                 (cmd_mux_001_src_data),                               //                .data
		.cp_startofpacket        (cmd_mux_001_src_startofpacket),                      //                .startofpacket
		.cp_endofpacket          (cmd_mux_001_src_endofpacket),                        //                .endofpacket
		.cp_channel              (cmd_mux_001_src_channel),                            //                .channel
		.rf_sink_ready           (onchip_memory2_s1_agent_rsp_fifo_out_ready),         //         rf_sink.ready
		.rf_sink_valid           (onchip_memory2_s1_agent_rsp_fifo_out_valid),         //                .valid
		.rf_sink_startofpacket   (onchip_memory2_s1_agent_rsp_fifo_out_startofpacket), //                .startofpacket
		.rf_sink_endofpacket     (onchip_memory2_s1_agent_rsp_fifo_out_endofpacket),   //                .endofpacket
		.rf_sink_data            (onchip_memory2_s1_agent_rsp_fifo_out_data),          //                .data
		.rf_source_ready         (onchip_memory2_s1_agent_rf_source_ready),            //       rf_source.ready
		.rf_source_valid         (onchip_memory2_s1_agent_rf_source_valid),            //                .valid
		.rf_source_startofpacket (onchip_memory2_s1_agent_rf_source_startofpacket),    //                .startofpacket
		.rf_source_endofpacket   (onchip_memory2_s1_agent_rf_source_endofpacket),      //                .endofpacket
		.rf_source_data          (onchip_memory2_s1_agent_rf_source_data),             //                .data
		.rdata_fifo_sink_ready   (onchip_memory2_s1_agent_rdata_fifo_src_ready),       // rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (onchip_memory2_s1_agent_rdata_fifo_src_valid),       //                .valid
		.rdata_fifo_sink_data    (onchip_memory2_s1_agent_rdata_fifo_src_data),        //                .data
		.rdata_fifo_src_ready    (onchip_memory2_s1_agent_rdata_fifo_src_ready),       //  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (onchip_memory2_s1_agent_rdata_fifo_src_valid),       //                .valid
		.rdata_fifo_src_data     (onchip_memory2_s1_agent_rdata_fifo_src_data),        //                .data
		.m0_response             (2'b00),                                              //     (terminated)
		.m0_writeresponserequest (),                                                   //     (terminated)
		.m0_writeresponsevalid   (1'b0)                                                //     (terminated)
	);
 
	altera_avalon_sc_fifo #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (97),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0)
	) onchip_memory2_s1_agent_rsp_fifo (
		.clk               (pll_sys_outclk0_clk),                                //       clk.clk
		.reset             (onchip_memory2_reset1_reset_bridge_in_reset_reset),  // clk_reset.reset
		.in_data           (onchip_memory2_s1_agent_rf_source_data),             //        in.data
		.in_valid          (onchip_memory2_s1_agent_rf_source_valid),            //          .valid
		.in_ready          (onchip_memory2_s1_agent_rf_source_ready),            //          .ready
		.in_startofpacket  (onchip_memory2_s1_agent_rf_source_startofpacket),    //          .startofpacket
		.in_endofpacket    (onchip_memory2_s1_agent_rf_source_endofpacket),      //          .endofpacket
		.out_data          (onchip_memory2_s1_agent_rsp_fifo_out_data),          //       out.data
		.out_valid         (onchip_memory2_s1_agent_rsp_fifo_out_valid),         //          .valid
		.out_ready         (onchip_memory2_s1_agent_rsp_fifo_out_ready),         //          .ready
		.out_startofpacket (onchip_memory2_s1_agent_rsp_fifo_out_startofpacket), //          .startofpacket
		.out_endofpacket   (onchip_memory2_s1_agent_rsp_fifo_out_endofpacket),   //          .endofpacket
		.csr_address       (2'b00),                                              // (terminated)
		.csr_read          (1'b0),                                               // (terminated)
		.csr_write         (1'b0),                                               // (terminated)
		.csr_readdata      (),                                                   // (terminated)
		.csr_writedata     (32'b00000000000000000000000000000000),               // (terminated)
		.almost_full_data  (),                                                   // (terminated)
		.almost_empty_data (),                                                   // (terminated)
		.in_empty          (1'b0),                                               // (terminated)
		.out_empty         (),                                                   // (terminated)
		.in_error          (1'b0),                                               // (terminated)
		.out_error         (),                                                   // (terminated)
		.in_channel        (1'b0),                                               // (terminated)
		.out_channel       ()                                                    // (terminated)
	);
 
	altera_merlin_slave_agent #(
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BEGIN_BURST           (75),
		.PKT_SYMBOL_W              (8),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_ADDR_H                (55),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (56),
		.PKT_TRANS_POSTED          (57),
		.PKT_TRANS_WRITE           (58),
		.PKT_TRANS_READ            (59),
		.PKT_TRANS_LOCK            (60),
		.PKT_SRC_ID_H              (79),
		.PKT_SRC_ID_L              (77),
		.PKT_DEST_ID_H             (82),
		.PKT_DEST_ID_L             (80),
		.PKT_BURSTWRAP_H           (67),
		.PKT_BURSTWRAP_L           (65),
		.PKT_BYTE_CNT_H            (64),
		.PKT_BYTE_CNT_L            (62),
		.PKT_PROTECTION_H          (86),
		.PKT_PROTECTION_L          (84),
		.PKT_RESPONSE_STATUS_H     (92),
		.PKT_RESPONSE_STATUS_L     (91),
		.PKT_BURST_SIZE_H          (70),
		.PKT_BURST_SIZE_L          (68),
		.PKT_ORI_BURST_SIZE_L      (93),
		.PKT_ORI_BURST_SIZE_H      (95),
		.ST_CHANNEL_W              (6),
		.ST_DATA_W                 (96),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0)
	) sysid_qsys_control_slave_agent (
		.clk                     (pll_sys_outclk0_clk),                                       //             clk.clk
		.reset                   (onchip_memory2_reset1_reset_bridge_in_reset_reset),         //       clk_reset.reset
		.m0_address              (sysid_qsys_control_slave_agent_m0_address),                 //              m0.address
		.m0_burstcount           (sysid_qsys_control_slave_agent_m0_burstcount),              //                .burstcount
		.m0_byteenable           (sysid_qsys_control_slave_agent_m0_byteenable),              //                .byteenable
		.m0_debugaccess          (sysid_qsys_control_slave_agent_m0_debugaccess),             //                .debugaccess
		.m0_lock                 (sysid_qsys_control_slave_agent_m0_lock),                    //                .lock
		.m0_readdata             (sysid_qsys_control_slave_agent_m0_readdata),                //                .readdata
		.m0_readdatavalid        (sysid_qsys_control_slave_agent_m0_readdatavalid),           //                .readdatavalid
		.m0_read                 (sysid_qsys_control_slave_agent_m0_read),                    //                .read
		.m0_waitrequest          (sysid_qsys_control_slave_agent_m0_waitrequest),             //                .waitrequest
		.m0_writedata            (sysid_qsys_control_slave_agent_m0_writedata),               //                .writedata
		.m0_write                (sysid_qsys_control_slave_agent_m0_write),                   //                .write
		.rp_endofpacket          (sysid_qsys_control_slave_agent_rp_endofpacket),             //              rp.endofpacket
		.rp_ready                (sysid_qsys_control_slave_agent_rp_ready),                   //                .ready
		.rp_valid                (sysid_qsys_control_slave_agent_rp_valid),                   //                .valid
		.rp_data                 (sysid_qsys_control_slave_agent_rp_data),                    //                .data
		.rp_startofpacket        (sysid_qsys_control_slave_agent_rp_startofpacket),           //                .startofpacket
		.cp_ready                (cmd_mux_002_src_ready),                                     //              cp.ready
		.cp_valid                (cmd_mux_002_src_valid),                                     //                .valid
		.cp_data                 (cmd_mux_002_src_data),                                      //                .data
		.cp_startofpacket        (cmd_mux_002_src_startofpacket),                             //                .startofpacket
		.cp_endofpacket          (cmd_mux_002_src_endofpacket),                               //                .endofpacket
		.cp_channel              (cmd_mux_002_src_channel),                                   //                .channel
		.rf_sink_ready           (sysid_qsys_control_slave_agent_rsp_fifo_out_ready),         //         rf_sink.ready
		.rf_sink_valid           (sysid_qsys_control_slave_agent_rsp_fifo_out_valid),         //                .valid
		.rf_sink_startofpacket   (sysid_qsys_control_slave_agent_rsp_fifo_out_startofpacket), //                .startofpacket
		.rf_sink_endofpacket     (sysid_qsys_control_slave_agent_rsp_fifo_out_endofpacket),   //                .endofpacket
		.rf_sink_data            (sysid_qsys_control_slave_agent_rsp_fifo_out_data),          //                .data
		.rf_source_ready         (sysid_qsys_control_slave_agent_rf_source_ready),            //       rf_source.ready
		.rf_source_valid         (sysid_qsys_control_slave_agent_rf_source_valid),            //                .valid
		.rf_source_startofpacket (sysid_qsys_control_slave_agent_rf_source_startofpacket),    //                .startofpacket
		.rf_source_endofpacket   (sysid_qsys_control_slave_agent_rf_source_endofpacket),      //                .endofpacket
		.rf_source_data          (sysid_qsys_control_slave_agent_rf_source_data),             //                .data
		.rdata_fifo_sink_ready   (sysid_qsys_control_slave_agent_rdata_fifo_src_ready),       // rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (sysid_qsys_control_slave_agent_rdata_fifo_src_valid),       //                .valid
		.rdata_fifo_sink_data    (sysid_qsys_control_slave_agent_rdata_fifo_src_data),        //                .data
		.rdata_fifo_src_ready    (sysid_qsys_control_slave_agent_rdata_fifo_src_ready),       //  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (sysid_qsys_control_slave_agent_rdata_fifo_src_valid),       //                .valid
		.rdata_fifo_src_data     (sysid_qsys_control_slave_agent_rdata_fifo_src_data),        //                .data
		.m0_response             (2'b00),                                                     //     (terminated)
		.m0_writeresponserequest (),                                                          //     (terminated)
		.m0_writeresponsevalid   (1'b0)                                                       //     (terminated)
	);
 
	altera_avalon_sc_fifo #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (97),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0)
	) sysid_qsys_control_slave_agent_rsp_fifo (
		.clk               (pll_sys_outclk0_clk),                                       //       clk.clk
		.reset             (onchip_memory2_reset1_reset_bridge_in_reset_reset),         // clk_reset.reset
		.in_data           (sysid_qsys_control_slave_agent_rf_source_data),             //        in.data
		.in_valid          (sysid_qsys_control_slave_agent_rf_source_valid),            //          .valid
		.in_ready          (sysid_qsys_control_slave_agent_rf_source_ready),            //          .ready
		.in_startofpacket  (sysid_qsys_control_slave_agent_rf_source_startofpacket),    //          .startofpacket
		.in_endofpacket    (sysid_qsys_control_slave_agent_rf_source_endofpacket),      //          .endofpacket
		.out_data          (sysid_qsys_control_slave_agent_rsp_fifo_out_data),          //       out.data
		.out_valid         (sysid_qsys_control_slave_agent_rsp_fifo_out_valid),         //          .valid
		.out_ready         (sysid_qsys_control_slave_agent_rsp_fifo_out_ready),         //          .ready
		.out_startofpacket (sysid_qsys_control_slave_agent_rsp_fifo_out_startofpacket), //          .startofpacket
		.out_endofpacket   (sysid_qsys_control_slave_agent_rsp_fifo_out_endofpacket),   //          .endofpacket
		.csr_address       (2'b00),                                                     // (terminated)
		.csr_read          (1'b0),                                                      // (terminated)
		.csr_write         (1'b0),                                                      // (terminated)
		.csr_readdata      (),                                                          // (terminated)
		.csr_writedata     (32'b00000000000000000000000000000000),                      // (terminated)
		.almost_full_data  (),                                                          // (terminated)
		.almost_empty_data (),                                                          // (terminated)
		.in_empty          (1'b0),                                                      // (terminated)
		.out_empty         (),                                                          // (terminated)
		.in_error          (1'b0),                                                      // (terminated)
		.out_error         (),                                                          // (terminated)
		.in_channel        (1'b0),                                                      // (terminated)
		.out_channel       ()                                                           // (terminated)
	);
 
	altera_merlin_slave_agent #(
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BEGIN_BURST           (75),
		.PKT_SYMBOL_W              (8),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_ADDR_H                (55),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (56),
		.PKT_TRANS_POSTED          (57),
		.PKT_TRANS_WRITE           (58),
		.PKT_TRANS_READ            (59),
		.PKT_TRANS_LOCK            (60),
		.PKT_SRC_ID_H              (79),
		.PKT_SRC_ID_L              (77),
		.PKT_DEST_ID_H             (82),
		.PKT_DEST_ID_L             (80),
		.PKT_BURSTWRAP_H           (67),
		.PKT_BURSTWRAP_L           (65),
		.PKT_BYTE_CNT_H            (64),
		.PKT_BYTE_CNT_L            (62),
		.PKT_PROTECTION_H          (86),
		.PKT_PROTECTION_L          (84),
		.PKT_RESPONSE_STATUS_H     (92),
		.PKT_RESPONSE_STATUS_L     (91),
		.PKT_BURST_SIZE_H          (70),
		.PKT_BURST_SIZE_L          (68),
		.PKT_ORI_BURST_SIZE_L      (93),
		.PKT_ORI_BURST_SIZE_H      (95),
		.ST_CHANNEL_W              (6),
		.ST_DATA_W                 (96),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0)
	) jtag_uart_avalon_jtag_slave_agent (
		.clk                     (pll_sys_outclk0_clk),                                          //             clk.clk
		.reset                   (onchip_memory2_reset1_reset_bridge_in_reset_reset),            //       clk_reset.reset
		.m0_address              (jtag_uart_avalon_jtag_slave_agent_m0_address),                 //              m0.address
		.m0_burstcount           (jtag_uart_avalon_jtag_slave_agent_m0_burstcount),              //                .burstcount
		.m0_byteenable           (jtag_uart_avalon_jtag_slave_agent_m0_byteenable),              //                .byteenable
		.m0_debugaccess          (jtag_uart_avalon_jtag_slave_agent_m0_debugaccess),             //                .debugaccess
		.m0_lock                 (jtag_uart_avalon_jtag_slave_agent_m0_lock),                    //                .lock
		.m0_readdata             (jtag_uart_avalon_jtag_slave_agent_m0_readdata),                //                .readdata
		.m0_readdatavalid        (jtag_uart_avalon_jtag_slave_agent_m0_readdatavalid),           //                .readdatavalid
		.m0_read                 (jtag_uart_avalon_jtag_slave_agent_m0_read),                    //                .read
		.m0_waitrequest          (jtag_uart_avalon_jtag_slave_agent_m0_waitrequest),             //                .waitrequest
		.m0_writedata            (jtag_uart_avalon_jtag_slave_agent_m0_writedata),               //                .writedata
		.m0_write                (jtag_uart_avalon_jtag_slave_agent_m0_write),                   //                .write
		.rp_endofpacket          (jtag_uart_avalon_jtag_slave_agent_rp_endofpacket),             //              rp.endofpacket
		.rp_ready                (jtag_uart_avalon_jtag_slave_agent_rp_ready),                   //                .ready
		.rp_valid                (jtag_uart_avalon_jtag_slave_agent_rp_valid),                   //                .valid
		.rp_data                 (jtag_uart_avalon_jtag_slave_agent_rp_data),                    //                .data
		.rp_startofpacket        (jtag_uart_avalon_jtag_slave_agent_rp_startofpacket),           //                .startofpacket
		.cp_ready                (cmd_mux_003_src_ready),                                        //              cp.ready
		.cp_valid                (cmd_mux_003_src_valid),                                        //                .valid
		.cp_data                 (cmd_mux_003_src_data),                                         //                .data
		.cp_startofpacket        (cmd_mux_003_src_startofpacket),                                //                .startofpacket
		.cp_endofpacket          (cmd_mux_003_src_endofpacket),                                  //                .endofpacket
		.cp_channel              (cmd_mux_003_src_channel),                                      //                .channel
		.rf_sink_ready           (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_ready),         //         rf_sink.ready
		.rf_sink_valid           (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_valid),         //                .valid
		.rf_sink_startofpacket   (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_startofpacket), //                .startofpacket
		.rf_sink_endofpacket     (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_endofpacket),   //                .endofpacket
		.rf_sink_data            (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_data),          //                .data
		.rf_source_ready         (jtag_uart_avalon_jtag_slave_agent_rf_source_ready),            //       rf_source.ready
		.rf_source_valid         (jtag_uart_avalon_jtag_slave_agent_rf_source_valid),            //                .valid
		.rf_source_startofpacket (jtag_uart_avalon_jtag_slave_agent_rf_source_startofpacket),    //                .startofpacket
		.rf_source_endofpacket   (jtag_uart_avalon_jtag_slave_agent_rf_source_endofpacket),      //                .endofpacket
		.rf_source_data          (jtag_uart_avalon_jtag_slave_agent_rf_source_data),             //                .data
		.rdata_fifo_sink_ready   (jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_ready),       // rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_valid),       //                .valid
		.rdata_fifo_sink_data    (jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_data),        //                .data
		.rdata_fifo_src_ready    (jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_ready),       //  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_valid),       //                .valid
		.rdata_fifo_src_data     (jtag_uart_avalon_jtag_slave_agent_rdata_fifo_src_data),        //                .data
		.m0_response             (2'b00),                                                        //     (terminated)
		.m0_writeresponserequest (),                                                             //     (terminated)
		.m0_writeresponsevalid   (1'b0)                                                          //     (terminated)
	);
 
	altera_avalon_sc_fifo #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (97),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0)
	) jtag_uart_avalon_jtag_slave_agent_rsp_fifo (
		.clk               (pll_sys_outclk0_clk),                                          //       clk.clk
		.reset             (onchip_memory2_reset1_reset_bridge_in_reset_reset),            // clk_reset.reset
		.in_data           (jtag_uart_avalon_jtag_slave_agent_rf_source_data),             //        in.data
		.in_valid          (jtag_uart_avalon_jtag_slave_agent_rf_source_valid),            //          .valid
		.in_ready          (jtag_uart_avalon_jtag_slave_agent_rf_source_ready),            //          .ready
		.in_startofpacket  (jtag_uart_avalon_jtag_slave_agent_rf_source_startofpacket),    //          .startofpacket
		.in_endofpacket    (jtag_uart_avalon_jtag_slave_agent_rf_source_endofpacket),      //          .endofpacket
		.out_data          (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_data),          //       out.data
		.out_valid         (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_valid),         //          .valid
		.out_ready         (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_ready),         //          .ready
		.out_startofpacket (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_startofpacket), //          .startofpacket
		.out_endofpacket   (jtag_uart_avalon_jtag_slave_agent_rsp_fifo_out_endofpacket),   //          .endofpacket
		.csr_address       (2'b00),                                                        // (terminated)
		.csr_read          (1'b0),                                                         // (terminated)
		.csr_write         (1'b0),                                                         // (terminated)
		.csr_readdata      (),                                                             // (terminated)
		.csr_writedata     (32'b00000000000000000000000000000000),                         // (terminated)
		.almost_full_data  (),                                                             // (terminated)
		.almost_empty_data (),                                                             // (terminated)
		.in_empty          (1'b0),                                                         // (terminated)
		.out_empty         (),                                                             // (terminated)
		.in_error          (1'b0),                                                         // (terminated)
		.out_error         (),                                                             // (terminated)
		.in_channel        (1'b0),                                                         // (terminated)
		.out_channel       ()                                                              // (terminated)
	);
 
	altera_merlin_slave_agent #(
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BEGIN_BURST           (75),
		.PKT_SYMBOL_W              (8),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_ADDR_H                (55),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (56),
		.PKT_TRANS_POSTED          (57),
		.PKT_TRANS_WRITE           (58),
		.PKT_TRANS_READ            (59),
		.PKT_TRANS_LOCK            (60),
		.PKT_SRC_ID_H              (79),
		.PKT_SRC_ID_L              (77),
		.PKT_DEST_ID_H             (82),
		.PKT_DEST_ID_L             (80),
		.PKT_BURSTWRAP_H           (67),
		.PKT_BURSTWRAP_L           (65),
		.PKT_BYTE_CNT_H            (64),
		.PKT_BYTE_CNT_L            (62),
		.PKT_PROTECTION_H          (86),
		.PKT_PROTECTION_L          (84),
		.PKT_RESPONSE_STATUS_H     (92),
		.PKT_RESPONSE_STATUS_L     (91),
		.PKT_BURST_SIZE_H          (70),
		.PKT_BURST_SIZE_L          (68),
		.PKT_ORI_BURST_SIZE_L      (93),
		.PKT_ORI_BURST_SIZE_H      (95),
		.ST_CHANNEL_W              (6),
		.ST_DATA_W                 (96),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0)
	) adc_ltc2308_slave_agent (
		.clk                     (pll_sys_outclk0_clk),                                //             clk.clk
		.reset                   (onchip_memory2_reset1_reset_bridge_in_reset_reset),  //       clk_reset.reset
		.m0_address              (adc_ltc2308_slave_agent_m0_address),                 //              m0.address
		.m0_burstcount           (adc_ltc2308_slave_agent_m0_burstcount),              //                .burstcount
		.m0_byteenable           (adc_ltc2308_slave_agent_m0_byteenable),              //                .byteenable
		.m0_debugaccess          (adc_ltc2308_slave_agent_m0_debugaccess),             //                .debugaccess
		.m0_lock                 (adc_ltc2308_slave_agent_m0_lock),                    //                .lock
		.m0_readdata             (adc_ltc2308_slave_agent_m0_readdata),                //                .readdata
		.m0_readdatavalid        (adc_ltc2308_slave_agent_m0_readdatavalid),           //                .readdatavalid
		.m0_read                 (adc_ltc2308_slave_agent_m0_read),                    //                .read
		.m0_waitrequest          (adc_ltc2308_slave_agent_m0_waitrequest),             //                .waitrequest
		.m0_writedata            (adc_ltc2308_slave_agent_m0_writedata),               //                .writedata
		.m0_write                (adc_ltc2308_slave_agent_m0_write),                   //                .write
		.rp_endofpacket          (adc_ltc2308_slave_agent_rp_endofpacket),             //              rp.endofpacket
		.rp_ready                (adc_ltc2308_slave_agent_rp_ready),                   //                .ready
		.rp_valid                (adc_ltc2308_slave_agent_rp_valid),                   //                .valid
		.rp_data                 (adc_ltc2308_slave_agent_rp_data),                    //                .data
		.rp_startofpacket        (adc_ltc2308_slave_agent_rp_startofpacket),           //                .startofpacket
		.cp_ready                (cmd_mux_004_src_ready),                              //              cp.ready
		.cp_valid                (cmd_mux_004_src_valid),                              //                .valid
		.cp_data                 (cmd_mux_004_src_data),                               //                .data
		.cp_startofpacket        (cmd_mux_004_src_startofpacket),                      //                .startofpacket
		.cp_endofpacket          (cmd_mux_004_src_endofpacket),                        //                .endofpacket
		.cp_channel              (cmd_mux_004_src_channel),                            //                .channel
		.rf_sink_ready           (adc_ltc2308_slave_agent_rsp_fifo_out_ready),         //         rf_sink.ready
		.rf_sink_valid           (adc_ltc2308_slave_agent_rsp_fifo_out_valid),         //                .valid
		.rf_sink_startofpacket   (adc_ltc2308_slave_agent_rsp_fifo_out_startofpacket), //                .startofpacket
		.rf_sink_endofpacket     (adc_ltc2308_slave_agent_rsp_fifo_out_endofpacket),   //                .endofpacket
		.rf_sink_data            (adc_ltc2308_slave_agent_rsp_fifo_out_data),          //                .data
		.rf_source_ready         (adc_ltc2308_slave_agent_rf_source_ready),            //       rf_source.ready
		.rf_source_valid         (adc_ltc2308_slave_agent_rf_source_valid),            //                .valid
		.rf_source_startofpacket (adc_ltc2308_slave_agent_rf_source_startofpacket),    //                .startofpacket
		.rf_source_endofpacket   (adc_ltc2308_slave_agent_rf_source_endofpacket),      //                .endofpacket
		.rf_source_data          (adc_ltc2308_slave_agent_rf_source_data),             //                .data
		.rdata_fifo_sink_ready   (adc_ltc2308_slave_agent_rdata_fifo_src_ready),       // rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (adc_ltc2308_slave_agent_rdata_fifo_src_valid),       //                .valid
		.rdata_fifo_sink_data    (adc_ltc2308_slave_agent_rdata_fifo_src_data),        //                .data
		.rdata_fifo_src_ready    (adc_ltc2308_slave_agent_rdata_fifo_src_ready),       //  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (adc_ltc2308_slave_agent_rdata_fifo_src_valid),       //                .valid
		.rdata_fifo_src_data     (adc_ltc2308_slave_agent_rdata_fifo_src_data),        //                .data
		.m0_response             (2'b00),                                              //     (terminated)
		.m0_writeresponserequest (),                                                   //     (terminated)
		.m0_writeresponsevalid   (1'b0)                                                //     (terminated)
	);
 
	altera_avalon_sc_fifo #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (97),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0)
	) adc_ltc2308_slave_agent_rsp_fifo (
		.clk               (pll_sys_outclk0_clk),                                //       clk.clk
		.reset             (onchip_memory2_reset1_reset_bridge_in_reset_reset),  // clk_reset.reset
		.in_data           (adc_ltc2308_slave_agent_rf_source_data),             //        in.data
		.in_valid          (adc_ltc2308_slave_agent_rf_source_valid),            //          .valid
		.in_ready          (adc_ltc2308_slave_agent_rf_source_ready),            //          .ready
		.in_startofpacket  (adc_ltc2308_slave_agent_rf_source_startofpacket),    //          .startofpacket
		.in_endofpacket    (adc_ltc2308_slave_agent_rf_source_endofpacket),      //          .endofpacket
		.out_data          (adc_ltc2308_slave_agent_rsp_fifo_out_data),          //       out.data
		.out_valid         (adc_ltc2308_slave_agent_rsp_fifo_out_valid),         //          .valid
		.out_ready         (adc_ltc2308_slave_agent_rsp_fifo_out_ready),         //          .ready
		.out_startofpacket (adc_ltc2308_slave_agent_rsp_fifo_out_startofpacket), //          .startofpacket
		.out_endofpacket   (adc_ltc2308_slave_agent_rsp_fifo_out_endofpacket),   //          .endofpacket
		.csr_address       (2'b00),                                              // (terminated)
		.csr_read          (1'b0),                                               // (terminated)
		.csr_write         (1'b0),                                               // (terminated)
		.csr_readdata      (),                                                   // (terminated)
		.csr_writedata     (32'b00000000000000000000000000000000),               // (terminated)
		.almost_full_data  (),                                                   // (terminated)
		.almost_empty_data (),                                                   // (terminated)
		.in_empty          (1'b0),                                               // (terminated)
		.out_empty         (),                                                   // (terminated)
		.in_error          (1'b0),                                               // (terminated)
		.out_error         (),                                                   // (terminated)
		.in_channel        (1'b0),                                               // (terminated)
		.out_channel       ()                                                    // (terminated)
	);
 
	altera_merlin_slave_agent #(
		.PKT_DATA_H                (31),
		.PKT_DATA_L                (0),
		.PKT_BEGIN_BURST           (75),
		.PKT_SYMBOL_W              (8),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.PKT_ADDR_H                (55),
		.PKT_ADDR_L                (36),
		.PKT_TRANS_COMPRESSED_READ (56),
		.PKT_TRANS_POSTED          (57),
		.PKT_TRANS_WRITE           (58),
		.PKT_TRANS_READ            (59),
		.PKT_TRANS_LOCK            (60),
		.PKT_SRC_ID_H              (79),
		.PKT_SRC_ID_L              (77),
		.PKT_DEST_ID_H             (82),
		.PKT_DEST_ID_L             (80),
		.PKT_BURSTWRAP_H           (67),
		.PKT_BURSTWRAP_L           (65),
		.PKT_BYTE_CNT_H            (64),
		.PKT_BYTE_CNT_L            (62),
		.PKT_PROTECTION_H          (86),
		.PKT_PROTECTION_L          (84),
		.PKT_RESPONSE_STATUS_H     (92),
		.PKT_RESPONSE_STATUS_L     (91),
		.PKT_BURST_SIZE_H          (70),
		.PKT_BURST_SIZE_L          (68),
		.PKT_ORI_BURST_SIZE_L      (93),
		.PKT_ORI_BURST_SIZE_H      (95),
		.ST_CHANNEL_W              (6),
		.ST_DATA_W                 (96),
		.AVS_BURSTCOUNT_W          (3),
		.SUPPRESS_0_BYTEEN_CMD     (0),
		.PREVENT_FIFO_OVERFLOW     (1),
		.USE_READRESPONSE          (0),
		.USE_WRITERESPONSE         (0)
	) sw_s1_agent (
		.clk                     (pll_sys_outclk0_clk),                               //             clk.clk
		.reset                   (onchip_memory2_reset1_reset_bridge_in_reset_reset), //       clk_reset.reset
		.m0_address              (sw_s1_agent_m0_address),                            //              m0.address
		.m0_burstcount           (sw_s1_agent_m0_burstcount),                         //                .burstcount
		.m0_byteenable           (sw_s1_agent_m0_byteenable),                         //                .byteenable
		.m0_debugaccess          (sw_s1_agent_m0_debugaccess),                        //                .debugaccess
		.m0_lock                 (sw_s1_agent_m0_lock),                               //                .lock
		.m0_readdata             (sw_s1_agent_m0_readdata),                           //                .readdata
		.m0_readdatavalid        (sw_s1_agent_m0_readdatavalid),                      //                .readdatavalid
		.m0_read                 (sw_s1_agent_m0_read),                               //                .read
		.m0_waitrequest          (sw_s1_agent_m0_waitrequest),                        //                .waitrequest
		.m0_writedata            (sw_s1_agent_m0_writedata),                          //                .writedata
		.m0_write                (sw_s1_agent_m0_write),                              //                .write
		.rp_endofpacket          (sw_s1_agent_rp_endofpacket),                        //              rp.endofpacket
		.rp_ready                (sw_s1_agent_rp_ready),                              //                .ready
		.rp_valid                (sw_s1_agent_rp_valid),                              //                .valid
		.rp_data                 (sw_s1_agent_rp_data),                               //                .data
		.rp_startofpacket        (sw_s1_agent_rp_startofpacket),                      //                .startofpacket
		.cp_ready                (cmd_mux_005_src_ready),                             //              cp.ready
		.cp_valid                (cmd_mux_005_src_valid),                             //                .valid
		.cp_data                 (cmd_mux_005_src_data),                              //                .data
		.cp_startofpacket        (cmd_mux_005_src_startofpacket),                     //                .startofpacket
		.cp_endofpacket          (cmd_mux_005_src_endofpacket),                       //                .endofpacket
		.cp_channel              (cmd_mux_005_src_channel),                           //                .channel
		.rf_sink_ready           (sw_s1_agent_rsp_fifo_out_ready),                    //         rf_sink.ready
		.rf_sink_valid           (sw_s1_agent_rsp_fifo_out_valid),                    //                .valid
		.rf_sink_startofpacket   (sw_s1_agent_rsp_fifo_out_startofpacket),            //                .startofpacket
		.rf_sink_endofpacket     (sw_s1_agent_rsp_fifo_out_endofpacket),              //                .endofpacket
		.rf_sink_data            (sw_s1_agent_rsp_fifo_out_data),                     //                .data
		.rf_source_ready         (sw_s1_agent_rf_source_ready),                       //       rf_source.ready
		.rf_source_valid         (sw_s1_agent_rf_source_valid),                       //                .valid
		.rf_source_startofpacket (sw_s1_agent_rf_source_startofpacket),               //                .startofpacket
		.rf_source_endofpacket   (sw_s1_agent_rf_source_endofpacket),                 //                .endofpacket
		.rf_source_data          (sw_s1_agent_rf_source_data),                        //                .data
		.rdata_fifo_sink_ready   (sw_s1_agent_rdata_fifo_src_ready),                  // rdata_fifo_sink.ready
		.rdata_fifo_sink_valid   (sw_s1_agent_rdata_fifo_src_valid),                  //                .valid
		.rdata_fifo_sink_data    (sw_s1_agent_rdata_fifo_src_data),                   //                .data
		.rdata_fifo_src_ready    (sw_s1_agent_rdata_fifo_src_ready),                  //  rdata_fifo_src.ready
		.rdata_fifo_src_valid    (sw_s1_agent_rdata_fifo_src_valid),                  //                .valid
		.rdata_fifo_src_data     (sw_s1_agent_rdata_fifo_src_data),                   //                .data
		.m0_response             (2'b00),                                             //     (terminated)
		.m0_writeresponserequest (),                                                  //     (terminated)
		.m0_writeresponsevalid   (1'b0)                                               //     (terminated)
	);
 
	altera_avalon_sc_fifo #(
		.SYMBOLS_PER_BEAT    (1),
		.BITS_PER_SYMBOL     (97),
		.FIFO_DEPTH          (2),
		.CHANNEL_WIDTH       (0),
		.ERROR_WIDTH         (0),
		.USE_PACKETS         (1),
		.USE_FILL_LEVEL      (0),
		.EMPTY_LATENCY       (1),
		.USE_MEMORY_BLOCKS   (0),
		.USE_STORE_FORWARD   (0),
		.USE_ALMOST_FULL_IF  (0),
		.USE_ALMOST_EMPTY_IF (0)
	) sw_s1_agent_rsp_fifo (
		.clk               (pll_sys_outclk0_clk),                               //       clk.clk
		.reset             (onchip_memory2_reset1_reset_bridge_in_reset_reset), // clk_reset.reset
		.in_data           (sw_s1_agent_rf_source_data),                        //        in.data
		.in_valid          (sw_s1_agent_rf_source_valid),                       //          .valid
		.in_ready          (sw_s1_agent_rf_source_ready),                       //          .ready
		.in_startofpacket  (sw_s1_agent_rf_source_startofpacket),               //          .startofpacket
		.in_endofpacket    (sw_s1_agent_rf_source_endofpacket),                 //          .endofpacket
		.out_data          (sw_s1_agent_rsp_fifo_out_data),                     //       out.data
		.out_valid         (sw_s1_agent_rsp_fifo_out_valid),                    //          .valid
		.out_ready         (sw_s1_agent_rsp_fifo_out_ready),                    //          .ready
		.out_startofpacket (sw_s1_agent_rsp_fifo_out_startofpacket),            //          .startofpacket
		.out_endofpacket   (sw_s1_agent_rsp_fifo_out_endofpacket),              //          .endofpacket
		.csr_address       (2'b00),                                             // (terminated)
		.csr_read          (1'b0),                                              // (terminated)
		.csr_write         (1'b0),                                              // (terminated)
		.csr_readdata      (),                                                  // (terminated)
		.csr_writedata     (32'b00000000000000000000000000000000),              // (terminated)
		.almost_full_data  (),                                                  // (terminated)
		.almost_empty_data (),                                                  // (terminated)
		.in_empty          (1'b0),                                              // (terminated)
		.out_empty         (),                                                  // (terminated)
		.in_error          (1'b0),                                              // (terminated)
		.out_error         (),                                                  // (terminated)
		.in_channel        (1'b0),                                              // (terminated)
		.out_channel       ()                                                   // (terminated)
	);
 
	DE0_NANO_SOC_QSYS_mm_interconnect_0_router router (
		.sink_ready         (nios2_qsys_instruction_master_agent_cp_ready),         //      sink.ready
		.sink_valid         (nios2_qsys_instruction_master_agent_cp_valid),         //          .valid
		.sink_data          (nios2_qsys_instruction_master_agent_cp_data),          //          .data
		.sink_startofpacket (nios2_qsys_instruction_master_agent_cp_startofpacket), //          .startofpacket
		.sink_endofpacket   (nios2_qsys_instruction_master_agent_cp_endofpacket),   //          .endofpacket
		.clk                (pll_sys_outclk0_clk),                                  //       clk.clk
		.reset              (nios2_qsys_reset_n_reset_bridge_in_reset_reset),       // clk_reset.reset
		.src_ready          (router_src_ready),                                     //       src.ready
		.src_valid          (router_src_valid),                                     //          .valid
		.src_data           (router_src_data),                                      //          .data
		.src_channel        (router_src_channel),                                   //          .channel
		.src_startofpacket  (router_src_startofpacket),                             //          .startofpacket
		.src_endofpacket    (router_src_endofpacket)                                //          .endofpacket
	);
 
	DE0_NANO_SOC_QSYS_mm_interconnect_0_router_001 router_001 (
		.sink_ready         (nios2_qsys_data_master_agent_cp_ready),          //      sink.ready
		.sink_valid         (nios2_qsys_data_master_agent_cp_valid),          //          .valid
		.sink_data          (nios2_qsys_data_master_agent_cp_data),           //          .data
		.sink_startofpacket (nios2_qsys_data_master_agent_cp_startofpacket),  //          .startofpacket
		.sink_endofpacket   (nios2_qsys_data_master_agent_cp_endofpacket),    //          .endofpacket
		.clk                (pll_sys_outclk0_clk),                            //       clk.clk
		.reset              (nios2_qsys_reset_n_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready          (router_001_src_ready),                           //       src.ready
		.src_valid          (router_001_src_valid),                           //          .valid
		.src_data           (router_001_src_data),                            //          .data
		.src_channel        (router_001_src_channel),                         //          .channel
		.src_startofpacket  (router_001_src_startofpacket),                   //          .startofpacket
		.src_endofpacket    (router_001_src_endofpacket)                      //          .endofpacket
	);
 
	DE0_NANO_SOC_QSYS_mm_interconnect_0_router_002 router_002 (
		.sink_ready         (nios2_qsys_jtag_debug_module_agent_rp_ready),         //      sink.ready
		.sink_valid         (nios2_qsys_jtag_debug_module_agent_rp_valid),         //          .valid
		.sink_data          (nios2_qsys_jtag_debug_module_agent_rp_data),          //          .data
		.sink_startofpacket (nios2_qsys_jtag_debug_module_agent_rp_startofpacket), //          .startofpacket
		.sink_endofpacket   (nios2_qsys_jtag_debug_module_agent_rp_endofpacket),   //          .endofpacket
		.clk                (pll_sys_outclk0_clk),                                 //       clk.clk
		.reset              (nios2_qsys_reset_n_reset_bridge_in_reset_reset),      // clk_reset.reset
		.src_ready          (router_002_src_ready),                                //       src.ready
		.src_valid          (router_002_src_valid),                                //          .valid
		.src_data           (router_002_src_data),                                 //          .data
		.src_channel        (router_002_src_channel),                              //          .channel
		.src_startofpacket  (router_002_src_startofpacket),                        //          .startofpacket
		.src_endofpacket    (router_002_src_endofpacket)                           //          .endofpacket
	);
 
	DE0_NANO_SOC_QSYS_mm_interconnect_0_router_002 router_003 (
		.sink_ready         (onchip_memory2_s1_agent_rp_ready),                  //      sink.ready
		.sink_valid         (onchip_memory2_s1_agent_rp_valid),                  //          .valid
		.sink_data          (onchip_memory2_s1_agent_rp_data),                   //          .data
		.sink_startofpacket (onchip_memory2_s1_agent_rp_startofpacket),          //          .startofpacket
		.sink_endofpacket   (onchip_memory2_s1_agent_rp_endofpacket),            //          .endofpacket
		.clk                (pll_sys_outclk0_clk),                               //       clk.clk
		.reset              (onchip_memory2_reset1_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready          (router_003_src_ready),                              //       src.ready
		.src_valid          (router_003_src_valid),                              //          .valid
		.src_data           (router_003_src_data),                               //          .data
		.src_channel        (router_003_src_channel),                            //          .channel
		.src_startofpacket  (router_003_src_startofpacket),                      //          .startofpacket
		.src_endofpacket    (router_003_src_endofpacket)                         //          .endofpacket
	);
 
	DE0_NANO_SOC_QSYS_mm_interconnect_0_router_004 router_004 (
		.sink_ready         (sysid_qsys_control_slave_agent_rp_ready),           //      sink.ready
		.sink_valid         (sysid_qsys_control_slave_agent_rp_valid),           //          .valid
		.sink_data          (sysid_qsys_control_slave_agent_rp_data),            //          .data
		.sink_startofpacket (sysid_qsys_control_slave_agent_rp_startofpacket),   //          .startofpacket
		.sink_endofpacket   (sysid_qsys_control_slave_agent_rp_endofpacket),     //          .endofpacket
		.clk                (pll_sys_outclk0_clk),                               //       clk.clk
		.reset              (onchip_memory2_reset1_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready          (router_004_src_ready),                              //       src.ready
		.src_valid          (router_004_src_valid),                              //          .valid
		.src_data           (router_004_src_data),                               //          .data
		.src_channel        (router_004_src_channel),                            //          .channel
		.src_startofpacket  (router_004_src_startofpacket),                      //          .startofpacket
		.src_endofpacket    (router_004_src_endofpacket)                         //          .endofpacket
	);
 
	DE0_NANO_SOC_QSYS_mm_interconnect_0_router_004 router_005 (
		.sink_ready         (jtag_uart_avalon_jtag_slave_agent_rp_ready),         //      sink.ready
		.sink_valid         (jtag_uart_avalon_jtag_slave_agent_rp_valid),         //          .valid
		.sink_data          (jtag_uart_avalon_jtag_slave_agent_rp_data),          //          .data
		.sink_startofpacket (jtag_uart_avalon_jtag_slave_agent_rp_startofpacket), //          .startofpacket
		.sink_endofpacket   (jtag_uart_avalon_jtag_slave_agent_rp_endofpacket),   //          .endofpacket
		.clk                (pll_sys_outclk0_clk),                                //       clk.clk
		.reset              (onchip_memory2_reset1_reset_bridge_in_reset_reset),  // clk_reset.reset
		.src_ready          (router_005_src_ready),                               //       src.ready
		.src_valid          (router_005_src_valid),                               //          .valid
		.src_data           (router_005_src_data),                                //          .data
		.src_channel        (router_005_src_channel),                             //          .channel
		.src_startofpacket  (router_005_src_startofpacket),                       //          .startofpacket
		.src_endofpacket    (router_005_src_endofpacket)                          //          .endofpacket
	);
 
	DE0_NANO_SOC_QSYS_mm_interconnect_0_router_004 router_006 (
		.sink_ready         (adc_ltc2308_slave_agent_rp_ready),                  //      sink.ready
		.sink_valid         (adc_ltc2308_slave_agent_rp_valid),                  //          .valid
		.sink_data          (adc_ltc2308_slave_agent_rp_data),                   //          .data
		.sink_startofpacket (adc_ltc2308_slave_agent_rp_startofpacket),          //          .startofpacket
		.sink_endofpacket   (adc_ltc2308_slave_agent_rp_endofpacket),            //          .endofpacket
		.clk                (pll_sys_outclk0_clk),                               //       clk.clk
		.reset              (onchip_memory2_reset1_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready          (router_006_src_ready),                              //       src.ready
		.src_valid          (router_006_src_valid),                              //          .valid
		.src_data           (router_006_src_data),                               //          .data
		.src_channel        (router_006_src_channel),                            //          .channel
		.src_startofpacket  (router_006_src_startofpacket),                      //          .startofpacket
		.src_endofpacket    (router_006_src_endofpacket)                         //          .endofpacket
	);
 
	DE0_NANO_SOC_QSYS_mm_interconnect_0_router_004 router_007 (
		.sink_ready         (sw_s1_agent_rp_ready),                              //      sink.ready
		.sink_valid         (sw_s1_agent_rp_valid),                              //          .valid
		.sink_data          (sw_s1_agent_rp_data),                               //          .data
		.sink_startofpacket (sw_s1_agent_rp_startofpacket),                      //          .startofpacket
		.sink_endofpacket   (sw_s1_agent_rp_endofpacket),                        //          .endofpacket
		.clk                (pll_sys_outclk0_clk),                               //       clk.clk
		.reset              (onchip_memory2_reset1_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready          (router_007_src_ready),                              //       src.ready
		.src_valid          (router_007_src_valid),                              //          .valid
		.src_data           (router_007_src_data),                               //          .data
		.src_channel        (router_007_src_channel),                            //          .channel
		.src_startofpacket  (router_007_src_startofpacket),                      //          .startofpacket
		.src_endofpacket    (router_007_src_endofpacket)                         //          .endofpacket
	);
 
	altera_merlin_traffic_limiter #(
		.PKT_DEST_ID_H             (82),
		.PKT_DEST_ID_L             (80),
		.PKT_SRC_ID_H              (79),
		.PKT_SRC_ID_L              (77),
		.PKT_TRANS_POSTED          (57),
		.PKT_TRANS_WRITE           (58),
		.MAX_OUTSTANDING_RESPONSES (1),
		.PIPELINED                 (0),
		.ST_DATA_W                 (96),
		.ST_CHANNEL_W              (6),
		.VALID_WIDTH               (6),
		.ENFORCE_ORDER             (1),
		.PREVENT_HAZARDS           (0),
		.PKT_BYTE_CNT_H            (64),
		.PKT_BYTE_CNT_L            (62),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.REORDER                   (0)
	) nios2_qsys_instruction_master_limiter (
		.clk                    (pll_sys_outclk0_clk),                                         //       clk.clk
		.reset                  (nios2_qsys_reset_n_reset_bridge_in_reset_reset),              // clk_reset.reset
		.cmd_sink_ready         (router_src_ready),                                            //  cmd_sink.ready
		.cmd_sink_valid         (router_src_valid),                                            //          .valid
		.cmd_sink_data          (router_src_data),                                             //          .data
		.cmd_sink_channel       (router_src_channel),                                          //          .channel
		.cmd_sink_startofpacket (router_src_startofpacket),                                    //          .startofpacket
		.cmd_sink_endofpacket   (router_src_endofpacket),                                      //          .endofpacket
		.cmd_src_ready          (nios2_qsys_instruction_master_limiter_cmd_src_ready),         //   cmd_src.ready
		.cmd_src_data           (nios2_qsys_instruction_master_limiter_cmd_src_data),          //          .data
		.cmd_src_channel        (nios2_qsys_instruction_master_limiter_cmd_src_channel),       //          .channel
		.cmd_src_startofpacket  (nios2_qsys_instruction_master_limiter_cmd_src_startofpacket), //          .startofpacket
		.cmd_src_endofpacket    (nios2_qsys_instruction_master_limiter_cmd_src_endofpacket),   //          .endofpacket
		.rsp_sink_ready         (rsp_mux_src_ready),                                           //  rsp_sink.ready
		.rsp_sink_valid         (rsp_mux_src_valid),                                           //          .valid
		.rsp_sink_channel       (rsp_mux_src_channel),                                         //          .channel
		.rsp_sink_data          (rsp_mux_src_data),                                            //          .data
		.rsp_sink_startofpacket (rsp_mux_src_startofpacket),                                   //          .startofpacket
		.rsp_sink_endofpacket   (rsp_mux_src_endofpacket),                                     //          .endofpacket
		.rsp_src_ready          (nios2_qsys_instruction_master_limiter_rsp_src_ready),         //   rsp_src.ready
		.rsp_src_valid          (nios2_qsys_instruction_master_limiter_rsp_src_valid),         //          .valid
		.rsp_src_data           (nios2_qsys_instruction_master_limiter_rsp_src_data),          //          .data
		.rsp_src_channel        (nios2_qsys_instruction_master_limiter_rsp_src_channel),       //          .channel
		.rsp_src_startofpacket  (nios2_qsys_instruction_master_limiter_rsp_src_startofpacket), //          .startofpacket
		.rsp_src_endofpacket    (nios2_qsys_instruction_master_limiter_rsp_src_endofpacket),   //          .endofpacket
		.cmd_src_valid          (nios2_qsys_instruction_master_limiter_cmd_valid_data)         // cmd_valid.data
	);
 
	altera_merlin_traffic_limiter #(
		.PKT_DEST_ID_H             (82),
		.PKT_DEST_ID_L             (80),
		.PKT_SRC_ID_H              (79),
		.PKT_SRC_ID_L              (77),
		.PKT_TRANS_POSTED          (57),
		.PKT_TRANS_WRITE           (58),
		.MAX_OUTSTANDING_RESPONSES (1),
		.PIPELINED                 (0),
		.ST_DATA_W                 (96),
		.ST_CHANNEL_W              (6),
		.VALID_WIDTH               (6),
		.ENFORCE_ORDER             (1),
		.PREVENT_HAZARDS           (0),
		.PKT_BYTE_CNT_H            (64),
		.PKT_BYTE_CNT_L            (62),
		.PKT_BYTEEN_H              (35),
		.PKT_BYTEEN_L              (32),
		.REORDER                   (0)
	) nios2_qsys_data_master_limiter (
		.clk                    (pll_sys_outclk0_clk),                                  //       clk.clk
		.reset                  (nios2_qsys_reset_n_reset_bridge_in_reset_reset),       // clk_reset.reset
		.cmd_sink_ready         (router_001_src_ready),                                 //  cmd_sink.ready
		.cmd_sink_valid         (router_001_src_valid),                                 //          .valid
		.cmd_sink_data          (router_001_src_data),                                  //          .data
		.cmd_sink_channel       (router_001_src_channel),                               //          .channel
		.cmd_sink_startofpacket (router_001_src_startofpacket),                         //          .startofpacket
		.cmd_sink_endofpacket   (router_001_src_endofpacket),                           //          .endofpacket
		.cmd_src_ready          (nios2_qsys_data_master_limiter_cmd_src_ready),         //   cmd_src.ready
		.cmd_src_data           (nios2_qsys_data_master_limiter_cmd_src_data),          //          .data
		.cmd_src_channel        (nios2_qsys_data_master_limiter_cmd_src_channel),       //          .channel
		.cmd_src_startofpacket  (nios2_qsys_data_master_limiter_cmd_src_startofpacket), //          .startofpacket
		.cmd_src_endofpacket    (nios2_qsys_data_master_limiter_cmd_src_endofpacket),   //          .endofpacket
		.rsp_sink_ready         (rsp_mux_001_src_ready),                                //  rsp_sink.ready
		.rsp_sink_valid         (rsp_mux_001_src_valid),                                //          .valid
		.rsp_sink_channel       (rsp_mux_001_src_channel),                              //          .channel
		.rsp_sink_data          (rsp_mux_001_src_data),                                 //          .data
		.rsp_sink_startofpacket (rsp_mux_001_src_startofpacket),                        //          .startofpacket
		.rsp_sink_endofpacket   (rsp_mux_001_src_endofpacket),                          //          .endofpacket
		.rsp_src_ready          (nios2_qsys_data_master_limiter_rsp_src_ready),         //   rsp_src.ready
		.rsp_src_valid          (nios2_qsys_data_master_limiter_rsp_src_valid),         //          .valid
		.rsp_src_data           (nios2_qsys_data_master_limiter_rsp_src_data),          //          .data
		.rsp_src_channel        (nios2_qsys_data_master_limiter_rsp_src_channel),       //          .channel
		.rsp_src_startofpacket  (nios2_qsys_data_master_limiter_rsp_src_startofpacket), //          .startofpacket
		.rsp_src_endofpacket    (nios2_qsys_data_master_limiter_rsp_src_endofpacket),   //          .endofpacket
		.cmd_src_valid          (nios2_qsys_data_master_limiter_cmd_valid_data)         // cmd_valid.data
	);
 
	DE0_NANO_SOC_QSYS_mm_interconnect_0_cmd_demux cmd_demux (
		.clk                (pll_sys_outclk0_clk),                                         //        clk.clk
		.reset              (nios2_qsys_reset_n_reset_bridge_in_reset_reset),              //  clk_reset.reset
		.sink_ready         (nios2_qsys_instruction_master_limiter_cmd_src_ready),         //       sink.ready
		.sink_channel       (nios2_qsys_instruction_master_limiter_cmd_src_channel),       //           .channel
		.sink_data          (nios2_qsys_instruction_master_limiter_cmd_src_data),          //           .data
		.sink_startofpacket (nios2_qsys_instruction_master_limiter_cmd_src_startofpacket), //           .startofpacket
		.sink_endofpacket   (nios2_qsys_instruction_master_limiter_cmd_src_endofpacket),   //           .endofpacket
		.sink_valid         (nios2_qsys_instruction_master_limiter_cmd_valid_data),        // sink_valid.data
		.src0_ready         (cmd_demux_src0_ready),                                        //       src0.ready
		.src0_valid         (cmd_demux_src0_valid),                                        //           .valid
		.src0_data          (cmd_demux_src0_data),                                         //           .data
		.src0_channel       (cmd_demux_src0_channel),                                      //           .channel
		.src0_startofpacket (cmd_demux_src0_startofpacket),                                //           .startofpacket
		.src0_endofpacket   (cmd_demux_src0_endofpacket),                                  //           .endofpacket
		.src1_ready         (cmd_demux_src1_ready),                                        //       src1.ready
		.src1_valid         (cmd_demux_src1_valid),                                        //           .valid
		.src1_data          (cmd_demux_src1_data),                                         //           .data
		.src1_channel       (cmd_demux_src1_channel),                                      //           .channel
		.src1_startofpacket (cmd_demux_src1_startofpacket),                                //           .startofpacket
		.src1_endofpacket   (cmd_demux_src1_endofpacket)                                   //           .endofpacket
	);
 
	DE0_NANO_SOC_QSYS_mm_interconnect_0_cmd_demux_001 cmd_demux_001 (
		.clk                (pll_sys_outclk0_clk),                                  //        clk.clk
		.reset              (nios2_qsys_reset_n_reset_bridge_in_reset_reset),       //  clk_reset.reset
		.sink_ready         (nios2_qsys_data_master_limiter_cmd_src_ready),         //       sink.ready
		.sink_channel       (nios2_qsys_data_master_limiter_cmd_src_channel),       //           .channel
		.sink_data          (nios2_qsys_data_master_limiter_cmd_src_data),          //           .data
		.sink_startofpacket (nios2_qsys_data_master_limiter_cmd_src_startofpacket), //           .startofpacket
		.sink_endofpacket   (nios2_qsys_data_master_limiter_cmd_src_endofpacket),   //           .endofpacket
		.sink_valid         (nios2_qsys_data_master_limiter_cmd_valid_data),        // sink_valid.data
		.src0_ready         (cmd_demux_001_src0_ready),                             //       src0.ready
		.src0_valid         (cmd_demux_001_src0_valid),                             //           .valid
		.src0_data          (cmd_demux_001_src0_data),                              //           .data
		.src0_channel       (cmd_demux_001_src0_channel),                           //           .channel
		.src0_startofpacket (cmd_demux_001_src0_startofpacket),                     //           .startofpacket
		.src0_endofpacket   (cmd_demux_001_src0_endofpacket),                       //           .endofpacket
		.src1_ready         (cmd_demux_001_src1_ready),                             //       src1.ready
		.src1_valid         (cmd_demux_001_src1_valid),                             //           .valid
		.src1_data          (cmd_demux_001_src1_data),                              //           .data
		.src1_channel       (cmd_demux_001_src1_channel),                           //           .channel
		.src1_startofpacket (cmd_demux_001_src1_startofpacket),                     //           .startofpacket
		.src1_endofpacket   (cmd_demux_001_src1_endofpacket),                       //           .endofpacket
		.src2_ready         (cmd_demux_001_src2_ready),                             //       src2.ready
		.src2_valid         (cmd_demux_001_src2_valid),                             //           .valid
		.src2_data          (cmd_demux_001_src2_data),                              //           .data
		.src2_channel       (cmd_demux_001_src2_channel),                           //           .channel
		.src2_startofpacket (cmd_demux_001_src2_startofpacket),                     //           .startofpacket
		.src2_endofpacket   (cmd_demux_001_src2_endofpacket),                       //           .endofpacket
		.src3_ready         (cmd_demux_001_src3_ready),                             //       src3.ready
		.src3_valid         (cmd_demux_001_src3_valid),                             //           .valid
		.src3_data          (cmd_demux_001_src3_data),                              //           .data
		.src3_channel       (cmd_demux_001_src3_channel),                           //           .channel
		.src3_startofpacket (cmd_demux_001_src3_startofpacket),                     //           .startofpacket
		.src3_endofpacket   (cmd_demux_001_src3_endofpacket),                       //           .endofpacket
		.src4_ready         (cmd_demux_001_src4_ready),                             //       src4.ready
		.src4_valid         (cmd_demux_001_src4_valid),                             //           .valid
		.src4_data          (cmd_demux_001_src4_data),                              //           .data
		.src4_channel       (cmd_demux_001_src4_channel),                           //           .channel
		.src4_startofpacket (cmd_demux_001_src4_startofpacket),                     //           .startofpacket
		.src4_endofpacket   (cmd_demux_001_src4_endofpacket),                       //           .endofpacket
		.src5_ready         (cmd_demux_001_src5_ready),                             //       src5.ready
		.src5_valid         (cmd_demux_001_src5_valid),                             //           .valid
		.src5_data          (cmd_demux_001_src5_data),                              //           .data
		.src5_channel       (cmd_demux_001_src5_channel),                           //           .channel
		.src5_startofpacket (cmd_demux_001_src5_startofpacket),                     //           .startofpacket
		.src5_endofpacket   (cmd_demux_001_src5_endofpacket)                        //           .endofpacket
	);
 
	DE0_NANO_SOC_QSYS_mm_interconnect_0_cmd_mux cmd_mux (
		.clk                 (pll_sys_outclk0_clk),                            //       clk.clk
		.reset               (nios2_qsys_reset_n_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready           (cmd_mux_src_ready),                              //       src.ready
		.src_valid           (cmd_mux_src_valid),                              //          .valid
		.src_data            (cmd_mux_src_data),                               //          .data
		.src_channel         (cmd_mux_src_channel),                            //          .channel
		.src_startofpacket   (cmd_mux_src_startofpacket),                      //          .startofpacket
		.src_endofpacket     (cmd_mux_src_endofpacket),                        //          .endofpacket
		.sink0_ready         (cmd_demux_src0_ready),                           //     sink0.ready
		.sink0_valid         (cmd_demux_src0_valid),                           //          .valid
		.sink0_channel       (cmd_demux_src0_channel),                         //          .channel
		.sink0_data          (cmd_demux_src0_data),                            //          .data
		.sink0_startofpacket (cmd_demux_src0_startofpacket),                   //          .startofpacket
		.sink0_endofpacket   (cmd_demux_src0_endofpacket),                     //          .endofpacket
		.sink1_ready         (cmd_demux_001_src0_ready),                       //     sink1.ready
		.sink1_valid         (cmd_demux_001_src0_valid),                       //          .valid
		.sink1_channel       (cmd_demux_001_src0_channel),                     //          .channel
		.sink1_data          (cmd_demux_001_src0_data),                        //          .data
		.sink1_startofpacket (cmd_demux_001_src0_startofpacket),               //          .startofpacket
		.sink1_endofpacket   (cmd_demux_001_src0_endofpacket)                  //          .endofpacket
	);
 
	DE0_NANO_SOC_QSYS_mm_interconnect_0_cmd_mux cmd_mux_001 (
		.clk                 (pll_sys_outclk0_clk),                               //       clk.clk
		.reset               (onchip_memory2_reset1_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready           (cmd_mux_001_src_ready),                             //       src.ready
		.src_valid           (cmd_mux_001_src_valid),                             //          .valid
		.src_data            (cmd_mux_001_src_data),                              //          .data
		.src_channel         (cmd_mux_001_src_channel),                           //          .channel
		.src_startofpacket   (cmd_mux_001_src_startofpacket),                     //          .startofpacket
		.src_endofpacket     (cmd_mux_001_src_endofpacket),                       //          .endofpacket
		.sink0_ready         (cmd_demux_src1_ready),                              //     sink0.ready
		.sink0_valid         (cmd_demux_src1_valid),                              //          .valid
		.sink0_channel       (cmd_demux_src1_channel),                            //          .channel
		.sink0_data          (cmd_demux_src1_data),                               //          .data
		.sink0_startofpacket (cmd_demux_src1_startofpacket),                      //          .startofpacket
		.sink0_endofpacket   (cmd_demux_src1_endofpacket),                        //          .endofpacket
		.sink1_ready         (cmd_demux_001_src1_ready),                          //     sink1.ready
		.sink1_valid         (cmd_demux_001_src1_valid),                          //          .valid
		.sink1_channel       (cmd_demux_001_src1_channel),                        //          .channel
		.sink1_data          (cmd_demux_001_src1_data),                           //          .data
		.sink1_startofpacket (cmd_demux_001_src1_startofpacket),                  //          .startofpacket
		.sink1_endofpacket   (cmd_demux_001_src1_endofpacket)                     //          .endofpacket
	);
 
	DE0_NANO_SOC_QSYS_mm_interconnect_0_cmd_mux_002 cmd_mux_002 (
		.clk                 (pll_sys_outclk0_clk),                               //       clk.clk
		.reset               (onchip_memory2_reset1_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready           (cmd_mux_002_src_ready),                             //       src.ready
		.src_valid           (cmd_mux_002_src_valid),                             //          .valid
		.src_data            (cmd_mux_002_src_data),                              //          .data
		.src_channel         (cmd_mux_002_src_channel),                           //          .channel
		.src_startofpacket   (cmd_mux_002_src_startofpacket),                     //          .startofpacket
		.src_endofpacket     (cmd_mux_002_src_endofpacket),                       //          .endofpacket
		.sink0_ready         (cmd_demux_001_src2_ready),                          //     sink0.ready
		.sink0_valid         (cmd_demux_001_src2_valid),                          //          .valid
		.sink0_channel       (cmd_demux_001_src2_channel),                        //          .channel
		.sink0_data          (cmd_demux_001_src2_data),                           //          .data
		.sink0_startofpacket (cmd_demux_001_src2_startofpacket),                  //          .startofpacket
		.sink0_endofpacket   (cmd_demux_001_src2_endofpacket)                     //          .endofpacket
	);
 
	DE0_NANO_SOC_QSYS_mm_interconnect_0_cmd_mux_002 cmd_mux_003 (
		.clk                 (pll_sys_outclk0_clk),                               //       clk.clk
		.reset               (onchip_memory2_reset1_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready           (cmd_mux_003_src_ready),                             //       src.ready
		.src_valid           (cmd_mux_003_src_valid),                             //          .valid
		.src_data            (cmd_mux_003_src_data),                              //          .data
		.src_channel         (cmd_mux_003_src_channel),                           //          .channel
		.src_startofpacket   (cmd_mux_003_src_startofpacket),                     //          .startofpacket
		.src_endofpacket     (cmd_mux_003_src_endofpacket),                       //          .endofpacket
		.sink0_ready         (cmd_demux_001_src3_ready),                          //     sink0.ready
		.sink0_valid         (cmd_demux_001_src3_valid),                          //          .valid
		.sink0_channel       (cmd_demux_001_src3_channel),                        //          .channel
		.sink0_data          (cmd_demux_001_src3_data),                           //          .data
		.sink0_startofpacket (cmd_demux_001_src3_startofpacket),                  //          .startofpacket
		.sink0_endofpacket   (cmd_demux_001_src3_endofpacket)                     //          .endofpacket
	);
 
	DE0_NANO_SOC_QSYS_mm_interconnect_0_cmd_mux_002 cmd_mux_004 (
		.clk                 (pll_sys_outclk0_clk),                               //       clk.clk
		.reset               (onchip_memory2_reset1_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready           (cmd_mux_004_src_ready),                             //       src.ready
		.src_valid           (cmd_mux_004_src_valid),                             //          .valid
		.src_data            (cmd_mux_004_src_data),                              //          .data
		.src_channel         (cmd_mux_004_src_channel),                           //          .channel
		.src_startofpacket   (cmd_mux_004_src_startofpacket),                     //          .startofpacket
		.src_endofpacket     (cmd_mux_004_src_endofpacket),                       //          .endofpacket
		.sink0_ready         (cmd_demux_001_src4_ready),                          //     sink0.ready
		.sink0_valid         (cmd_demux_001_src4_valid),                          //          .valid
		.sink0_channel       (cmd_demux_001_src4_channel),                        //          .channel
		.sink0_data          (cmd_demux_001_src4_data),                           //          .data
		.sink0_startofpacket (cmd_demux_001_src4_startofpacket),                  //          .startofpacket
		.sink0_endofpacket   (cmd_demux_001_src4_endofpacket)                     //          .endofpacket
	);
 
	DE0_NANO_SOC_QSYS_mm_interconnect_0_cmd_mux_002 cmd_mux_005 (
		.clk                 (pll_sys_outclk0_clk),                               //       clk.clk
		.reset               (onchip_memory2_reset1_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready           (cmd_mux_005_src_ready),                             //       src.ready
		.src_valid           (cmd_mux_005_src_valid),                             //          .valid
		.src_data            (cmd_mux_005_src_data),                              //          .data
		.src_channel         (cmd_mux_005_src_channel),                           //          .channel
		.src_startofpacket   (cmd_mux_005_src_startofpacket),                     //          .startofpacket
		.src_endofpacket     (cmd_mux_005_src_endofpacket),                       //          .endofpacket
		.sink0_ready         (cmd_demux_001_src5_ready),                          //     sink0.ready
		.sink0_valid         (cmd_demux_001_src5_valid),                          //          .valid
		.sink0_channel       (cmd_demux_001_src5_channel),                        //          .channel
		.sink0_data          (cmd_demux_001_src5_data),                           //          .data
		.sink0_startofpacket (cmd_demux_001_src5_startofpacket),                  //          .startofpacket
		.sink0_endofpacket   (cmd_demux_001_src5_endofpacket)                     //          .endofpacket
	);
 
	DE0_NANO_SOC_QSYS_mm_interconnect_0_rsp_demux rsp_demux (
		.clk                (pll_sys_outclk0_clk),                            //       clk.clk
		.reset              (nios2_qsys_reset_n_reset_bridge_in_reset_reset), // clk_reset.reset
		.sink_ready         (router_002_src_ready),                           //      sink.ready
		.sink_channel       (router_002_src_channel),                         //          .channel
		.sink_data          (router_002_src_data),                            //          .data
		.sink_startofpacket (router_002_src_startofpacket),                   //          .startofpacket
		.sink_endofpacket   (router_002_src_endofpacket),                     //          .endofpacket
		.sink_valid         (router_002_src_valid),                           //          .valid
		.src0_ready         (rsp_demux_src0_ready),                           //      src0.ready
		.src0_valid         (rsp_demux_src0_valid),                           //          .valid
		.src0_data          (rsp_demux_src0_data),                            //          .data
		.src0_channel       (rsp_demux_src0_channel),                         //          .channel
		.src0_startofpacket (rsp_demux_src0_startofpacket),                   //          .startofpacket
		.src0_endofpacket   (rsp_demux_src0_endofpacket),                     //          .endofpacket
		.src1_ready         (rsp_demux_src1_ready),                           //      src1.ready
		.src1_valid         (rsp_demux_src1_valid),                           //          .valid
		.src1_data          (rsp_demux_src1_data),                            //          .data
		.src1_channel       (rsp_demux_src1_channel),                         //          .channel
		.src1_startofpacket (rsp_demux_src1_startofpacket),                   //          .startofpacket
		.src1_endofpacket   (rsp_demux_src1_endofpacket)                      //          .endofpacket
	);
 
	DE0_NANO_SOC_QSYS_mm_interconnect_0_rsp_demux rsp_demux_001 (
		.clk                (pll_sys_outclk0_clk),                               //       clk.clk
		.reset              (onchip_memory2_reset1_reset_bridge_in_reset_reset), // clk_reset.reset
		.sink_ready         (router_003_src_ready),                              //      sink.ready
		.sink_channel       (router_003_src_channel),                            //          .channel
		.sink_data          (router_003_src_data),                               //          .data
		.sink_startofpacket (router_003_src_startofpacket),                      //          .startofpacket
		.sink_endofpacket   (router_003_src_endofpacket),                        //          .endofpacket
		.sink_valid         (router_003_src_valid),                              //          .valid
		.src0_ready         (rsp_demux_001_src0_ready),                          //      src0.ready
		.src0_valid         (rsp_demux_001_src0_valid),                          //          .valid
		.src0_data          (rsp_demux_001_src0_data),                           //          .data
		.src0_channel       (rsp_demux_001_src0_channel),                        //          .channel
		.src0_startofpacket (rsp_demux_001_src0_startofpacket),                  //          .startofpacket
		.src0_endofpacket   (rsp_demux_001_src0_endofpacket),                    //          .endofpacket
		.src1_ready         (rsp_demux_001_src1_ready),                          //      src1.ready
		.src1_valid         (rsp_demux_001_src1_valid),                          //          .valid
		.src1_data          (rsp_demux_001_src1_data),                           //          .data
		.src1_channel       (rsp_demux_001_src1_channel),                        //          .channel
		.src1_startofpacket (rsp_demux_001_src1_startofpacket),                  //          .startofpacket
		.src1_endofpacket   (rsp_demux_001_src1_endofpacket)                     //          .endofpacket
	);
 
	DE0_NANO_SOC_QSYS_mm_interconnect_0_rsp_demux_002 rsp_demux_002 (
		.clk                (pll_sys_outclk0_clk),                               //       clk.clk
		.reset              (onchip_memory2_reset1_reset_bridge_in_reset_reset), // clk_reset.reset
		.sink_ready         (router_004_src_ready),                              //      sink.ready
		.sink_channel       (router_004_src_channel),                            //          .channel
		.sink_data          (router_004_src_data),                               //          .data
		.sink_startofpacket (router_004_src_startofpacket),                      //          .startofpacket
		.sink_endofpacket   (router_004_src_endofpacket),                        //          .endofpacket
		.sink_valid         (router_004_src_valid),                              //          .valid
		.src0_ready         (rsp_demux_002_src0_ready),                          //      src0.ready
		.src0_valid         (rsp_demux_002_src0_valid),                          //          .valid
		.src0_data          (rsp_demux_002_src0_data),                           //          .data
		.src0_channel       (rsp_demux_002_src0_channel),                        //          .channel
		.src0_startofpacket (rsp_demux_002_src0_startofpacket),                  //          .startofpacket
		.src0_endofpacket   (rsp_demux_002_src0_endofpacket)                     //          .endofpacket
	);
 
	DE0_NANO_SOC_QSYS_mm_interconnect_0_rsp_demux_002 rsp_demux_003 (
		.clk                (pll_sys_outclk0_clk),                               //       clk.clk
		.reset              (onchip_memory2_reset1_reset_bridge_in_reset_reset), // clk_reset.reset
		.sink_ready         (router_005_src_ready),                              //      sink.ready
		.sink_channel       (router_005_src_channel),                            //          .channel
		.sink_data          (router_005_src_data),                               //          .data
		.sink_startofpacket (router_005_src_startofpacket),                      //          .startofpacket
		.sink_endofpacket   (router_005_src_endofpacket),                        //          .endofpacket
		.sink_valid         (router_005_src_valid),                              //          .valid
		.src0_ready         (rsp_demux_003_src0_ready),                          //      src0.ready
		.src0_valid         (rsp_demux_003_src0_valid),                          //          .valid
		.src0_data          (rsp_demux_003_src0_data),                           //          .data
		.src0_channel       (rsp_demux_003_src0_channel),                        //          .channel
		.src0_startofpacket (rsp_demux_003_src0_startofpacket),                  //          .startofpacket
		.src0_endofpacket   (rsp_demux_003_src0_endofpacket)                     //          .endofpacket
	);
 
	DE0_NANO_SOC_QSYS_mm_interconnect_0_rsp_demux_002 rsp_demux_004 (
		.clk                (pll_sys_outclk0_clk),                               //       clk.clk
		.reset              (onchip_memory2_reset1_reset_bridge_in_reset_reset), // clk_reset.reset
		.sink_ready         (router_006_src_ready),                              //      sink.ready
		.sink_channel       (router_006_src_channel),                            //          .channel
		.sink_data          (router_006_src_data),                               //          .data
		.sink_startofpacket (router_006_src_startofpacket),                      //          .startofpacket
		.sink_endofpacket   (router_006_src_endofpacket),                        //          .endofpacket
		.sink_valid         (router_006_src_valid),                              //          .valid
		.src0_ready         (rsp_demux_004_src0_ready),                          //      src0.ready
		.src0_valid         (rsp_demux_004_src0_valid),                          //          .valid
		.src0_data          (rsp_demux_004_src0_data),                           //          .data
		.src0_channel       (rsp_demux_004_src0_channel),                        //          .channel
		.src0_startofpacket (rsp_demux_004_src0_startofpacket),                  //          .startofpacket
		.src0_endofpacket   (rsp_demux_004_src0_endofpacket)                     //          .endofpacket
	);
 
	DE0_NANO_SOC_QSYS_mm_interconnect_0_rsp_demux_002 rsp_demux_005 (
		.clk                (pll_sys_outclk0_clk),                               //       clk.clk
		.reset              (onchip_memory2_reset1_reset_bridge_in_reset_reset), // clk_reset.reset
		.sink_ready         (router_007_src_ready),                              //      sink.ready
		.sink_channel       (router_007_src_channel),                            //          .channel
		.sink_data          (router_007_src_data),                               //          .data
		.sink_startofpacket (router_007_src_startofpacket),                      //          .startofpacket
		.sink_endofpacket   (router_007_src_endofpacket),                        //          .endofpacket
		.sink_valid         (router_007_src_valid),                              //          .valid
		.src0_ready         (rsp_demux_005_src0_ready),                          //      src0.ready
		.src0_valid         (rsp_demux_005_src0_valid),                          //          .valid
		.src0_data          (rsp_demux_005_src0_data),                           //          .data
		.src0_channel       (rsp_demux_005_src0_channel),                        //          .channel
		.src0_startofpacket (rsp_demux_005_src0_startofpacket),                  //          .startofpacket
		.src0_endofpacket   (rsp_demux_005_src0_endofpacket)                     //          .endofpacket
	);
 
	DE0_NANO_SOC_QSYS_mm_interconnect_0_rsp_mux rsp_mux (
		.clk                 (pll_sys_outclk0_clk),                            //       clk.clk
		.reset               (nios2_qsys_reset_n_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready           (rsp_mux_src_ready),                              //       src.ready
		.src_valid           (rsp_mux_src_valid),                              //          .valid
		.src_data            (rsp_mux_src_data),                               //          .data
		.src_channel         (rsp_mux_src_channel),                            //          .channel
		.src_startofpacket   (rsp_mux_src_startofpacket),                      //          .startofpacket
		.src_endofpacket     (rsp_mux_src_endofpacket),                        //          .endofpacket
		.sink0_ready         (rsp_demux_src0_ready),                           //     sink0.ready
		.sink0_valid         (rsp_demux_src0_valid),                           //          .valid
		.sink0_channel       (rsp_demux_src0_channel),                         //          .channel
		.sink0_data          (rsp_demux_src0_data),                            //          .data
		.sink0_startofpacket (rsp_demux_src0_startofpacket),                   //          .startofpacket
		.sink0_endofpacket   (rsp_demux_src0_endofpacket),                     //          .endofpacket
		.sink1_ready         (rsp_demux_001_src0_ready),                       //     sink1.ready
		.sink1_valid         (rsp_demux_001_src0_valid),                       //          .valid
		.sink1_channel       (rsp_demux_001_src0_channel),                     //          .channel
		.sink1_data          (rsp_demux_001_src0_data),                        //          .data
		.sink1_startofpacket (rsp_demux_001_src0_startofpacket),               //          .startofpacket
		.sink1_endofpacket   (rsp_demux_001_src0_endofpacket)                  //          .endofpacket
	);
 
	DE0_NANO_SOC_QSYS_mm_interconnect_0_rsp_mux_001 rsp_mux_001 (
		.clk                 (pll_sys_outclk0_clk),                            //       clk.clk
		.reset               (nios2_qsys_reset_n_reset_bridge_in_reset_reset), // clk_reset.reset
		.src_ready           (rsp_mux_001_src_ready),                          //       src.ready
		.src_valid           (rsp_mux_001_src_valid),                          //          .valid
		.src_data            (rsp_mux_001_src_data),                           //          .data
		.src_channel         (rsp_mux_001_src_channel),                        //          .channel
		.src_startofpacket   (rsp_mux_001_src_startofpacket),                  //          .startofpacket
		.src_endofpacket     (rsp_mux_001_src_endofpacket),                    //          .endofpacket
		.sink0_ready         (rsp_demux_src1_ready),                           //     sink0.ready
		.sink0_valid         (rsp_demux_src1_valid),                           //          .valid
		.sink0_channel       (rsp_demux_src1_channel),                         //          .channel
		.sink0_data          (rsp_demux_src1_data),                            //          .data
		.sink0_startofpacket (rsp_demux_src1_startofpacket),                   //          .startofpacket
		.sink0_endofpacket   (rsp_demux_src1_endofpacket),                     //          .endofpacket
		.sink1_ready         (rsp_demux_001_src1_ready),                       //     sink1.ready
		.sink1_valid         (rsp_demux_001_src1_valid),                       //          .valid
		.sink1_channel       (rsp_demux_001_src1_channel),                     //          .channel
		.sink1_data          (rsp_demux_001_src1_data),                        //          .data
		.sink1_startofpacket (rsp_demux_001_src1_startofpacket),               //          .startofpacket
		.sink1_endofpacket   (rsp_demux_001_src1_endofpacket),                 //          .endofpacket
		.sink2_ready         (rsp_demux_002_src0_ready),                       //     sink2.ready
		.sink2_valid         (rsp_demux_002_src0_valid),                       //          .valid
		.sink2_channel       (rsp_demux_002_src0_channel),                     //          .channel
		.sink2_data          (rsp_demux_002_src0_data),                        //          .data
		.sink2_startofpacket (rsp_demux_002_src0_startofpacket),               //          .startofpacket
		.sink2_endofpacket   (rsp_demux_002_src0_endofpacket),                 //          .endofpacket
		.sink3_ready         (rsp_demux_003_src0_ready),                       //     sink3.ready
		.sink3_valid         (rsp_demux_003_src0_valid),                       //          .valid
		.sink3_channel       (rsp_demux_003_src0_channel),                     //          .channel
		.sink3_data          (rsp_demux_003_src0_data),                        //          .data
		.sink3_startofpacket (rsp_demux_003_src0_startofpacket),               //          .startofpacket
		.sink3_endofpacket   (rsp_demux_003_src0_endofpacket),                 //          .endofpacket
		.sink4_ready         (rsp_demux_004_src0_ready),                       //     sink4.ready
		.sink4_valid         (rsp_demux_004_src0_valid),                       //          .valid
		.sink4_channel       (rsp_demux_004_src0_channel),                     //          .channel
		.sink4_data          (rsp_demux_004_src0_data),                        //          .data
		.sink4_startofpacket (rsp_demux_004_src0_startofpacket),               //          .startofpacket
		.sink4_endofpacket   (rsp_demux_004_src0_endofpacket),                 //          .endofpacket
		.sink5_ready         (rsp_demux_005_src0_ready),                       //     sink5.ready
		.sink5_valid         (rsp_demux_005_src0_valid),                       //          .valid
		.sink5_channel       (rsp_demux_005_src0_channel),                     //          .channel
		.sink5_data          (rsp_demux_005_src0_data),                        //          .data
		.sink5_startofpacket (rsp_demux_005_src0_startofpacket),               //          .startofpacket
		.sink5_endofpacket   (rsp_demux_005_src0_endofpacket)                  //          .endofpacket
	);
 
endmodule
 

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