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[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [actel/] [ordb1a3pe1500/] [rtl/] [verilog/] [versatile_mem_ctrl/] [rtl/] [verilog/] [versatile_mem_ctrl_defines.v] - Rev 408
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//`define ACTEL `define XILINX //`define ALTERA //`define GENERIC_PRIMITIVES //`define SDR_16 `define DDR_16 `define INT_CLOCKED_DATA_CAPTURE //`define DEL_DQS_DATA_CAPTURE_1 //`define DEL_DQS_DATA_CAPTURE_2 `define PORT0 `define PORT1 //`define PORT2 //`define PORT3 `define PORT4 //`define PORT5 //`define PORT6 //`define PORT7