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<hr><h1>AVR instruction set</h1><table border=0 cellpadding=0 cellspacing=0>
</table>
<TABLE border="1" cellspacing="0" cellpadding="4">
<CAPTION> AVR instruction set</CAPTION>
<TR>
<TH> Arithmetic
<TH> Bit & Others
<TH> Transfer
<TH> Jump
<TH> Branch
<TH> Call
<TR>
<TD valign="top">
ADD Rd, Rr <BR>
ADC Rd, Rr <BR>
ADIW Rd+1:Rd, K6 <BR>
<BR>
SUB Rd, Rr <BR>
SUBI Rd, K8 <BR>
SBC Rd, Rr <BR>
SBCI Rd, K8 <BR>
SBIW Rd+1:Rd, K6 <BR>
<BR>
INC Rd <BR>
DEC Rd <BR>
<BR>
AND Rd, Rr <BR>
ANDI Rd, K8 <BR>
OR Rd, Rr <BR>
ORI Rd, K8 <BR>
EOR Rd, Rr <BR>
<BR>
COM Rd <BR>
NEG Rd <BR>
CP Rd, Rr <BR>
CPC Rd, Rr <BR>
CPI Rd, K8 <BR>
SWAP Rd <BR>
<BR>
LSR Rd <BR>
ROR Rd <BR>
ASR Rd <BR>
<BR>
MUL Rd, Rr* <BR>
MULS Rd, Rr <BR>
MULSU Rd, Rr <BR>
FMUL Rd, Rr <BR>
FMULS Rd, Rr <BR>
FMULSU Rd, Rr <BR>
<TD valign="top">
BSET s <BR>
BCLR s <BR>
SBI A, b <BR>
CBI A, b <BR>
BST Rd, b <BR>
BLD Rd, b <BR>
<BR>
NOP <BR>
<I>
BREAK** <BR>
SLEEP <BR>
WDR <BR>
</I>
<TD valign="top">
MOV Rd, Rr <BR>
MOVW Rd+1:Rd, Rr+1:Rr <BR>
<BR>
IN Rd, A <BR>
OUT A, Rr <BR>
<BR>
PUSH Rr <BR>
POP Rr <BR>
<BR>
LDI Rd, K8 <BR>
LDS Rd, K16 <BR>
<BR>
LD Rd, X <BR>
LD Rd, -X <BR>
LD Rd, X+ <BR>
<BR>
LDD Rd, Y+K6 <BR>
LD Rd, -Y <BR>
LD Rd, Y+ <BR>
<BR>
LDD Rd, Z+K6 <BR>
LD Rd, -Z <BR>
LD Rd, Z+ <BR>
<BR>
STS K16, Rr <BR>
<BR>
ST X, Rr <BR>
ST -X, Rr <BR>
ST X+, Rr <BR>
<BR>
STD Y+K6, Rr <BR>
ST -Y, Rr <BR>
ST Y+, Rr <BR>
<BR>
STD Z+K6, Rr <BR>
ST -Z, Rr <BR>
ST Z+, Rr <BR>
<BR>
LPM <BR>
LPM Rd, Z <BR>
LPM Rd, Z+ <BR>
ELPM <BR>
ELPM Rd, Z <BR>
ELPM Rd, Z+ <BR>
<BR>
<I>
SPM <BR>
</I>
<TD valign="top">
RJMP K12 <BR>
IJMP <BR>
EIJMP <BR>
JMP K22 <BR>
<TD valign="top">
CPSE Rd, Rr <BR>
<BR>
SBRC Rr, b <BR>
SBRS Rr, b <BR>
<BR>
SBIC A, b <BR>
SBIS A, b <BR>
<BR>
BRBC s, K7 <BR>
BRBS s, K7 <BR>
<TD valign="top">
RCALL K12 <BR>
ICALL <BR>
EICALL <BR>
CALL K22 <BR>
<BR>
RET <BR>
RETI <BR>
</TABLE>
<b>*</b> Multiplications are fully supported by the pipeline (in terms of timing, wires and registers). However, the multiplication module itself is null-defined in the ALU, and always returns zero for now. It will be defined and plugged into the ALU in a future version of pAVR. <br>
<b>**</b> Italicized instructions are currently not implemented in pAVR. <br>
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