OpenCores
URL https://opencores.org/ocsvn/pavr/pavr/trunk

Subversion Repositories pavr

[/] [pavr/] [trunk/] [doc/] [html/] [group__pavr__pipeline__alu.html] - Rev 6

Compare with Previous | Blame | View Log

<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<html><head><meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
<title>ALU</title>
<link href="doxygen.css" rel="stylesheet" type="text/css">
</head><body>
<!-- Generated by Doxygen 1.2.16 -->
<center>
<a class="qindex" href="main.html">Main Page</a> &nbsp; <a class="qindex" href="modules.html">Modules</a> &nbsp; <a class="qindex" href="pages.html">Related Pages</a> &nbsp; </center>
<hr><h1>ALU<br>
<small>
[<a class="el" href="group__pavr__pipeline.html">Pipeline details</a>]</small>
</h1><table border=0 cellpadding=0 cellspacing=0>
</table>
<dl compact><dt><b>
ALU description</b><dd>
The ALU is not a potentially conflicting resource, as it is fully controlled by pipeline stage s5. <br>
 <br>
 There are two ALU operands. The first operand is taken either from RF read port 1, if it's an 8 bit operand, or taken from RF read port 1 (lower 8 bits) and from RF read port 2 (higher 8 bits), if it's a 16 bit operand. The second operand is taken either from the RF read port 2 or directly from the instruction opcode; it is always 8 bit-wide. <br>
 Both operands are fed to the ALU through the Bypass Unit. <br>
 All ALU-requiring instructions write their result into the Bypass Unit. <br>
 Details about the ALU hardware resource (connectivity, ALU opcodes) can be found <a class="el" href="group__pavr__hwres__alu.html">here</a>. <br>
 Instructions that make use of the ALU-related pipeline registers:<ul>
<li>ADD, ADC, ADIW<li>SUB, SUBI, SBC, SBCI, SBIW<li>INC, DEC<li>AND, ANDI<li>OR, ORI, EOR<li>COM, NEG, CP, CPC, CPI, SWAP<li>LSR, ROR, ASR<li>MUL, MULS, MULSU<li>FMUL, FMULS, FMULSU<li>MOV, MOVW</ul>
</dl><dl compact><dt><b>
Plugging the ALU into the pipeline</b><dd>
The pipeline registers related to ALU access are presented in the picture below. <br>
 From this picture, it can also easely figured out instructions' timing. <br>
 <a name="alu_pipe_ref_01"></a> <br>
 <div align="center">
<img src="pavr_pipe_alu_01.gif" alt="pavr_pipe_alu_01.gif">
</div>
<br>
 </dl><hr><address align="right"><small>Generated on Tue Dec 31 20:26:31 2002 for Pipelined AVR microcontroller by
<a href="http://www.doxygen.org/index.html">
<img src="doxygen.png" alt="doxygen" align="middle" border=0 
width=110 height=53></a>1.2.16 </small></address>
</body>
</html>
 

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.