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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN"> <html><head><meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1"> <title>Module Index</title> <link href="doxygen.css" rel="stylesheet" type="text/css"> </head><body> <!-- Generated by Doxygen 1.2.16 --> <center> <a class="qindex" href="main.html">Main Page</a> <a class="qindex" href="modules.html">Modules</a> <a class="qindex" href="pages.html">Related Pages</a> </center> <hr><h1>Pipelined AVR microcontroller Modules</h1>Here is a list of all modules:<ul> <li><a class="el" href="group__pavr__intro.html">Introduction</a> <li><a class="el" href="group__pavr__avrarch.html">AVR architecture</a> <li><a class="el" href="group__pavr__avris.html">AVR instruction set</a> <li><a class="el" href="group__pavr__implementation.html">Implementation</a> <ul> <li><a class="el" href="group__pavr__control.html">Pipeline structure</a> <li><a class="el" href="group__pavr__hwres.html">Hardware resources</a> <ul> <li><a class="el" href="group__pavr__hwres__rf.html">Register File</a> <ul> <li><a class="el" href="group__pavr__hwres__rf__rd1.html">Read port 1</a> <li><a class="el" href="group__pavr__hwres__rf__rd2.html">Read port 2</a> <li><a class="el" href="group__pavr__hwres__rf__wr.html">Write port</a> <li><a class="el" href="group__pavr__hwres__rf__xwr.html">X port</a> <li><a class="el" href="group__pavr__hwres__rf__ywr.html">Y port</a> <li><a class="el" href="group__pavr__hwres__rf__zwr.html">Z port</a> </ul> <li><a class="el" href="group__pavr__hwres__bpu.html">Bypass Unit</a> <ul> <li><a class="el" href="group__pavr__hwres__bpr0.html">Bypass chain 0</a> <li><a class="el" href="group__pavr__hwres__bpr1.html">Bypass chain 1</a> <li><a class="el" href="group__pavr__hwres__bpr2.html">Bypass chain 2</a> </ul> <li><a class="el" href="group__pavr__hwres__iof.html">IO File</a> <ul> <li><a class="el" href="group__pavr__hwres__iof__gen.html">General IO port</a> <li><a class="el" href="group__pavr__hwres__iof__sregwr.html">SREG port</a> <li><a class="el" href="group__pavr__hwres__iof__spwr.html">SP port</a> <li><a class="el" href="group__pavr__hwres__iof__rampxwr.html">RAMPX port</a> <li><a class="el" href="group__pavr__hwres__iof__rampywr.html">RAMPY port</a> <li><a class="el" href="group__pavr__hwres__iof__rampzwr.html">RAMPZ port</a> <li><a class="el" href="group__pavr__hwres__iof__rampdwr.html">RAMPD port</a> <li><a class="el" href="group__pavr__hwres__iof__eindwr.html">EIND port</a> <li><a class="el" href="group__pavr__hwres__iof__perif.html">Peripherals</a> <ul> <li><a class="el" href="group__pavr__hwres__iof__perif__pa.html">Port A</a> <li><a class="el" href="group__pavr__hwres__iof__perif__int0.html">External interrupt 0</a> <li><a class="el" href="group__pavr__hwres__iof__perif__t0.html">Timer 0</a> </ul> </ul> <li><a class="el" href="group__pavr__hwres__alu.html">ALU</a> <li><a class="el" href="group__pavr__hwres__dacu.html">DACU</a> <li><a class="el" href="group__pavr__hwres__dm.html">Data Memory</a> <li><a class="el" href="group__pavr__hwres__pm.html">Program Memory</a> <li><a class="el" href="group__pavr__hwres__sfu.html">Stall and Flush Unit</a> </ul> <li><a class="el" href="group__pavr__pipeline.html">Pipeline details</a> <ul> <li><a class="el" href="group__pavr__pipeline__alu.html">ALU</a> <li><a class="el" href="group__pavr__pipeline__iof.html">IOF access</a> <li><a class="el" href="group__pavr__pipeline__dacu.html">DACU access</a> <li><a class="el" href="group__pavr__pipeline__jumps.html">Jumps</a> <li><a class="el" href="group__pavr__pipeline__branches.html">Branches</a> <li><a class="el" href="group__pavr__pipeline__skips.html">Skips</a> <li><a class="el" href="group__pavr__pipeline__calls.html">Calls</a> <li><a class="el" href="group__pavr__pipeline__returns.html">Returns</a> <li><a class="el" href="group__pavr__pipeline__int.html">Interrupts</a> <li><a class="el" href="group__pavr__pipeline__others.html">Others</a> </ul> </ul> <li><a class="el" href="group__pavr__test.html">Testing</a> <ul> <li><a class="el" href="group__pavr__test__bugs.html">Bugs</a> <li><a class="el" href="group__pavr__fpga.html">FPGA prototyping</a> </ul> <li><a class="el" href="group__pavr__src.html">Sources</a> <li><a class="el" href="group__pavr__ref.html">References</a> <li><a class="el" href="group__pavr__thoughts.html">Some final thoughts</a> <li><a class="el" href="group__pavr__about.html">About ...</a> </ul> <hr><address align="right"><small>Generated on Tue Dec 31 20:26:31 2002 for Pipelined AVR microcontroller by <a href="http://www.doxygen.org/index.html"> <img src="doxygen.png" alt="doxygen" align="middle" border=0 width=110 height=53></a>1.2.16 </small></address> </body> </html>