Subversion Repositories product_code_iterative_decoder

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-- Copyright (C) 2005 Arif Endro Nugroho
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library IEEE;
use IEEE.std_logic_1164.all;
 
entity twos_c_8bit is
   port (
   twos_c_i : in  bit_vector (07 downto 00);
   twos_c_o : out bit_vector (07 downto 00)
   );
end twos_c_8bit;
 
architecture data_flow of twos_c_8bit is
 
begin
 
twos_c_o(00) <= (twos_c_i(00));
twos_c_o(01) <= (not(twos_c_i(01)) xor (not(twos_c_i(00))));
twos_c_o(02) <= (not(twos_c_i(02)) xor (not(twos_c_i(00)) and not(twos_c_i(01))));
twos_c_o(03) <= (not(twos_c_i(03)) xor ((not(twos_c_i(00)) and not(twos_c_i(01))) and not(twos_c_i(02))));
twos_c_o(04) <= (not(twos_c_i(04)) xor ((not(twos_c_i(00)) and not(twos_c_i(01))) and (not(twos_c_i(02)) and not(twos_c_i(03)))));
twos_c_o(05) <= (not(twos_c_i(05)) xor (((not(twos_c_i(00)) and not(twos_c_i(01))) and (not(twos_c_i(02)) and not(twos_c_i(03)))) and not(twos_c_i(04))));
twos_c_o(06) <= (not(twos_c_i(06)) xor (((not(twos_c_i(00)) and not(twos_c_i(01))) and (not(twos_c_i(02)) and not(twos_c_i(03)))) and (not(twos_c_i(04)) and not(twos_c_i(05)))));
twos_c_o(07) <= (not(twos_c_i(07)) xor (((not(twos_c_i(00)) and not(twos_c_i(01))) and (not(twos_c_i(02)) and not(twos_c_i(03)))) and ((not(twos_c_i(04)) and not(twos_c_i(05))) and not(twos_c_i(06)))));
 
end data_flow;