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//////////////////////////////////////////////////////////////////////
////                                                              ////
//// Copyright (C) 2017 Authors and OPENCORES.ORG                 ////
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//// This source file is free software; you can redistribute it   ////
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//// Public License as published by the Free Software Foundation; ////
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//////////////////////////////////////////////////////////////////////
// ----------------------------------------------------------------------------

`timescale 1ps/1ps

module tb_top();

  // --------------------------------------------------------------------
  // test bench clock & reset
  wire clk_100mhz;
  wire tb_clk   = clk_100mhz;
  wire tb_rst;

  tb_base #(.PERIOD(10_000)) tb(clk_100mhz, tb_rst);


  // --------------------------------------------------------------------
  //
  wire tb_rst_s;
  wire aclk     = tb_clk;
  wire aresetn  = ~tb_rst_s;
  wire clk      = tb_clk;
  wire reset    = tb_rst_s;

  sync_reset sync_reset_i(tb_clk, tb_rst, tb_rst_s);


  // --------------------------------------------------------------------
  //
  import tb_recursive_axis_switch_pkg::*;


  // --------------------------------------------------------------------
  //
  axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_in(.*);
  axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_out[SD-1:0](.*);


  // --------------------------------------------------------------------
  //
  wire [SA-1:0] select = 0;

  recursive_axis_switch #(.N(N), .I(I), .D(D), .U(U), .SA(SA))
    dut(.*);


  // --------------------------------------------------------------------
  // sim models
  //  |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |
  // \|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/
  //  '   '   '   '   '   '   '   '   '   '   '   '   '   '   '   '   '


  // // --------------------------------------------------------------------
  // //
  // initial
    // axis_out.cb_s.tready <= 1;


  // --------------------------------------------------------------------
  //
  tb_recursive_axis_switch_class a_h;

  initial
    a_h = new(axis_in, axis_out);



  //  '   '   '   '   '   '   '   '   '   '   '   '   '   '   '   '   '
  // /|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\
  //  |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |
  // sim models
  // --------------------------------------------------------------------


  // --------------------------------------------------------------------
  //  debug wires


  // --------------------------------------------------------------------
  // test
  the_test test(tb_clk, tb_rst);

  initial
    begin

      test.run_the_test();

      $display("^^^---------------------------------");
      $display("^^^ %16.t | Testbench done.", $time);
      $display("^^^---------------------------------");

      $display("^^^---------------------------------");

      $stop();

    end

endmodule