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[/] [qaz_libs/] [trunk/] [basal/] [src/] [FIFOs/] [CummingsSNUG2002SJ_FIFO1/] [sync_r2w.v] - Rev 34

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// --------------------------------------------------------------------
//
 
 
module
  sync_r2w
  #(
    parameter ADDRSIZE = 4
  )
  (
    output reg [ADDRSIZE:0] wq2_rptr,
    input [ADDRSIZE:0]      rptr,
    input                   wclk,
    input                   wrst_n
  );
 
  reg [ADDRSIZE:0] wq1_rptr;
 
  always @(posedge wclk or negedge wrst_n)
    if (!wrst_n)
      {wq2_rptr,wq1_rptr} <= 0;
    else
      {wq2_rptr,wq1_rptr} <= {wq1_rptr,rptr};
 
endmodule
 
 

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