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[/] [qrisc32/] [trunk/] [Readme.txt] - Rev 2

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    Project Qrisc32 is risc cpu implementation, purpose is studying 
    "Digital System Design" course at Kyoung Hee University during my PhD earning.
    Testbench runs 3 different  sorting algorithms on qrisc32 and shows cycles for
    each turn. For observing instruction set , please refer to "risc_report.pdf" file.
    For running simulation you should use qrisc32_TB.do in Modelsim.
    Copyright (C) 2010  Vinogradov Viacheslav.

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