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URL https://opencores.org/ocsvn/s6soc/s6soc/trunk

Subversion Repositories s6soc

[/] [s6soc/] [trunk/] [rtl/] [toplevel.v] - Rev 3

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`timescale 10ns / 100ps
module toplevel(i_clk_8mhz,
		o_qspi_cs_n, o_qspi_sck, io_qspi_dat,
		i_btn, o_led, o_pwm, o_pwm_shutdown_n, o_pwm_gain,
			i_uart, o_uart,
		i_kp_row, o_kp_col,
		i_gpio, o_gpio,
		io_scl, io_sda);
	input		i_clk_8mhz;
	//
	// Quad SPI Flash
	output	wire		o_qspi_cs_n;
	output	wire		o_qspi_sck;
	inout	wire	[3:0]	io_qspi_dat;
	//
	// General purpose I/O
	input		[1:0]	i_btn;
	output	wire	[3:0]	o_led;
	output	wire		o_pwm, o_pwm_shutdown_n, o_pwm_gain;
	//
	// and our serial port
	input		i_uart;
	output	wire	o_uart;
	// Our keypad
	input		[3:0]	i_kp_row;
	output	wire	[3:0]	o_kp_col;
	// and our GPIO
	input		[15:2]	i_gpio;
	output	wire	[15:2]	o_gpio;
	// and our I2C port
	inout			io_scl, io_sda;
 
/////
	wire	ck_zero_0, clk_s; // intermediate_clk, intermediate_clk_n;
 
	// Clock frequency = (25 / 2) * 8Mhz
	// Clock period = 10 ns
	DCM_SP #(
		.CLKDV_DIVIDE(2.0),
		.CLKFX_DIVIDE(2),
		.CLKFX_MULTIPLY(20),
		.CLKIN_DIVIDE_BY_2("FALSE"),
		.CLKIN_PERIOD(125.0),
		.CLKOUT_PHASE_SHIFT("NONE"),
		.CLK_FEEDBACK("1X"),
		.DESKEW_ADJUST("SYSTEM_SYNCHRONOUS"),
		.DLL_FREQUENCY_MODE("LOW"),
		.DUTY_CYCLE_CORRECTION("TRUE"),
		.PHASE_SHIFT(0),
		.STARTUP_WAIT("TRUE")
	) u0(	.CLKIN(i_clk_8mhz),
		.CLK0(ck_zero_0),
		.CLKFB(ck_zero_0),
		.CLKFX(clk_s),
		// .CLKFX180(intermediate_clk_n),
		.PSEN(1'b0),
		.RST(1'b0));
 
	// Generate active-high reset.
	/*
	reg	r_reset;
	initial	r_reset = 1'b1;
	always @(posedge i_clk_12mhz)
		r_reset <= 1'b0;
	*/
	assign	reset_s = 1'b0;
 
	wire		rx_stb, tx_stb;
	wire	[7:0]	rx_data, tx_data;
	wire		tx_busy;
	wire	[29:0]	uart_setup;
 
	wire	rx_break, rx_parity_err, rx_frame_err, rx_ck_uart, tx_break;
	assign	tx_break = 1'b0;
	rxuart	rcvuart(clk_s, reset_s, uart_setup, i_uart, rx_stb, rx_data,
			rx_break, rx_parity_err, rx_frame_err, rx_ck_uart);
	txuart	tcvuart(clk_s, reset_s, uart_setup, tx_break, tx_stb, tx_data,
			o_uart, tx_busy);
 
 
 
	wire	[3:0]	qspi_dat;
	wire	[1:0]	qspi_bmod;
	wire	[15:0]	w_gpio;
 
	busmaster	masterbus(clk_s, reset_s,
		// External ... bus control (if enabled)
		rx_stb, rx_data, tx_stb, tx_data, tx_busy,
		// SPI/SD-card flash
		o_qspi_cs_n, o_qspi_sck, qspi_dat, io_qspi_dat, qspi_bmod,
		// Board lights and switches
		i_btn, o_led, o_pwm, { o_pwm_shutdown_n, o_pwm_gain },
		// Keypad connections
		i_kp_row, o_kp_col,
		// UART control
		uart_setup,
		// GPIO lines
		{ i_gpio, io_scl, io_sda }, w_gpio
		);
 
	assign io_qspi_dat = (~qspi_bmod[1])?({2'b11,1'bz,qspi_dat[0]})
				:((qspi_bmod[0])?(4'bzzzz):(qspi_dat[3:0]));
 
	assign	io_sda = (w_gpio[0]) ? 1'bz : 1'b0;
	assign	io_scl = (w_gpio[1]) ? 1'bz : 1'b0;
	assign	o_gpio[15:2] = w_gpio[15:2];
 
endmodule
 

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