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[/] [scct/] [trunk/] [test/] [Makefile] - Rev 2

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# $Id: Makefile 2 2015-06-15 13:52:02Z fkluge $

PROJECT=timer_$(CASE)

MOD_SRC=../verilog

SRC = $(wildcard $(MOD_SRC)/scct*.v) test_$(CASE).v
DUMP = test.lxt2

all: $(PROJECT)

$(PROJECT): $(SRC)
        iverilog -I$(MOD_SRC) -o $(PROJECT) $(SRC)

run: $(PROJECT)
        vvp $(PROJECT) -lxt2


view: #$(DUMP)
        gtkwave $(DUMP)

#$(DUMP): $(PROJECT)

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