OpenCores
URL https://opencores.org/ocsvn/sdr_ctrl/sdr_ctrl/trunk

Subversion Repositories sdr_ctrl

[/] [sdr_ctrl/] [trunk/] [verif/] [run/] [compile.modelsim] - Rev 46

Go to most recent revision | Compare with Previous | Blame | View Log

#!/bin/csh

if(! -e work) then
   vlib work
else
   \rm -rf work
   vlib work
endif
if($1 == "core") then # run SDRAM Core level test case
   vlog -work work +define+$2 -f filelist_core.f
else # Run SDRAM Top Level test cases
   vlog -work work +define+$2 -f filelist_top.f
endif

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.