URL
https://opencores.org/ocsvn/socgen/socgen/trunk
Subversion Repositories socgen
[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [adv_debug_sys/] [Hardware/] [adv_dbg_if/] [doc/] [sym/] [adv_dbg_if_wb.sym] - Rev 135
Compare with Previous | Blame | View Log
v 20100214 1
B 300 0 3200 2700 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 400 2850 5 10 1 1 0 0 1 1
device=adv_dbg_if_wb
T 400 3050 5 10 1 1 0 0 1 1
refdes=U?
T 400 3200 0 10 0 1 0 0 1 1
vendor=opencores.org
T 400 3200 0 10 0 1 0 0 1 1
library=adv_debug_sys
T 400 3200 0 10 0 1 0 0 1 1
component=adv_dbg_if
T 400 3200 0 10 0 1 0 0 1 1
version=wb
P 300 200 0 200 10 1 1
{
T 400 200 5 10 1 1 0 1 1 1
pinnumber=wb_dat_i[31:0]
T 400 200 5 10 0 1 0 1 1 1
pinseq=1
}
P 300 400 0 400 4 0 1
{
T 400 400 5 10 1 1 0 1 1 1
pinnumber=wb_rst_i
T 400 400 5 10 0 1 0 1 1 1
pinseq=2
}
P 300 600 0 600 4 0 1
{
T 400 600 5 10 1 1 0 1 1 1
pinnumber=wb_err_i
T 400 600 5 10 0 1 0 1 1 1
pinseq=3
}
P 300 800 0 800 4 0 1
{
T 400 800 5 10 1 1 0 1 1 1
pinnumber=wb_clk_i
T 400 800 5 10 0 1 0 1 1 1
pinseq=4
}
P 300 1000 0 1000 4 0 1
{
T 400 1000 5 10 1 1 0 1 1 1
pinnumber=wb_ack_i
T 400 1000 5 10 0 1 0 1 1 1
pinseq=5
}
P 300 1200 0 1200 4 0 1
{
T 400 1200 5 10 1 1 0 1 1 1
pinnumber=update_dr_i
T 400 1200 5 10 0 1 0 1 1 1
pinseq=6
}
P 300 1400 0 1400 4 0 1
{
T 400 1400 5 10 1 1 0 1 1 1
pinnumber=tdi_i
T 400 1400 5 10 0 1 0 1 1 1
pinseq=7
}
P 300 1600 0 1600 4 0 1
{
T 400 1600 5 10 1 1 0 1 1 1
pinnumber=tck_i
T 400 1600 5 10 0 1 0 1 1 1
pinseq=8
}
P 300 1800 0 1800 4 0 1
{
T 400 1800 5 10 1 1 0 1 1 1
pinnumber=shift_dr_i
T 400 1800 5 10 0 1 0 1 1 1
pinseq=9
}
P 300 2000 0 2000 4 0 1
{
T 400 2000 5 10 1 1 0 1 1 1
pinnumber=rst_i
T 400 2000 5 10 0 1 0 1 1 1
pinseq=10
}
P 300 2200 0 2200 4 0 1
{
T 400 2200 5 10 1 1 0 1 1 1
pinnumber=debug_select_i
T 400 2200 5 10 0 1 0 1 1 1
pinseq=11
}
P 300 2400 0 2400 4 0 1
{
T 400 2400 5 10 1 1 0 1 1 1
pinnumber=capture_dr_i
T 400 2400 5 10 0 1 0 1 1 1
pinseq=12
}
P 3500 200 3800 200 10 1 1
{
T 3400 200 5 10 1 1 0 7 1 1
pinnumber=wb_sel_o[3:0]
T 3400 200 5 10 0 1 0 7 1 1
pinseq=13
}
P 3500 400 3800 400 10 1 1
{
T 3400 400 5 10 1 1 0 7 1 1
pinnumber=wb_dat_o[31:0]
T 3400 400 5 10 0 1 0 7 1 1
pinseq=14
}
P 3500 600 3800 600 10 1 1
{
T 3400 600 5 10 1 1 0 7 1 1
pinnumber=wb_cti_o[2:0]
T 3400 600 5 10 0 1 0 7 1 1
pinseq=15
}
P 3500 800 3800 800 10 1 1
{
T 3400 800 5 10 1 1 0 7 1 1
pinnumber=wb_bte_o[1:0]
T 3400 800 5 10 0 1 0 7 1 1
pinseq=16
}
P 3500 1000 3800 1000 10 1 1
{
T 3400 1000 5 10 1 1 0 7 1 1
pinnumber=wb_adr_o[31:0]
T 3400 1000 5 10 0 1 0 7 1 1
pinseq=17
}
P 3500 1200 3800 1200 4 0 1
{
T 3400 1200 5 10 1 1 0 7 1 1
pinnumber=wb_we_o
T 3500 1200 5 10 0 1 0 7 1 1
pinseq=18
}
P 3500 1400 3800 1400 4 0 1
{
T 3400 1400 5 10 1 1 0 7 1 1
pinnumber=wb_stb_o
T 3500 1400 5 10 0 1 0 7 1 1
pinseq=19
}
P 3500 1600 3800 1600 4 0 1
{
T 3400 1600 5 10 1 1 0 7 1 1
pinnumber=wb_cyc_o
T 3500 1600 5 10 0 1 0 7 1 1
pinseq=20
}
P 3500 1800 3800 1800 4 0 1
{
T 3400 1800 5 10 1 1 0 7 1 1
pinnumber=wb_cab_o
T 3500 1800 5 10 0 1 0 7 1 1
pinseq=21
}
P 3500 2000 3800 2000 4 0 1
{
T 3400 2000 5 10 1 1 0 7 1 1
pinnumber=tdo_o
T 3500 2000 5 10 0 1 0 7 1 1
pinseq=22
}