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v 20100214 1
B 300 0  3600 1900 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 400 2050   5 10 1 1 0 0 1 1
device=serial_rcvr_fifo
T 400 2250 5 10 1 1 0 0 1 1
refdes=U?
T 400 2400    0 10 0 1 0 0 1 1
vendor=opencores.org
T 400 2400    0 10 0 1 0 0 1 1
library=logic
T 400 2400    0 10 0 1 0 0 1 1
component=serial_rcvr
T 400 2400    0 10 0 1 0 0 1 1
version=fifo
P 300 200 0 200 4 0 1  
{
T 400 200 5 10 1 1 0 1 1 1 
pinnumber=reset
T 400 200 5 10 0 1 0 1 1 1 
pinseq=1
}
P 300 400 0 400 4 0 1  
{
T 400 400 5 10 1 1 0 1 1 1 
pinnumber=rcv_stb
T 400 400 5 10 0 1 0 1 1 1 
pinseq=2
}
P 300 600 0 600 4 0 1  
{
T 400 600 5 10 1 1 0 1 1 1 
pinnumber=parity_type
T 400 600 5 10 0 1 0 1 1 1 
pinseq=3
}
P 300 800 0 800 4 0 1  
{
T 400 800 5 10 1 1 0 1 1 1 
pinnumber=parity_force
T 400 800 5 10 0 1 0 1 1 1 
pinseq=4
}
P 300 1000 0 1000 4 0 1  
{
T 400 1000 5 10 1 1 0 1 1 1 
pinnumber=parity_enable
T 400 1000 5 10 0 1 0 1 1 1 
pinseq=5
}
P 300 1200 0 1200 4 0 1  
{
T 400 1200 5 10 1 1 0 1 1 1 
pinnumber=pad_in
T 400 1200 5 10 0 1 0 1 1 1 
pinseq=6
}
P 300 1400 0 1400 4 0 1  
{
T 400 1400 5 10 1 1 0 1 1 1 
pinnumber=edge_enable
T 400 1400 5 10 0 1 0 1 1 1 
pinseq=7
}
P 300 1600 0 1600 4 0 1  
{
T 400 1600 5 10 1 1 0 1 1 1 
pinnumber=clk
T 400 1600 5 10 0 1 0 1 1 1 
pinseq=8
}
P 3900 200 4200 200 10 1 1
{
T 3800 200 5  10 1 1 0 7 1 1 
pinnumber=data_out[WIDTH-1:0]
T 3800 200 5  10 0 1 0 7 1 1 
pinseq=9
}
P 3900 400 4200 400 4 0 1
{
T 3800 400 5  10 1 1 0 7 1 1
pinnumber=stop_error
T 3900 400 5  10 0 1 0 7 1 1
pinseq=10
}
P 3900 600 4200 600 4 0 1
{
T 3800 600 5  10 1 1 0 7 1 1
pinnumber=parity_error
T 3900 600 5  10 0 1 0 7 1 1
pinseq=11
}
P 3900 800 4200 800 4 0 1
{
T 3800 800 5  10 1 1 0 7 1 1
pinnumber=data_avail
T 3900 800 5  10 0 1 0 7 1 1
pinseq=12
}