Subversion Repositories socgen

v 20100214 1
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T 400 1250   5 10 1 1 0 0 1 1
device=clock_gen_def
T 400 1450 5 10 1 1 0 0 1 1
refdes=U?
T 400 1600    0 10 0 1 0 0 1 1
vendor=opencores.org
T 400 1600    0 10 0 1 0 0 1 1
library=Testbench
T 400 1600    0 10 0 1 0 0 1 1
component=clock_gen
T 400 1600    0 10 0 1 0 0 1 1
version=def
P 300 200 0 200 10 1 1 
{
T 400 200 5 10 1 1 0 1 1 1
pinnumber=STOP[STOP_WIDTH-1:0]
T 400 200 5 10 0 1 0 1 1 1
pinseq=1
}
P 300 400 0 400 10 1 1 
{
T 400 400 5 10 1 1 0 1 1 1
pinnumber=BAD[BAD_WIDTH-1:0]
T 400 400 5 10 0 1 0 1 1 1
pinseq=2
}
P 300 600 0 600 4 0 1  
{
T 400 600 5 10 1 1 0 1 1 1 
pinnumber=clk
T 400 600 5 10 0 1 0 1 1 1 
pinseq=3
}
P 300 800 0 800 4 0 1  
{
T 400 800 5 10 1 1 0 1 1 1 
pinnumber=START
T 400 800 5 10 0 1 0 1 1 1 
pinseq=4
}
P 3300 200 3600 200 4 0 1
{
T 3200 200 5  10 1 1 0 7 1 1
pinnumber=reset
T 3300 200 5  10 0 1 0 7 1 1
pinseq=5
}
P 3300 400 3600 400 4 0 1
{
T 3200 400 5  10 1 1 0 7 1 1
pinnumber=FINISH
T 3300 400 5  10 0 1 0 7 1 1
pinseq=6
}
P 3300 600 3600 600 4 0 1
{
T 3200 600 5  10 1 1 0 7 1 1
pinnumber=FAIL
T 3300 600 5  10 0 1 0 7 1 1
pinseq=7
}