Subversion Repositories socgen

v 20100214 1
B 300 0  4700 4700 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 400 4850   5 10 1 1 0 0 1 1
device=cde_jtag_tap_logic
T 400 5050 5 10 1 1 0 0 1 1
refdes=U?
T 400 5200    0 10 0 1 0 0 1 1
vendor=opencores.org
T 400 5200    0 10 0 1 0 0 1 1
library=cde
T 400 5200    0 10 0 1 0 0 1 1
component=jtag
T 400 5200    0 10 0 1 0 0 1 1
version=tap_logic
P 300 200 0 200 10 1 1 
{
T 400 200 5 10 1 1 0 1 1 1
pinnumber=instruction[3:0]
T 400 200 5 10 0 1 0 1 1 1
pinseq=1
}
P 300 400 0 400 4 0 1  
{
T 400 400 5 10 1 1 0 1 1 1 
pinnumber=update_dr_o
T 400 400 5 10 0 1 0 1 1 1 
pinseq=2
}
P 300 600 0 600 4 0 1  
{
T 400 600 5 10 1 1 0 1 1 1 
pinnumber=update_dr_clk_o
T 400 600 5 10 0 1 0 1 1 1 
pinseq=3
}
P 300 800 0 800 4 0 1  
{
T 400 800 5 10 1 1 0 1 1 1 
pinnumber=test_logic_reset_o
T 400 800 5 10 0 1 0 1 1 1 
pinseq=4
}
P 300 1000 0 1000 4 0 1  
{
T 400 1000 5 10 1 1 0 1 1 1 
pinnumber=tdo_i
T 400 1000 5 10 0 1 0 1 1 1 
pinseq=5
}
P 300 1200 0 1200 4 0 1  
{
T 400 1200 5 10 1 1 0 1 1 1 
pinnumber=tdi_pad_in
T 400 1200 5 10 0 1 0 1 1 1 
pinseq=6
}
P 300 1400 0 1400 4 0 1  
{
T 400 1400 5 10 1 1 0 1 1 1 
pinnumber=shift_dr_o
T 400 1400 5 10 0 1 0 1 1 1 
pinseq=7
}
P 300 1600 0 1600 4 0 1  
{
T 400 1600 5 10 1 1 0 1 1 1 
pinnumber=jtag_shift_clk
T 400 1600 5 10 0 1 0 1 1 1 
pinseq=8
}
P 300 1800 0 1800 4 0 1  
{
T 400 1800 5 10 1 1 0 1 1 1 
pinnumber=chip_id_tdo
T 400 1800 5 10 0 1 0 1 1 1 
pinseq=9
}
P 300 2000 0 2000 4 0 1  
{
T 400 2000 5 10 1 1 0 1 1 1 
pinnumber=capture_dr_o
T 400 2000 5 10 0 1 0 1 1 1 
pinseq=10
}
P 300 2200 0 2200 4 0 1  
{
T 400 2200 5 10 1 1 0 1 1 1 
pinnumber=aux_tdo_i
T 400 2200 5 10 0 1 0 1 1 1 
pinseq=11
}
P 5000 200 5300 200 10 1 1
{
T 4900 200 5  10 1 1 0 7 1 1 
pinnumber=chip_id_value[31:0]
T 4900 200 5  10 0 1 0 7 1 1 
pinseq=12
}
P 5000 400 5300 400 4 0 1
{
T 4900 400 5  10 1 1 0 7 1 1
pinnumber=tdi_o
T 5000 400 5  10 0 1 0 7 1 1
pinseq=13
}
P 5000 600 5300 600 4 0 1
{
T 4900 600 5  10 1 1 0 7 1 1
pinnumber=shiftcapture_dr_o
T 5000 600 5  10 0 1 0 7 1 1
pinseq=14
}
P 5000 800 5300 800 4 0 1
{
T 4900 800 5  10 1 1 0 7 1 1
pinnumber=shiftcapture_dr_clk_o
T 5000 800 5  10 0 1 0 7 1 1
pinseq=15
}
P 5000 1000 5300 1000 4 0 1
{
T 4900 1000 5  10 1 1 0 7 1 1
pinnumber=select_o
T 5000 1000 5  10 0 1 0 7 1 1
pinseq=16
}
P 5000 1200 5300 1200 4 0 1
{
T 4900 1200 5  10 1 1 0 7 1 1
pinnumber=sample
T 5000 1200 5  10 0 1 0 7 1 1
pinseq=17
}
P 5000 1400 5300 1400 4 0 1
{
T 4900 1400 5  10 1 1 0 7 1 1
pinnumber=next_tdo
T 5000 1400 5  10 0 1 0 7 1 1
pinseq=18
}
P 5000 1600 5300 1600 4 0 1
{
T 4900 1600 5  10 1 1 0 7 1 1
pinnumber=jtag_reset
T 5000 1600 5  10 0 1 0 7 1 1
pinseq=19
}
P 5000 1800 5300 1800 4 0 1
{
T 4900 1800 5  10 1 1 0 7 1 1
pinnumber=jtag_clk
T 5000 1800 5  10 0 1 0 7 1 1
pinseq=20
}
P 5000 2000 5300 2000 4 0 1
{
T 4900 2000 5  10 1 1 0 7 1 1
pinnumber=extest
T 5000 2000 5  10 0 1 0 7 1 1
pinseq=21
}
P 5000 2200 5300 2200 4 0 1
{
T 4900 2200 5  10 1 1 0 7 1 1
pinnumber=clamp
T 5000 2200 5  10 0 1 0 7 1 1
pinseq=22
}
P 5000 2400 5300 2400 4 0 1
{
T 4900 2400 5  10 1 1 0 7 1 1
pinnumber=chip_id_select
T 5000 2400 5  10 0 1 0 7 1 1
pinseq=23
}
P 5000 2600 5300 2600 4 0 1
{
T 4900 2600 5  10 1 1 0 7 1 1
pinnumber=bsr_select_o
T 5000 2600 5  10 0 1 0 7 1 1
pinseq=24
}
P 5000 2800 5300 2800 4 0 1
{
T 4900 2800 5  10 1 1 0 7 1 1
pinnumber=aux_update_dr_o
T 5000 2800 5  10 0 1 0 7 1 1
pinseq=25
}
P 5000 3000 5300 3000 4 0 1
{
T 4900 3000 5  10 1 1 0 7 1 1
pinnumber=aux_update_dr_clk_o
T 5000 3000 5  10 0 1 0 7 1 1
pinseq=26
}
P 5000 3200 5300 3200 4 0 1
{
T 4900 3200 5  10 1 1 0 7 1 1
pinnumber=aux_test_logic_reset_o
T 5000 3200 5  10 0 1 0 7 1 1
pinseq=27
}
P 5000 3400 5300 3400 4 0 1
{
T 4900 3400 5  10 1 1 0 7 1 1
pinnumber=aux_tdi_o
T 5000 3400 5  10 0 1 0 7 1 1
pinseq=28
}
P 5000 3600 5300 3600 4 0 1
{
T 4900 3600 5  10 1 1 0 7 1 1
pinnumber=aux_shiftcapture_dr_clk_o
T 5000 3600 5  10 0 1 0 7 1 1
pinseq=29
}
P 5000 3800 5300 3800 4 0 1
{
T 4900 3800 5  10 1 1 0 7 1 1
pinnumber=aux_shift_dr_o
T 5000 3800 5  10 0 1 0 7 1 1
pinseq=30
}
P 5000 4000 5300 4000 4 0 1
{
T 4900 4000 5  10 1 1 0 7 1 1
pinnumber=aux_select_o
T 5000 4000 5  10 0 1 0 7 1 1
pinseq=31
}
P 5000 4200 5300 4200 4 0 1
{
T 4900 4200 5  10 1 1 0 7 1 1
pinnumber=aux_jtag_clk
T 5000 4200 5  10 0 1 0 7 1 1
pinseq=32
}
P 5000 4400 5300 4400 4 0 1
{
T 4900 4400 5  10 1 1 0 7 1 1
pinnumber=aux_capture_dr_o
T 5000 4400 5  10 0 1 0 7 1 1
pinseq=33
}