OpenCores
URL https://opencores.org/ocsvn/steelcore/steelcore/trunk

Subversion Repositories steelcore

[/] [vivado/] [steel-core.sim/] [sim_1/] [behav/] [xsim/] [xsim.dir/] [tb_compliance_behav/] [xsim.rlx] - Rev 11

Compare with Previous | Blame | View Log


{ 
    crc :  4220960422655419766  , 
    ccp_crc :  0  , 
    cmdline : " -wto b8561a63f69e41d98a2e12d383a11daf --incr --debug typical --relax --mt 8 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip --snapshot tb_compliance_behav xil_defaultlib.tb_compliance xil_defaultlib.glbl" , 
    buildDate : "Nov  6 2019" , 
    buildTime : "21:42:20" , 
    linkCmd : "/usr/bin/gcc -Wa,-W  -O -fPIC  -m64  -Wl,--no-as-needed  -Wl,--unresolved-symbols=ignore-all  -o \"xsim.dir/tb_compliance_behav/xsimk\"   \"xsim.dir/tb_compliance_behav/obj/xsim_0.lnx64.o\" \"xsim.dir/tb_compliance_behav/obj/xsim_1.lnx64.o\" -L\"/home/rafa/Xilinx/Vivado/2019.2/lib/lnx64.o\" -lrdi_simulator_kernel   -lrdi_simbridge_kernel" , 
    aggregate_nets : 
    [ 
    ] 
} 

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2021 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.