OpenCores
URL https://opencores.org/ocsvn/t400/t400/trunk

Subversion Repositories t400

[/] [t400/] [trunk/] [sw/] [verif/] [black_box/] [stii/] [test.asm] - Rev 2

Go to most recent revision | Compare with Previous | Blame | View Log

        ;; *******************************************************************
        ;; $Id: test.asm,v 1.1.1.1 2006-05-06 01:56:45 arniml Exp $
        ;;
        ;; Checks the STII instruction.
        ;;

        ;; the cpu type is defined on asl's command line

        org     0x00
        clra

        ;; preload data memory with jsrp target values
        stii    0x0
        stii    0x1
        stii    0x2
        stii    0x3
        stii    0x4
        stii    0x5
        stii    0x6
        stii    0x7

        ;; now scan through all 8 locations and check the contents
        ;; check location 0, data 0
        clra
        cab
        ske
        jmp     fail

        ;; check location 1, data 1
        aisc    0x1
        cab
        ske
        jmp     fail

        ;; check location 2, data 2
        aisc    0x1
        cab
        ske
        jmp     fail

        ;; check location 3, data 3
        aisc    0x1
        cab
        ske
        jmp     fail

        ;; check location 4, data 4
        aisc    0x1
        cab
        ske
        jmp     fail

        ;; check location 5, data 5
        aisc    0x1
        cab
        ske
        jmp     fail

        ;; check location 6, data 6
        aisc    0x1
        cab
        ske
        jmp     fail

        ;; check location 7, data 7
        aisc    0x1
        cab
        ske
        jmp     fail


        jmp     pass

        org     0x100
        include "pass_fail.asm"

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.