Subversion Repositories usb_fpga_2_14

<?xml version="1.0" encoding="UTF-8"?>
<Project NoOfControllers="1" >
    <ModuleName>mem0</ModuleName>
    <TargetFPGA>xc6slx16-ftg256/-2</TargetFPGA>
    <Version>3.92</Version>
    <Controller number="3" >
        <MemoryDevice>DDR_SDRAM/Components/MT46V32M16XX-5B-IT</MemoryDevice>
        <TimePeriod>5000</TimePeriod>
        <EnableVoltageRange>0</EnableVoltageRange>
        <DataMask>1</DataMask>
        <CustomPart>FALSE</CustomPart>
        <NewPartName></NewPartName>
        <RowAddress>13</RowAddress>
        <ColAddress>10</ColAddress>
        <BankAddress>2</BankAddress>
        <TimingParameters>
            <Parameters twtr="2" trefi="7.8" twr="15" trfc="70" trp="15" tras="40" trcd="15" />
        </TimingParameters>
        <mrBurstLength name="Burst Length" >4(010)</mrBurstLength>
        <mrCasLatency name="CAS Latency" >3</mrCasLatency>
        <emrDllEnable name="DLL Enable" >Enable-Normal</emrDllEnable>
        <emrOutputDriveStrength name="Output Drive Strength" >Normal</emrOutputDriveStrength>
        <PortInterface>NATIVE,NATIVE,NATIVE,NATIVE,NATIVE,NATIVE</PortInterface>
        <Class>Class II</Class>
        <DataClass>Class II</DataClass>
        <InputPinTermination>EXTERN_TERM</InputPinTermination>
        <DataTermination>25 Ohms</DataTermination>
        <CalibrationRowAddress></CalibrationRowAddress>
        <CalibrationColumnAddress></CalibrationColumnAddress>
        <CalibrationBankAddress></CalibrationBankAddress>
        <SystemClock>Single-Ended</SystemClock>
        <BypassCalibration>1</BypassCalibration>
        <DebugSignals>Disable</DebugSignals>
        <SystemClock>Single-Ended</SystemClock>
        <Configuration>Two 32-bit bi-directional and four 32-bit unidirectional ports</Configuration>
        <RzqPin>M4</RzqPin>
        <ZioPin>M5</ZioPin>
        <PortsSelected>Port0,Port1,Port2,Port3,Port4,Port5</PortsSelected>
        <PortDirections>Bi-directional,Bi-directional,Write,Read,Write,Read</PortDirections>
        <UserMemoryAddressMap>ROW_BANK_COLUMN</UserMemoryAddressMap>
        <ArbitrationAlgorithm>Round Robin</ArbitrationAlgorithm>
        <TimeSlot0>012345</TimeSlot0>
        <TimeSlot1>123450</TimeSlot1>
        <TimeSlot2>234501</TimeSlot2>
        <TimeSlot3>345012</TimeSlot3>
        <TimeSlot4>450123</TimeSlot4>
        <TimeSlot5>501234</TimeSlot5>
        <TimeSlot6>012345</TimeSlot6>
        <TimeSlot7>123450</TimeSlot7>
        <TimeSlot8>234501</TimeSlot8>
        <TimeSlot9>345012</TimeSlot9>
        <TimeSlot10>450123</TimeSlot10>
        <TimeSlot11>501234</TimeSlot11>
    </Controller>
</Project>