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https://opencores.org/ocsvn/usb_fpga_2_14/usb_fpga_2_14/trunk
Subversion Repositories usb_fpga_2_14
[/] [usb_fpga_2_14/] [trunk/] [examples/] [memfifo/] [fpga-2.18/] [usb_fpga-2.18-mem.ucf] - Rev 2
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#################################################################################################### Controller 0## Memory Device: DDR3_SDRAM->Components->MT41J128M16XX-125## Data Width: 16## Time Period: 2500## Data Mask: 1################################################################################################################ NET - IOSTANDARD ##################NET "ddr3_dq[0]" LOC = "B20" | IOSTANDARD = SSTL15 | SLEW = FAST | IN_TERM = UNTUNED_SPLIT_40 ; # Pad function: B20~IO_L16P_T2_16NET "ddr3_dq[1]" LOC = "C19" | IOSTANDARD = SSTL15 | SLEW = FAST | IN_TERM = UNTUNED_SPLIT_40 ; # Pad function: C19~IO_L13N_T2_MRCC_16NET "ddr3_dq[2]" LOC = "A20" | IOSTANDARD = SSTL15 | SLEW = FAST | IN_TERM = UNTUNED_SPLIT_40 ; # Pad function: A20~IO_L16N_T2_16NET "ddr3_dq[3]" LOC = "F19" | IOSTANDARD = SSTL15 | SLEW = FAST | IN_TERM = UNTUNED_SPLIT_40 ; # Pad function: F19~IO_L18P_T2_16NET "ddr3_dq[4]" LOC = "A18" | IOSTANDARD = SSTL15 | SLEW = FAST | IN_TERM = UNTUNED_SPLIT_40 ; # Pad function: A18~IO_L17P_T2_16NET "ddr3_dq[5]" LOC = "E19" | IOSTANDARD = SSTL15 | SLEW = FAST | IN_TERM = UNTUNED_SPLIT_40 ; # Pad function: E19~IO_L14P_T2_SRCC_16NET "ddr3_dq[6]" LOC = "A19" | IOSTANDARD = SSTL15 | SLEW = FAST | IN_TERM = UNTUNED_SPLIT_40 ; # Pad function: A19~IO_L17N_T2_16NET "ddr3_dq[7]" LOC = "C18" | IOSTANDARD = SSTL15 | SLEW = FAST | IN_TERM = UNTUNED_SPLIT_40 ; # Pad function: C18~IO_L13P_T2_MRCC_16NET "ddr3_dq[8]" LOC = "E21" | IOSTANDARD = SSTL15 | SLEW = FAST | IN_TERM = UNTUNED_SPLIT_40 ; # Pad function: E21~IO_L23P_T3_16NET "ddr3_dq[9]" LOC = "D21" | IOSTANDARD = SSTL15 | SLEW = FAST | IN_TERM = UNTUNED_SPLIT_40 ; # Pad function: D21~IO_L23N_T3_16NET "ddr3_dq[10]" LOC = "G21" | IOSTANDARD = SSTL15 | SLEW = FAST | IN_TERM = UNTUNED_SPLIT_40 ; # Pad function: G21~IO_L24P_T3_16NET "ddr3_dq[11]" LOC = "B22" | IOSTANDARD = SSTL15 | SLEW = FAST | IN_TERM = UNTUNED_SPLIT_40 ; # Pad function: B22~IO_L20N_T3_16NET "ddr3_dq[12]" LOC = "E22" | IOSTANDARD = SSTL15 | SLEW = FAST | IN_TERM = UNTUNED_SPLIT_40 ; # Pad function: E22~IO_L22P_T3_16NET "ddr3_dq[13]" LOC = "C22" | IOSTANDARD = SSTL15 | SLEW = FAST | IN_TERM = UNTUNED_SPLIT_40 ; # Pad function: C22~IO_L20P_T3_16NET "ddr3_dq[14]" LOC = "G22" | IOSTANDARD = SSTL15 | SLEW = FAST | IN_TERM = UNTUNED_SPLIT_40 ; # Pad function: G22~IO_L24N_T3_16NET "ddr3_dq[15]" LOC = "D22" | IOSTANDARD = SSTL15 | SLEW = FAST | IN_TERM = UNTUNED_SPLIT_40 ; # Pad function: D22~IO_L22N_T3_16NET "ddr3_dqs_p[0]" LOC = "F18" | IOSTANDARD = DIFF_SSTL15 | SLEW = FAST | IN_TERM = UNTUNED_SPLIT_40 ; # Pad function: F18~IO_L15P_T2_DQS_16NET "ddr3_dqs_n[0]" LOC = "E18" | IOSTANDARD = DIFF_SSTL15 | SLEW = FAST | IN_TERM = UNTUNED_SPLIT_40 ; # Pad function: E18~IO_L15N_T2_DQS_16NET "ddr3_dqs_p[1]" LOC = "B21" | IOSTANDARD = DIFF_SSTL15 | SLEW = FAST | IN_TERM = UNTUNED_SPLIT_40 ; # Pad function: B21~IO_L21P_T3_DQS_16NET "ddr3_dqs_n[1]" LOC = "A21" | IOSTANDARD = DIFF_SSTL15 | SLEW = FAST | IN_TERM = UNTUNED_SPLIT_40 ; # Pad function: A21~IO_L21N_T3_DQS_16NET "ddr3_addr[0]" LOC = "C15" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: C15~IO_L3N_T0_DQS_16NET "ddr3_addr[1]" LOC = "E14" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: E14~IO_L4N_T0_16NET "ddr3_addr[2]" LOC = "C14" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: C14~IO_L3P_T0_DQS_16NET "ddr3_addr[3]" LOC = "A15" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: A15~IO_L9P_T1_DQS_16NET "ddr3_addr[4]" LOC = "F16" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: F16~IO_L2P_T0_16NET "ddr3_addr[5]" LOC = "A14" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: A14~IO_L10N_T1_16NET "ddr3_addr[6]" LOC = "F14" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: F14~IO_L1N_T0_16NET "ddr3_addr[7]" LOC = "A13" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: A13~IO_L10P_T1_16NET "ddr3_addr[8]" LOC = "F13" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: F13~IO_L1P_T0_16NET "ddr3_addr[9]" LOC = "B13" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: B13~IO_L8N_T1_16NET "ddr3_addr[10]" LOC = "D16" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: D16~IO_L5N_T0_16NET "ddr3_addr[11]" LOC = "E13" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: E13~IO_L4P_T0_16NET "ddr3_addr[12]" LOC = "D14" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: D14~IO_L6P_T0_16NET "ddr3_addr[13]" LOC = "C13" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: C13~IO_L8P_T1_16NET "ddr3_ba[0]" LOC = "A16" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: A16~IO_L9N_T1_DQS_16NET "ddr3_ba[1]" LOC = "E16" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: E16~IO_L5P_T0_16NET "ddr3_ba[2]" LOC = "B15" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: B15~IO_L7P_T1_16NET "ddr3_cas_n" LOC = "B17" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: B17~IO_L11P_T1_SRCC_16NET "ddr3_cke[0]" LOC = "E17" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: E17~IO_L2N_T0_16NET "ddr3_ras_n" LOC = "B18" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: B18~IO_L11N_T1_SRCC_16NET "ddr3_we_n" LOC = "B16" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: B16~IO_L7N_T1_16NET "ddr3_reset_n" LOC = "F21" | IOSTANDARD = LVCMOS15 | SLEW = FAST ; # Pad function: F15~IO_0_16 6NET "ddr3_odt[0]" LOC = "F15" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: F21~IO_25_16 6NET "ddr3_dm[0]" LOC = "D19" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: D19~IO_L14N_T2_SRCC_16NET "ddr3_dm[1]" LOC = "D20" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: D20~IO_L19P_T3_16NET "ddr3_ck_p[0]" LOC = "D17" | IOSTANDARD = DIFF_SSTL15 | SLEW = FAST ; # Pad function: D17~IO_L12P_T1_MRCC_16NET "ddr3_ck_n[0]" LOC = "C17" | IOSTANDARD = DIFF_SSTL15 | SLEW = FAST ; # Pad function: C17~IO_L12N_T1_MRCC_16