Subversion Repositories usb_fpga_2_14

# fxclk_in
NET "fxclk_in" TNM_NET = "fxclk_in";
TIMESPEC "ts_fxclk_in" = PERIOD "fxclk_in" 48 MHz HIGH 50 %;
NET "fxclk_in"  LOC = "T7" | IOSTANDARD = LVCMOS33 ;

# reset_in
NET "reset_in"  LOC = "R3" | IOSTANDARD = LVCMOS33 ;            # PA7/FLAGD/SLCS#

# GPIO signals
#NET "gpio_clk" LOC = "N12" | IOSTANDARD = LVCMOS33 ;           # PC1/GPIFADR1
#NET "gpio_dir" LOC = "P12" | IOSTANDARD = LVCMOS33 ;           # PC2/GPIFADR2
#NET "gpio_dat" LOC = "N5" | IOSTANDARD = LVCMOS33 | PULLUP;    # PC3/GPIFADR3

# LSI signals
NET "lsi_miso"  LOC = "P5" | IOSTANDARD = LVCMOS33 ;            # PC4/GPIFADR4
NET "lsi_mosi"  LOC = "L8" | IOSTANDARD = LVCMOS33 ;            # PC5/GPIFADR5
NET "lsi_clk"   LOC = "L7" | IOSTANDARD = LVCMOS33 ;            # PC6/GPIFADR6
NET "lsi_stop"  LOC = "R5" | IOSTANDARD = LVCMOS33 ;            # PC7/GPIFADR7