OpenCores
URL https://opencores.org/ocsvn/usb_nand_reader/usb_nand_reader/trunk

Subversion Repositories usb_nand_reader

[/] [usb_nand_reader/] [trunk/] [mini32/] [NandDataLine.c] - Rev 7

Compare with Previous | Blame | View Log

 
#include "NandDataLine.h"
 
/* NAND data line */
sbit nand_b0 at LATE2_bit;
sbit nand_b1 at LATE3_bit;
sbit nand_b2 at LATG7_bit;
sbit nand_b3 at LATG8_bit;
sbit nand_b4 at LATF5_bit;
sbit nand_b5 at LATF4_bit;
sbit nand_b6 at LATE4_bit;
sbit nand_b7 at LATE5_bit;
 
 
void init_nand_data_line()
{
     TRISE = 0;
     TRISF = 0;
     TRISG = 0;
 
     LATE = 0;
     LATF = 0;
     LATG = 0;
 
     nand_b0 = 0;
     nand_b1 = 0;
     nand_b2 = 0;
     nand_b3 = 0;
     nand_b4 = 0;
     nand_b5 = 0;
     nand_b6 = 0;
     nand_b7 = 0;
}
 
 
int data_line_last_op = NAND_LAST_OP_NONE;
 
void data_line_write_byte(unsigned char b)
{
     if(data_line_last_op != NAND_LAST_OP_WRITE)
     {
       TRISE2_bit = 0; TRISE3_bit = 0; TRISE4_bit = 0; TRISE5_bit = 0;
       TRISF4_bit = 0; TRISF5_bit = 0;
       TRISG7_bit = 0; TRISG8_bit = 0;
       data_line_last_op = NAND_LAST_OP_WRITE;
     }
     nand_b0 = (b) & 1;
     nand_b1 = (b >> 1) & 1;
     nand_b2 = (b >> 2) & 1;
     nand_b3 = (b >> 3) & 1;
     nand_b4 = (b >> 4) & 1;
     nand_b5 = (b >> 5) & 1;
     nand_b6 = (b >> 6) & 1;
     nand_b7 = (b >> 7) & 1;
     asm NOP;
     asm NOP;
     asm NOP;
}
 
 
unsigned char data_line_read_byte()
{
     unsigned char d = 0;
     if(data_line_last_op != NAND_LAST_OP_READ)
     {
       TRISE2_bit = 1; TRISE3_bit = 1; TRISE4_bit = 1; TRISE5_bit = 1;
       TRISF4_bit = 1; TRISF5_bit = 1;
       TRISG7_bit = 1; TRISG8_bit = 1;
       data_line_last_op = NAND_LAST_OP_READ;
     }
     d |= (unsigned char)PORTE.B2;//nand_b0;
     d |= ((unsigned char)PORTE.B3 << 1);//nand_b1 << 1);
     d |= ((unsigned char)PORTG.B7 << 2);//nand_b2 << 2);
     d |= ((unsigned char)PORTG.B8 << 3);//nand_b3 << 3);
     d |= ((unsigned char)PORTF.B5 << 4);//nand_b4 << 4);
     d |= ((unsigned char)PORTF.B4 << 5);//nand_b5 << 5);
     d |= ((unsigned char)PORTE.B4 << 6);//nand_b6 << 6);
     d |= ((unsigned char)PORTE.B5 << 7);//nand_b7 << 7);
     return d;
}

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.