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[/] [vspi/] [trunk/] [projnav/] [xps/] [pcores/] [spiifc_v1_00_a/] [devl/] [projnav/] [spiifc_writereg_tb_isim_beh2.wdb] - Rev 14

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_DS/ISE/verilog/src/glbl.v_top_topspiifc_writereg_tbspiifc_writereg_tbSPI_MISOtxMemAddrrcMemAddrrcMemDatarcMemWEdebug_outResetSysClkSPI_CLKSPI_MOSISPI_SStxMemDataSPI_CLK_enfdRcBytesfdTxBytesdummycurrRcBytercBytesNotEmptyrcBytesStrglblglblGSRGTSGWEPRLDp_up_tmpPLL_LOCKGPROGB_GLBLJTAG_TDO_GLBLJTAG_TCK_GLBLJTAG_TDI_GLBLJTAG_TMS_GLBLJTAG_TRST_GLBLGSR_intGTS_intPRLD_intJTAG_CAPTURE_GLBLJTAG_RESET_GLBLJTAG_SHIFT_GLBLJTAG_UPDATE_GLBLJTAG_RUNTEST_GLBLJTAG_SEL1_GLBLJTAG_SEL2_GLBLJTAG_SEL3_GLBLJTAG_SEL4_GLBLJTAG_USER_TDO1_GLBLJTAG_USER_TDO2_GLBLJTAG_USER_TDO3_GLBLJTAG_USER_TDO4_GLBLROC_WIDTHTOC_WIDTHrecvByterecvBytercBytercBitIndexuutspiifcResetSysClkSPI_CLKSPI_MISOSPI_MOSISPI_SStxMemAddrtxMemDatarcMemAddrrcMemDatarcMemWEregAddrregReadDataregWriteEnregWriteDatadebug_outrisingSpiClkvalidSpiBitrcByteValidrcBytercBitIndexpacketStartSPI_CLK_regSPI_SS_regSPI_MOSI_regprev_spiClkprev_spiSSstate_regrcByte_regrcBitIndex_regrcMemAddr_regdebug_regtxBitIndex_regtxMemAddr_regcommandrcWordrcWordByteIdregAddr_regstatetxBitIndextxMemAddr_oregregReadByte_oregAddrBitsRegAddrBitsAlways_72_0spiifc_writereg_tbInitial_77_1spiifc_writereg_tbAlways_81_2spiifc_writereg_tbInitial_95_3spiifc_writereg_tbAlways_128_0spiifcAlways_135_1spiifcCont_138_2spiifcCont_139_3spiifcAlways_142_4spiifcCont_145_5spiifcAlways_148_6spiifcCont_156_7spiifcCont_157_8spiifcCont_158_9spiifcCont_161_10spiifcCont_162_11spiifcCont_163_12spiifcAlways_164_13spiifcAlways_175_14spiifcAlways_194_15spiifcCont_208_16spiifcCont_209_17spiifcAlways_212_18spiifcAlways_222_19spiifcCont_264_20spiifcCont_265_21spiifcCont_266_22spiifcAlways_267_23spiifcAlways_270_24spiifcAlways_280_25spiifcCont_285_26spiifcNetDecl_16_0glblCont_47_1glblCont_48_2glblCont_49_3glblInitial_51_4glblInitial_59_5glbl

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