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[/] [vtach/] [trunk/] [_xmsgs/] [map.xmsgs] - Rev 2
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<?xml version="1.0" encoding="UTF-8"?>
<!-- IMPORTANT: This is an internal file that has been generated
by the Xilinx ISE software. Any direct editing or
changes made to this file may result in unpredictable
behavior or data corruption. It is strongly advised that
users do not edit the contents of this file. -->
<messages>
<msg type="info" file="MapLib" num="562" delta="old" >No environment variables are currently set.
</msg>
<msg type="info" file="Pack" num="1716" delta="old" >Initializing temperature to <arg fmt="%0.3f" index="1">85.000</arg> Celsius. (default - Range: <arg fmt="%0.3f" index="2">0.000</arg> to <arg fmt="%0.3f" index="3">85.000</arg> Celsius)
</msg>
<msg type="info" file="Pack" num="1720" delta="old" >Initializing voltage to <arg fmt="%0.3f" index="1">1.140</arg> Volts. (default - Range: <arg fmt="%0.3f" index="2">1.140</arg> to <arg fmt="%0.3f" index="3">1.260</arg> Volts)
</msg>
<msg type="info" file="Pack" num="1650" delta="old" >Map created a placed design.
</msg>
<msg type="info" file="PhysDesignRules" num="772" delta="old" >To achieve optimal frequency synthesis performance with the CLKFX and CLKFX180 outputs of the DCM comp <arg fmt="%s" index="1">clockdll/DCM_INST</arg>, consult the device Interactive Data Sheet.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOA2</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.A</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16A</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOA3</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.A</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16A</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOA4</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.A</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16A</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOA5</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.A</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16A</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOA6</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.A</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16A</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOA7</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.A</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16A</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOA10</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.A</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16A</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOA11</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.A</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16A</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOA12</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.A</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16A</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOA13</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.A</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16A</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOA14</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.A</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16A</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOA15</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.A</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16A</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOA18</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.A</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16A</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOA19</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.A</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16A</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOA20</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.A</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16A</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOA21</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.A</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16A</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOA22</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.A</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16A</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOA23</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.A</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16A</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOA25</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.A</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16A</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOA26</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.A</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16A</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOA27</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.A</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16A</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOA28</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.A</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16A</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOA29</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.A</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16A</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOA30</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.A</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16A</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOA31</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.A</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16A</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOB2</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.B</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16B</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOB3</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.B</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16B</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOB4</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.B</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16B</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOB5</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.B</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16B</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOB6</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.B</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16B</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOB7</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.B</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16B</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOB9</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.B</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16B</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOB10</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.B</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16B</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOB11</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.B</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16B</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOB12</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.B</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16B</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOB13</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.B</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16B</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOB14</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.B</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16B</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOB15</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.B</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16B</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOB18</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.B</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16B</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOB19</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.B</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16B</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOB20</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.B</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16B</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOB21</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.B</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16B</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOB22</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.B</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16B</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOB23</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.B</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16B</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOB25</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.B</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16B</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOB26</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.B</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16B</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOB27</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.B</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16B</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOB28</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.B</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16B</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOB29</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.B</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16B</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOB30</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.B</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16B</arg>>.
</msg>
<msg type="warning" file="PhysDesignRules" num="812" delta="old" >Dangling pin <<arg fmt="%s" index="1">DOB31</arg>> on block:<<arg fmt="%s" index="2">mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s3_init.ram/spram.ram.B</arg>>:<<arg fmt="%s" index="3">RAMB16_RAMB16B</arg>>.
</msg>
</messages>