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https://opencores.org/ocsvn/vtach/vtach/trunk
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[/] [vtach/] [trunk/] [ipcore_dir/] [coregen.log] - Rev 2
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CoreGen has not been configured with any user repositories.
CoreGen has been configured with the following Xilinx repositories:
- '/opt/Xilinx/13.2/ISE_DS/ISE/coregen/' [reloaded]
INFO:sim - Generating component instance 'mainmem' of
'xilinx.com:ip:blk_mem_gen:6.2' from
'/opt/Xilinx/13.2/ISE_DS/ISE/coregen/ip/xilinx/primary/com/xilinx/ip/blk_mem_
gen_v6_2/component.xml'.
Applying current project options...
Finished applying current project options.
Cancelled executing Tcl generator.
Wrote CGP file for project 'mainmem'.