OpenCores
URL https://opencores.org/ocsvn/vtach/vtach/trunk

Subversion Repositories vtach

[/] [vtach/] [trunk/] [ipcore_dir/] [coregen.log] - Rev 2

Compare with Previous | Blame | View Log

CoreGen has not been configured with any user repositories.
CoreGen has been configured with the following Xilinx repositories:
 - '/opt/Xilinx/13.2/ISE_DS/ISE/coregen/' [reloaded]
INFO:sim - Generating component instance 'mainmem' of
   'xilinx.com:ip:blk_mem_gen:6.2' from
   '/opt/Xilinx/13.2/ISE_DS/ISE/coregen/ip/xilinx/primary/com/xilinx/ip/blk_mem_
   gen_v6_2/component.xml'.
Applying current project options...
Finished applying current project options.
Cancelled executing Tcl generator.
Wrote CGP file for project 'mainmem'.

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.