OpenCores
URL https://opencores.org/ocsvn/vtach/vtach/trunk

Subversion Repositories vtach

[/] [vtach/] [trunk/] [top_map.map] - Rev 2

Compare with Previous | Blame | View Log 

Release 13.2 Map O.61xd (lin64)
Xilinx Map Application Log File for Design 'top'

Design Information
------------------
Command Line   : map -filter iseconfig/filter.filter -intstyle ise -p
xc3s1000-ft256-4 -timing -logic_opt on -ol high -xe n -t 1 -register_duplication
on -cm speed -ir off -ignore_keep_hierarchy -pr off -power off -o top_map.ncd
top.ngd top.pcf 
Target Device  : xc3s1000
Target Package : ft256
Target Speed   : -4
Mapper Version : spartan3 -- $Revision: 1.55 $
Mapped Date    : Sat May 25 07:43:29 2013

vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv
INFO:Security:54 - 'xc3s1000' is a WebPack part.
WARNING:Security:42 - Your software subscription period has lapsed. Your current
version of Xilinx tools will continue to function, but you no longer qualify for
Xilinx software updates or new releases.
----------------------------------------------------------------------
Mapping design into LUTs...
Running directed packing...
Running delay-based LUT packing...
Updating timing models...
Running timing-driven placement...
Total REAL time at the beginning of Placer: 1 secs 
Total CPU  time at the beginning of Placer: 1 secs 

Phase 1.1  Initial Placement Analysis
Phase 1.1  Initial Placement Analysis (Checksum:c52ab1c9) REAL time: 2 secs 

Phase 2.7  Design Feasibility Check
Phase 2.7  Design Feasibility Check (Checksum:c52ab1c9) REAL time: 2 secs 

Phase 3.31  Local Placement Optimization
Phase 3.31  Local Placement Optimization (Checksum:c52ab1c9) REAL time: 2 secs 

Phase 4.2  Initial Clock and IO Placement

Phase 4.2  Initial Clock and IO Placement (Checksum:f596ddcc) REAL time: 2 secs 

Phase 5.36  Local Placement Optimization
Phase 5.36  Local Placement Optimization (Checksum:f596ddcc) REAL time: 2 secs 

Phase 6.4  Local Placement Optimization
.................
Phase 6.4  Local Placement Optimization (Checksum:f596ddcc) REAL time: 3 secs 

Phase 7.28  Local Placement Optimization
Phase 7.28  Local Placement Optimization (Checksum:f596ddcc) REAL time: 3 secs 

Phase 8.8  Global Placement
...................
....
Phase 8.8  Global Placement (Checksum:ba84736) REAL time: 4 secs 

Phase 9.29  Local Placement Optimization
Phase 9.29  Local Placement Optimization (Checksum:ba84736) REAL time: 4 secs 

Phase 10.5  Local Placement Optimization
Phase 10.5  Local Placement Optimization (Checksum:ba84736) REAL time: 4 secs 

Phase 11.18  Placement Optimization
Phase 11.18  Placement Optimization (Checksum:645c87d2) REAL time: 4 secs 

Phase 12.5  Local Placement Optimization
Phase 12.5  Local Placement Optimization (Checksum:645c87d2) REAL time: 4 secs 

Total REAL time to Placer completion: 4 secs 
Total CPU  time to Placer completion: 4 secs 
Running physical synthesis...

Physical synthesis completed.
Running post-placement packing...
WARNING:PhysDesignRules:812 - Dangling pin <DOA2> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.A>:<RAMB16_RAMB16A>.
WARNING:PhysDesignRules:812 - Dangling pin <DOA3> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.A>:<RAMB16_RAMB16A>.
WARNING:PhysDesignRules:812 - Dangling pin <DOA4> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.A>:<RAMB16_RAMB16A>.
WARNING:PhysDesignRules:812 - Dangling pin <DOA5> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.A>:<RAMB16_RAMB16A>.
WARNING:PhysDesignRules:812 - Dangling pin <DOA6> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.A>:<RAMB16_RAMB16A>.
WARNING:PhysDesignRules:812 - Dangling pin <DOA7> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.A>:<RAMB16_RAMB16A>.
WARNING:PhysDesignRules:812 - Dangling pin <DOA10> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.A>:<RAMB16_RAMB16A>.
WARNING:PhysDesignRules:812 - Dangling pin <DOA11> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.A>:<RAMB16_RAMB16A>.
WARNING:PhysDesignRules:812 - Dangling pin <DOA12> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.A>:<RAMB16_RAMB16A>.
WARNING:PhysDesignRules:812 - Dangling pin <DOA13> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.A>:<RAMB16_RAMB16A>.
WARNING:PhysDesignRules:812 - Dangling pin <DOA14> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.A>:<RAMB16_RAMB16A>.
WARNING:PhysDesignRules:812 - Dangling pin <DOA15> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.A>:<RAMB16_RAMB16A>.
WARNING:PhysDesignRules:812 - Dangling pin <DOA18> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.A>:<RAMB16_RAMB16A>.
WARNING:PhysDesignRules:812 - Dangling pin <DOA19> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.A>:<RAMB16_RAMB16A>.
WARNING:PhysDesignRules:812 - Dangling pin <DOA20> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.A>:<RAMB16_RAMB16A>.
WARNING:PhysDesignRules:812 - Dangling pin <DOA21> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.A>:<RAMB16_RAMB16A>.
WARNING:PhysDesignRules:812 - Dangling pin <DOA22> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.A>:<RAMB16_RAMB16A>.
WARNING:PhysDesignRules:812 - Dangling pin <DOA23> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.A>:<RAMB16_RAMB16A>.
WARNING:PhysDesignRules:812 - Dangling pin <DOA25> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.A>:<RAMB16_RAMB16A>.
WARNING:PhysDesignRules:812 - Dangling pin <DOA26> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.A>:<RAMB16_RAMB16A>.
WARNING:PhysDesignRules:812 - Dangling pin <DOA27> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.A>:<RAMB16_RAMB16A>.
WARNING:PhysDesignRules:812 - Dangling pin <DOA28> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.A>:<RAMB16_RAMB16A>.
WARNING:PhysDesignRules:812 - Dangling pin <DOA29> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.A>:<RAMB16_RAMB16A>.
WARNING:PhysDesignRules:812 - Dangling pin <DOA30> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.A>:<RAMB16_RAMB16A>.
WARNING:PhysDesignRules:812 - Dangling pin <DOA31> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.A>:<RAMB16_RAMB16A>.
WARNING:PhysDesignRules:812 - Dangling pin <DOB2> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.B>:<RAMB16_RAMB16B>.
WARNING:PhysDesignRules:812 - Dangling pin <DOB3> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.B>:<RAMB16_RAMB16B>.
WARNING:PhysDesignRules:812 - Dangling pin <DOB4> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.B>:<RAMB16_RAMB16B>.
WARNING:PhysDesignRules:812 - Dangling pin <DOB5> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.B>:<RAMB16_RAMB16B>.
WARNING:PhysDesignRules:812 - Dangling pin <DOB6> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.B>:<RAMB16_RAMB16B>.
WARNING:PhysDesignRules:812 - Dangling pin <DOB7> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.B>:<RAMB16_RAMB16B>.
WARNING:PhysDesignRules:812 - Dangling pin <DOB9> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.B>:<RAMB16_RAMB16B>.
WARNING:PhysDesignRules:812 - Dangling pin <DOB10> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.B>:<RAMB16_RAMB16B>.
WARNING:PhysDesignRules:812 - Dangling pin <DOB11> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.B>:<RAMB16_RAMB16B>.
WARNING:PhysDesignRules:812 - Dangling pin <DOB12> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.B>:<RAMB16_RAMB16B>.
WARNING:PhysDesignRules:812 - Dangling pin <DOB13> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.B>:<RAMB16_RAMB16B>.
WARNING:PhysDesignRules:812 - Dangling pin <DOB14> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.B>:<RAMB16_RAMB16B>.
WARNING:PhysDesignRules:812 - Dangling pin <DOB15> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.B>:<RAMB16_RAMB16B>.
WARNING:PhysDesignRules:812 - Dangling pin <DOB18> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.B>:<RAMB16_RAMB16B>.
WARNING:PhysDesignRules:812 - Dangling pin <DOB19> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.B>:<RAMB16_RAMB16B>.
WARNING:PhysDesignRules:812 - Dangling pin <DOB20> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.B>:<RAMB16_RAMB16B>.
WARNING:PhysDesignRules:812 - Dangling pin <DOB21> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.B>:<RAMB16_RAMB16B>.
WARNING:PhysDesignRules:812 - Dangling pin <DOB22> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.B>:<RAMB16_RAMB16B>.
WARNING:PhysDesignRules:812 - Dangling pin <DOB23> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.B>:<RAMB16_RAMB16B>.
WARNING:PhysDesignRules:812 - Dangling pin <DOB25> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.B>:<RAMB16_RAMB16B>.
WARNING:PhysDesignRules:812 - Dangling pin <DOB26> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.B>:<RAMB16_RAMB16B>.
WARNING:PhysDesignRules:812 - Dangling pin <DOB27> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.B>:<RAMB16_RAMB16B>.
WARNING:PhysDesignRules:812 - Dangling pin <DOB28> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.B>:<RAMB16_RAMB16B>.
WARNING:PhysDesignRules:812 - Dangling pin <DOB29> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.B>:<RAMB16_RAMB16B>.
WARNING:PhysDesignRules:812 - Dangling pin <DOB30> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.B>:<RAMB16_RAMB16B>.
WARNING:PhysDesignRules:812 - Dangling pin <DOB31> on
   block:<mem/ram/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.c
   str/ramloop[0].ram.r/s3_init.ram/spram.ram.B>:<RAMB16_RAMB16B>.

Design Summary
--------------

Design Summary:
Number of errors:      0
Number of warnings:   51
Logic Utilization:
  Number of Slice Flip Flops:           237 out of  15,360    1%
  Number of 4 input LUTs:               557 out of  15,360    3%
Logic Distribution:
  Number of occupied Slices:            347 out of   7,680    4%
    Number of Slices containing only related logic:     347 out of     347 100%
    Number of Slices containing unrelated logic:          0 out of     347   0%
      *See NOTES below for an explanation of the effects of unrelated logic.
  Total Number of 4 input LUTs:         597 out of  15,360    3%
    Number used as logic:               557
    Number used as a route-thru:         40

  The Slice Logic Distribution report is not meaningful if the design is
  over-mapped for a non-slice resource or if Placement fails.

  Number of bonded IOBs:                 32 out of     173   18%
  Number of RAMB16s:                      1 out of      24    4%
  Number of BUFGMUXs:                     3 out of       8   37%
  Number of DCMs:                         1 out of       4   25%

Average Fanout of Non-Clock Nets:                3.29

Peak Memory Usage:  429 MB
Total REAL time to MAP completion:  7 secs 
Total CPU time to MAP completion:   7 secs 

Mapping completed.
See MAP report file "top_map.mrp" for details.

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.