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https://opencores.org/ocsvn/wbddr3/wbddr3/trunk
Subversion Repositories wbddr3
[/] [wbddr3/] [trunk/] [bench/] [cpp/] [pddrsim.h] - Rev 16
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//////////////////////////////////////////////////////////////////////////////// // // Filename: pddrsim.h // // Project: A wishbone controlled DDR3 SDRAM memory controller. // // Purpose: To expand a DDR3 SDRAM controllers influence across multiple // clocks. Hence, if the DDR3 SDRAM controller runs at half // the clock rate of the DDR3-SDRAM, this will expand it to the full // clock rate. // // Creator: Dan Gisselquist, Ph.D. // Gisselquist Technology, LLC // //////////////////////////////////////////////////////////////////////////////// // // Copyright (C) 2016, Gisselquist Technology, LLC // // This program is free software (firmware): you can redistribute it and/or // modify it under the terms of the GNU General Public License as published // by the Free Software Foundation, either version 3 of the License, or (at // your option) any later version. // // This program is distributed in the hope that it will be useful, but WITHOUT // ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License // for more details. // // You should have received a copy of the GNU General Public License along // with this program. (It's in the $(ROOT)/doc directory, run make with no // target there if the PDF file isn't present.) If not, see // <http://www.gnu.org/licenses/> for a copy. // // License: GPL, v3, as defined and found on www.gnu.org, // http://www.gnu.org/licenses/gpl.html // // //////////////////////////////////////////////////////////////////////////////// // // #ifndef PDDRSIM_H #define PDDRSIM_H #include "ddrsdramsim.h" class PDDRSIM : protected DDRSDRAMSIM { public: PDDRSIM(int lglen) : DDRSDRAMSIM(lglen) {}; unsigned long operator()(int, int, int, unsigned, unsigned, unsigned long); unsigned long operator[](unsigned addr) { unsigned hdata, ldata; unsigned long odata; hdata = mem(addr<<1); ldata = mem((addr<<1)+1); odata = (((unsigned long)hdata)<<32)|((unsigned long)ldata); return odata; }; void set(unsigned addr, unsigned long data) { unsigned hdata, ldata; hdata = (unsigned long)(data>>32); ldata = (unsigned long)(data); mem((addr<<1) ) = hdata; mem((addr<<1)+1) = ldata; }; unsigned bank_state(int bankid) { return (m_bank[bankid].m_state & 0x0ffff); }; }; #endif
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