Subversion Repositories wiegand_ctl

// Copyright (C) 1991-2014 Altera Corporation. All rights reserved.
// Your use of Altera Corporation's design tools, logic functions 
// and other software and tools, and its AMPP partner logic 
// functions, and any output files from any of the foregoing 
// (including device programming or simulation files), and any 
// associated documentation or information are expressly subject 
// to the terms and conditions of the Altera Program License 
// Subscription Agreement, the Altera Quartus II License Agreement,
// the Altera MegaCore Function License Agreement, or other 
// applicable license agreement, including, without limitation, 
// that your use is for the sole purpose of programming logic 
// devices manufactured by Altera and sold by Altera or its 
// authorized distributors.  Please refer to the applicable 
// agreement for further details.

// VENDOR "Altera"
// PROGRAM "Quartus II 64-Bit"
// VERSION "Version 14.0.0 Build 200 06/17/2014 SJ Web Edition"

// DATE "02/16/2015 11:00:06"

// 
// Device: Altera EP4CGX22CF19C6 Package FBGA324
// 

// 
// This Verilog file should be used for ModelSim-Altera (Verilog) only
// 

`timescale 1 ps/ 1 ps

module wiegand_tx_top (
        one_o,
        zero_o,
        wb_clk_i,
        wb_rst_i,
        wb_dat_i,
        wb_dat_o,
        wb_cyc_i,
        wb_stb_i,
        wb_cti_i,
        wb_sel_i,
        wb_we_i,
        wb_adr_i,
        wb_ack_o,
        wb_err_o,
        wb_rty_o);
output  one_o;
output  zero_o;
input   wb_clk_i;
input   wb_rst_i;
input   [31:0] wb_dat_i;
output  [31:0] wb_dat_o;
input   wb_cyc_i;
input   wb_stb_i;
input   [2:0] wb_cti_i;
input   [3:0] wb_sel_i;
input   wb_we_i;
input   [5:0] wb_adr_i;
output  wb_ack_o;
output  wb_err_o;
output  wb_rty_o;

// Design Ports Information
// one_o        =>  Location: PIN_D10,   I/O Standard: 2.5 V,    Current Strength: Default
// zero_o       =>  Location: PIN_G16,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_o[0]  =>  Location: PIN_T10,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_o[1]  =>  Location: PIN_U13,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_o[2]  =>  Location: PIN_D12,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_o[3]  =>  Location: PIN_V9,    I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_o[4]  =>  Location: PIN_V18,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_o[5]  =>  Location: PIN_R13,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_o[6]  =>  Location: PIN_U18,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_o[7]  =>  Location: PIN_R16,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_o[8]  =>  Location: PIN_R9,    I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_o[9]  =>  Location: PIN_C11,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_o[10] =>  Location: PIN_J16,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_o[11] =>  Location: PIN_B10,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_o[12] =>  Location: PIN_U9,    I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_o[13] =>  Location: PIN_T9,    I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_o[14] =>  Location: PIN_C10,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_o[15] =>  Location: PIN_A13,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_o[16] =>  Location: PIN_C8,    I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_o[17] =>  Location: PIN_B13,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_o[18] =>  Location: PIN_A11,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_o[19] =>  Location: PIN_U10,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_o[20] =>  Location: PIN_U7,    I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_o[21] =>  Location: PIN_T8,    I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_o[22] =>  Location: PIN_R8,    I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_o[23] =>  Location: PIN_V8,    I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_o[24] =>  Location: PIN_V7,    I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_o[25] =>  Location: PIN_A10,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_o[26] =>  Location: PIN_M18,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_o[27] =>  Location: PIN_D11,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_o[28] =>  Location: PIN_P16,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_o[29] =>  Location: PIN_L18,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_o[30] =>  Location: PIN_R18,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_o[31] =>  Location: PIN_N7,    I/O Standard: 2.5 V,    Current Strength: Default
// wb_cti_i[0]  =>  Location: PIN_V11,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_cti_i[1]  =>  Location: PIN_V12,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_cti_i[2]  =>  Location: PIN_A17,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_sel_i[0]  =>  Location: PIN_D9,    I/O Standard: 2.5 V,    Current Strength: Default
// wb_sel_i[1]  =>  Location: PIN_E15,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_sel_i[2]  =>  Location: PIN_C18,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_sel_i[3]  =>  Location: PIN_G18,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_ack_o     =>  Location: PIN_P12,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_err_o     =>  Location: PIN_T15,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_rty_o     =>  Location: PIN_P13,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_clk_i     =>  Location: PIN_M10,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_rst_i     =>  Location: PIN_M9,    I/O Standard: 2.5 V,    Current Strength: Default
// wb_adr_i[1]  =>  Location: PIN_T17,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_adr_i[2]  =>  Location: PIN_M17,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_adr_i[3]  =>  Location: PIN_M16,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_adr_i[4]  =>  Location: PIN_K16,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_adr_i[5]  =>  Location: PIN_N17,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_adr_i[0]  =>  Location: PIN_R12,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_cyc_i     =>  Location: PIN_R15,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_stb_i     =>  Location: PIN_V16,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_we_i      =>  Location: PIN_V14,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_i[0]  =>  Location: PIN_R10,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_i[1]  =>  Location: PIN_V13,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_i[2]  =>  Location: PIN_R11,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_i[3]  =>  Location: PIN_T12,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_i[4]  =>  Location: PIN_M7,    I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_i[5]  =>  Location: PIN_U12,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_i[6]  =>  Location: PIN_E10,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_i[7]  =>  Location: PIN_T11,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_i[8]  =>  Location: PIN_V17,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_i[9]  =>  Location: PIN_U15,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_i[10] =>  Location: PIN_R17,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_i[11] =>  Location: PIN_N16,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_i[12] =>  Location: PIN_R14,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_i[13] =>  Location: PIN_P18,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_i[14] =>  Location: PIN_L15,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_i[15] =>  Location: PIN_T16,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_i[16] =>  Location: PIN_V5,    I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_i[17] =>  Location: PIN_N15,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_i[18] =>  Location: PIN_P15,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_i[19] =>  Location: PIN_T18,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_i[20] =>  Location: PIN_K15,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_i[21] =>  Location: PIN_L16,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_i[22] =>  Location: PIN_P10,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_i[23] =>  Location: PIN_V10,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_i[24] =>  Location: PIN_R7,    I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_i[25] =>  Location: PIN_V6,    I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_i[26] =>  Location: PIN_U16,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_i[27] =>  Location: PIN_T13,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_i[28] =>  Location: PIN_V15,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_i[29] =>  Location: PIN_T14,   I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_i[30] =>  Location: PIN_T7,    I/O Standard: 2.5 V,    Current Strength: Default
// wb_dat_i[31] =>  Location: PIN_N18,   I/O Standard: 2.5 V,    Current Strength: Default


wire gnd;
wire vcc;
wire unknown;

assign gnd = 1'b0;
assign vcc = 1'b1;
assign unknown = 1'bx;

tri1 devclrn;
tri1 devpor;
tri1 devoe;
// synopsys translate_off
initial $sdf_annotate("wiegand_tx_top_6_1200mv_85c_v_slow.sdo");
// synopsys translate_on

wire \wb_cti_i[0]~input_o ;
wire \wb_cti_i[1]~input_o ;
wire \wb_cti_i[2]~input_o ;
wire \wb_sel_i[0]~input_o ;
wire \wb_sel_i[1]~input_o ;
wire \wb_sel_i[2]~input_o ;
wire \wb_sel_i[3]~input_o ;
wire \wb_dat_o[0]~output_o ;
wire \wb_dat_o[1]~output_o ;
wire \wb_dat_o[2]~output_o ;
wire \wb_dat_o[3]~output_o ;
wire \wb_dat_o[4]~output_o ;
wire \wb_dat_o[5]~output_o ;
wire \wb_dat_o[6]~output_o ;
wire \wb_dat_o[7]~output_o ;
wire \wb_dat_o[8]~output_o ;
wire \wb_dat_o[9]~output_o ;
wire \wb_dat_o[10]~output_o ;
wire \wb_dat_o[11]~output_o ;
wire \wb_dat_o[12]~output_o ;
wire \wb_dat_o[13]~output_o ;
wire \wb_dat_o[14]~output_o ;
wire \wb_dat_o[15]~output_o ;
wire \wb_dat_o[16]~output_o ;
wire \wb_dat_o[17]~output_o ;
wire \wb_dat_o[18]~output_o ;
wire \wb_dat_o[19]~output_o ;
wire \wb_dat_o[20]~output_o ;
wire \wb_dat_o[21]~output_o ;
wire \wb_dat_o[22]~output_o ;
wire \wb_dat_o[23]~output_o ;
wire \wb_dat_o[24]~output_o ;
wire \wb_dat_o[25]~output_o ;
wire \wb_dat_o[26]~output_o ;
wire \wb_dat_o[27]~output_o ;
wire \wb_dat_o[28]~output_o ;
wire \wb_dat_o[29]~output_o ;
wire \wb_dat_o[30]~output_o ;
wire \wb_dat_o[31]~output_o ;
wire \one_o~output_o ;
wire \zero_o~output_o ;
wire \wb_ack_o~output_o ;
wire \wb_err_o~output_o ;
wire \wb_rty_o~output_o ;
wire \wb_adr_i[0]~input_o ;
wire \wb_adr_i[1]~input_o ;
wire \wb_adr_i[2]~input_o ;
wire \wb_adr_i[5]~input_o ;
wire \wb_adr_i[3]~input_o ;
wire \wb_adr_i[4]~input_o ;
wire \wb_interface|Equal2~0_combout ;
wire \wb_interface|Equal1~0_combout ;
wire \wb_clk_i~input_o ;
wire \wb_clk_i~inputclkctrl_outclk ;
wire \wb_dat_i[0]~input_o ;
wire \wb_rst_i~input_o ;
wire \wb_rst_i~inputclkctrl_outclk ;
wire \bitCountReg[0]~8_combout ;
wire \pulseCnt[0]~32_combout ;
wire \wb_dat_i[5]~input_o ;
wire \wb_interface|Equal2~1_combout ;
wire \wb_stb_i~input_o ;
wire \wb_cyc_i~input_o ;
wire \wb_interface|wb_dat_o~1_combout ;
wire \wb_we_i~input_o ;
wire \wb_interface|always4~0_combout ;
wire \wb_dat_i[9]~input_o ;
wire \wb_dat_i[8]~input_o ;
wire \wb_dat_i[7]~input_o ;
wire \wb_dat_i[6]~input_o ;
wire \Equal1~10_combout ;
wire \Equal1~11_combout ;
wire \wb_dat_i[20]~input_o ;
wire \wb_dat_i[18]~input_o ;
wire \wb_dat_i[19]~input_o ;
wire \wb_dat_i[21]~input_o ;
wire \Equal1~6_combout ;
wire \wb_dat_i[16]~input_o ;
wire \wb_dat_i[17]~input_o ;
wire \wb_dat_i[15]~input_o ;
wire \wb_dat_i[14]~input_o ;
wire \Equal1~7_combout ;
wire \wb_dat_i[13]~input_o ;
wire \wb_interface|p2p[13]~feeder_combout ;
wire \wb_dat_i[10]~input_o ;
wire \wb_dat_i[11]~input_o ;
wire \wb_dat_i[12]~input_o ;
wire \Equal1~8_combout ;
wire \wb_dat_i[24]~input_o ;
wire \wb_dat_i[22]~input_o ;
wire \wb_interface|p2p[22]~feeder_combout ;
wire \wb_dat_i[23]~input_o ;
wire \wb_interface|p2p[23]~feeder_combout ;
wire \wb_dat_i[25]~input_o ;
wire \wb_interface|p2p[25]~feeder_combout ;
wire \Equal1~5_combout ;
wire \Equal1~9_combout ;
wire \wb_dat_i[28]~input_o ;
wire \wb_dat_i[27]~input_o ;
wire \wb_dat_i[26]~input_o ;
wire \wb_dat_i[29]~input_o ;
wire \Equal1~3_combout ;
wire \wb_dat_i[31]~input_o ;
wire \wb_dat_i[4]~input_o ;
wire \p2pCnt[0]~5_combout ;
wire \p2pCnt[0]~6 ;
wire \p2pCnt[1]~7_combout ;
wire \p2pCnt[1]~8 ;
wire \p2pCnt[2]~9_combout ;
wire \p2pCnt[2]~10 ;
wire \p2pCnt[3]~11_combout ;
wire \p2pCnt[3]~12 ;
wire \p2pCnt[4]~13_combout ;
wire \wb_dat_i[30]~input_o ;
wire \Equal1~2_combout ;
wire \wb_dat_i[1]~input_o ;
wire \Equal1~0_combout ;
wire \wb_dat_i[3]~input_o ;
wire \wb_dat_i[2]~input_o ;
wire \Equal1~1_combout ;
wire \Equal1~4_combout ;
wire \Equal1~12_combout ;
wire \Selector3~3_combout ;
wire \state.101~q ;
wire \bitCountReg[1]~11 ;
wire \bitCountReg[2]~12_combout ;
wire \bitCountReg[3]~7_combout ;
wire \bitCountReg[2]~13 ;
wire \bitCountReg[3]~14_combout ;
wire \bitCountReg[3]~15 ;
wire \bitCountReg[4]~16_combout ;
wire \bitCountReg[4]~17 ;
wire \bitCountReg[5]~18_combout ;
wire \bitCountReg[5]~19 ;
wire \bitCountReg[6]~20_combout ;
wire \Selector3~0_combout ;
wire \Selector3~1_combout ;
wire \Selector3~2_combout ;
wire \Selector4~0_combout ;
wire \bitCount[0]~7_combout ;
wire \wb_interface|rty_int~1_combout ;
wire \wb_interface|always3~0_combout ;
wire \Equal3~8_combout ;
wire \Equal3~6_combout ;
wire \Equal3~7_combout ;
wire \Equal3~5_combout ;
wire \Equal3~9_combout ;
wire \Equal3~2_combout ;
wire \wb_interface|pulsewidth[3]~1_combout ;
wire \Equal3~1_combout ;
wire \Equal3~3_combout ;
wire \wb_interface|pulsewidth[1]~0_combout ;
wire \Equal3~0_combout ;
wire \Equal3~4_combout ;
wire \pulseCnt[19]~71 ;
wire \pulseCnt[20]~72_combout ;
wire \pulseCnt[20]~73 ;
wire \pulseCnt[21]~74_combout ;
wire \pulseCnt[21]~75 ;
wire \pulseCnt[22]~76_combout ;
wire \pulseCnt[22]~77 ;
wire \pulseCnt[23]~78_combout ;
wire \pulseCnt[23]~79 ;
wire \pulseCnt[24]~80_combout ;
wire \pulseCnt[24]~81 ;
wire \pulseCnt[25]~82_combout ;
wire \Equal3~15_combout ;
wire \pulseCnt[25]~83 ;
wire \pulseCnt[26]~84_combout ;
wire \pulseCnt[26]~85 ;
wire \pulseCnt[27]~86_combout ;
wire \Equal3~16_combout ;
wire \pulseCnt[27]~87 ;
wire \pulseCnt[28]~88_combout ;
wire \pulseCnt[28]~89 ;
wire \pulseCnt[29]~90_combout ;
wire \Equal3~17_combout ;
wire \pulseCnt[29]~91 ;
wire \pulseCnt[30]~92_combout ;
wire \pulseCnt[30]~93 ;
wire \pulseCnt[31]~94_combout ;
wire \Equal3~18_combout ;
wire \Equal3~19_combout ;
wire \Equal3~20_combout ;
wire \Selector2~0_combout ;
wire \state.100~q ;
wire \wb_interface|size~0_combout ;
wire \Selector0~0_combout ;
wire \state.000~q ;
wire \bitCount[4]~11_combout ;
wire \bitCount[0]~8 ;
wire \bitCount[1]~9_combout ;
wire \wb_interface|size[1]~feeder_combout ;
wire \Equal2~0_combout ;
wire \bitCount[1]~10 ;
wire \bitCount[2]~12_combout ;
wire \bitCount[2]~13 ;
wire \bitCount[3]~14_combout ;
wire \bitCount[3]~15 ;
wire \bitCount[4]~16_combout ;
wire \bitCount[4]~17 ;
wire \bitCount[5]~18_combout ;
wire \wb_interface|size[5]~feeder_combout ;
wire \Equal2~2_combout ;
wire \bitCount[5]~19 ;
wire \bitCount[6]~20_combout ;
wire \Equal2~3_combout ;
wire \Equal2~1_combout ;
wire \Equal2~4_combout ;
wire \Selector4~1_combout ;
wire \state.111~q ;
wire \bit~0_combout ;
wire \pulseCnt[0]~33 ;
wire \pulseCnt[1]~34_combout ;
wire \pulseCnt[1]~35 ;
wire \pulseCnt[2]~36_combout ;
wire \pulseCnt[2]~37 ;
wire \pulseCnt[3]~38_combout ;
wire \pulseCnt[3]~39 ;
wire \pulseCnt[4]~40_combout ;
wire \pulseCnt[4]~41 ;
wire \pulseCnt[5]~42_combout ;
wire \pulseCnt[5]~43 ;
wire \pulseCnt[6]~44_combout ;
wire \pulseCnt[6]~45 ;
wire \pulseCnt[7]~46_combout ;
wire \pulseCnt[7]~47 ;
wire \pulseCnt[8]~48_combout ;
wire \pulseCnt[8]~49 ;
wire \pulseCnt[9]~50_combout ;
wire \pulseCnt[9]~51 ;
wire \pulseCnt[10]~52_combout ;
wire \pulseCnt[10]~53 ;
wire \pulseCnt[11]~54_combout ;
wire \pulseCnt[11]~55 ;
wire \pulseCnt[12]~56_combout ;
wire \pulseCnt[12]~57 ;
wire \pulseCnt[13]~58_combout ;
wire \pulseCnt[13]~59 ;
wire \pulseCnt[14]~60_combout ;
wire \pulseCnt[14]~61 ;
wire \pulseCnt[15]~62_combout ;
wire \pulseCnt[15]~63 ;
wire \pulseCnt[16]~64_combout ;
wire \pulseCnt[16]~65 ;
wire \pulseCnt[17]~66_combout ;
wire \pulseCnt[17]~67 ;
wire \pulseCnt[18]~68_combout ;
wire \pulseCnt[18]~69 ;
wire \pulseCnt[19]~70_combout ;
wire \wb_interface|pulsewidth[18]~feeder_combout ;
wire \Equal3~11_combout ;
wire \Equal3~10_combout ;
wire \wb_interface|pulsewidth[20]~feeder_combout ;
wire \Equal3~12_combout ;
wire \wb_interface|pulsewidth[22]~feeder_combout ;
wire \Equal3~13_combout ;
wire \Equal3~14_combout ;
wire \next_state.110~0_combout ;
wire \next_state.110~1_combout ;
wire \state.110~q ;
wire \bitCountReg[0]~9 ;
wire \bitCountReg[1]~10_combout ;
wire \Equal0~0_combout ;
wire \Selector1~0_combout ;
wire \Selector1~1_combout ;
wire \state.001~q ;
wire \lock_cfg~0_combout ;
wire \lock_cfg~q ;
wire \wb_interface|always5~0_combout ;
wire \wb_interface|wb_dat_rdbk[0]~0_combout ;
wire \wb_interface|wb_dat_rdbk[0]~1_combout ;
wire \wb_interface|wb_dat_o~0_combout ;
wire \wb_interface|wb_dat_rdbk[1]~2_combout ;
wire \wb_interface|wb_dat_rdbk[1]~3_combout ;
wire \wb_interface|wb_dat_rdbk[2]~4_combout ;
wire \wb_interface|wb_dat_rdbk[2]~5_combout ;
wire \wb_interface|wb_dat_rdbk[3]~6_combout ;
wire \wb_interface|wb_dat_rdbk[3]~7_combout ;
wire \wb_interface|wb_dat_rdbk[4]~8_combout ;
wire \wb_interface|wb_dat_rdbk[4]~9_combout ;
wire \wb_interface|wb_dat_rdbk[5]~10_combout ;
wire \wb_interface|wb_dat_rdbk[5]~11_combout ;
wire \wb_interface|wb_dat_rdbk[6]~12_combout ;
wire \wb_interface|wb_dat_rdbk[6]~13_combout ;
wire \wb_interface|wb_dat_rdbk[7]~14_combout ;
wire \wb_interface|wb_dat_rdbk[7]~15_combout ;
wire \wb_interface|size~1_combout ;
wire \wb_interface|wb_dat_rdbk[8]~16_combout ;
wire \wb_interface|wb_dat_rdbk[8]~17_combout ;
wire \wb_interface|wb_dat_rdbk[9]~18_combout ;
wire \wb_interface|wb_dat_rdbk[10]~19_combout ;
wire \wb_interface|wb_dat_rdbk[11]~20_combout ;
wire \wb_interface|wb_dat_rdbk[12]~21_combout ;
wire \wb_interface|wb_dat_rdbk[13]~22_combout ;
wire \wb_interface|wb_dat_rdbk[14]~23_combout ;
wire \wb_interface|wb_dat_rdbk[15]~24_combout ;
wire \wb_interface|wb_dat_rdbk[16]~25_combout ;
wire \wb_interface|wb_dat_rdbk[17]~26_combout ;
wire \wb_interface|wb_dat_rdbk[18]~27_combout ;
wire \wb_interface|wb_dat_rdbk[19]~28_combout ;
wire \wb_interface|wb_dat_rdbk[20]~29_combout ;
wire \wb_interface|wb_dat_rdbk[21]~30_combout ;
wire \wb_interface|wb_dat_rdbk[22]~31_combout ;
wire \wb_interface|wb_dat_rdbk[23]~32_combout ;
wire \wb_interface|wb_dat_rdbk[24]~33_combout ;
wire \wb_interface|wb_dat_rdbk[25]~34_combout ;
wire \wb_interface|wb_dat_rdbk[26]~35_combout ;
wire \wb_interface|wb_dat_rdbk[27]~36_combout ;
wire \wb_interface|wb_dat_rdbk[28]~37_combout ;
wire \wb_interface|wb_dat_rdbk[29]~38_combout ;
wire \wb_interface|wb_dat_rdbk[30]~39_combout ;
wire \wb_interface|wb_dat_rdbk[31]~40_combout ;
wire \comb~0_combout ;
wire \comb~0clkctrl_outclk ;
wire \datafifowrite|custom_fifo_dp5|addr_wr[1]~1_combout ;
wire \datafifowrite|custom_fifo_dp5|Equal0~1_combout ;
wire \datafifowrite|custom_fifo_dp5|full~0_combout ;
wire \datafifowrite|custom_fifo_dp5|full~1_combout ;
wire \full_dly~q ;
wire \datafifowrite|custom_fifo_dp5|always1~0_combout ;
wire \datafifowrite|custom_fifo_dp5|always1~1_combout ;
wire \datafifowrite|custom_fifo_dp5|addr_wr[0]~0_combout ;
wire \datafifowrite|custom_fifo_dp5|Equal0~0_combout ;
wire \datafifowrite|custom_fifo_dp5|always2~0_combout ;
wire \datafifowrite|custom_fifo_dp5|addr_rd[0]~1_combout ;
wire \datafifowrite|custom_fifo_dp5|addr_rd[1]~0_combout ;
wire \datafifowrite|custom_fifo_dp5|mem_byte_out[5]~2_combout ;
wire \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[5]~feeder_combout ;
wire \datafifowrite|custom_fifo_dp5|mem_byte_out[4]~3_combout ;
wire \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[4]~feeder_combout ;
wire \datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[1]~feeder_combout ;
wire \datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[1]~feeder_combout ;
wire \datafifowrite|custom_fifo_dp5|mem_byte_out[1]~6_combout ;
wire \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[1]~feeder_combout ;
wire \datafifowrite|custom_fifo_dp6|mem_byte_out[3]~4_combout ;
wire \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[3]~feeder_combout ;
wire \datafifowrite|custom_fifo_dp6|mem_byte_out[0]~7_combout ;
wire \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[0]~feeder_combout ;
wire \datafifowrite|custom_fifo_dp7|mem_byte_out[2]~5_combout ;
wire \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[2]~feeder_combout ;
wire \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[0]~feeder_combout ;
wire \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[0]~feeder_combout ;
wire \datafifowrite|custom_fifo_dp7|mem_byte_out[0]~7_combout ;
wire \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[0]~feeder_combout ;
wire \datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[5]~feeder_combout ;
wire \datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[5]~feeder_combout ;
wire \datafifowrite|custom_fifo_dp8|mem_byte_out[5]~2_combout ;
wire \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[5]~feeder_combout ;
wire \word_out~31_combout ;
wire \datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[0]~feeder_combout ;
wire \datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[0]~feeder_combout ;
wire \datafifowrite|custom_fifo_dp8|mem_byte_out[0]~7_combout ;
wire \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[0]~feeder_combout ;
wire \datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[1]~feeder_combout ;
wire \datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[1]~feeder_combout ;
wire \datafifowrite|custom_fifo_dp8|mem_byte_out[1]~6_combout ;
wire \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[1]~feeder_combout ;
wire \word_out~30_combout ;
wire \datafifowrite|custom_fifo_dp8|mem_byte_out[2]~5_combout ;
wire \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[2]~feeder_combout ;
wire \word_out~29_combout ;
wire \datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[3]~feeder_combout ;
wire \datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[3]~feeder_combout ;
wire \datafifowrite|custom_fifo_dp8|mem_byte_out[3]~4_combout ;
wire \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[3]~feeder_combout ;
wire \word_out~28_combout ;
wire \datafifowrite|custom_fifo_dp8|mem_byte_out[4]~3_combout ;
wire \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[4]~feeder_combout ;
wire \word_out~27_combout ;
wire \word_out~26_combout ;
wire \datafifowrite|custom_fifo_dp8|mem_byte_out[6]~1_combout ;
wire \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[6]~feeder_combout ;
wire \word_out~25_combout ;
wire \datafifowrite|custom_fifo_dp8|mem_byte_out[7]~0_combout ;
wire \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[7]~feeder_combout ;
wire \word_out~24_combout ;
wire \word_out~23_combout ;
wire \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[1]~feeder_combout ;
wire \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[1]~feeder_combout ;
wire \datafifowrite|custom_fifo_dp7|mem_byte_out[1]~6_combout ;
wire \word_out~22_combout ;
wire \word_out~21_combout ;
wire \datafifowrite|custom_fifo_dp7|mem_byte_out[3]~4_combout ;
wire \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[3]~feeder_combout ;
wire \word_out~20_combout ;
wire \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[4]~feeder_combout ;
wire \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[4]~feeder_combout ;
wire \datafifowrite|custom_fifo_dp7|mem_byte_out[4]~3_combout ;
wire \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[4]~feeder_combout ;
wire \word_out~19_combout ;
wire \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[5]~feeder_combout ;
wire \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[5]~feeder_combout ;
wire \datafifowrite|custom_fifo_dp7|mem_byte_out[5]~2_combout ;
wire \word_out~18_combout ;
wire \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[6]~feeder_combout ;
wire \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[6]~feeder_combout ;
wire \datafifowrite|custom_fifo_dp7|mem_byte_out[6]~1_combout ;
wire \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[6]~feeder_combout ;
wire \word_out~17_combout ;
wire \datafifowrite|custom_fifo_dp7|mem_byte_out[7]~0_combout ;
wire \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[7]~feeder_combout ;
wire \word_out~16_combout ;
wire \word_out~15_combout ;
wire \datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg[1]~feeder_combout ;
wire \datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg[1]~feeder_combout ;
wire \datafifowrite|custom_fifo_dp6|mem_byte_out[1]~6_combout ;
wire \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[1]~feeder_combout ;
wire \word_out~14_combout ;
wire \datafifowrite|custom_fifo_dp6|mem_byte_out[2]~5_combout ;
wire \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[2]~feeder_combout ;
wire \word_out~13_combout ;
wire \word_out~12_combout ;
wire \datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg[4]~feeder_combout ;
wire \datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg[4]~feeder_combout ;
wire \datafifowrite|custom_fifo_dp6|mem_byte_out[4]~3_combout ;
wire \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[4]~feeder_combout ;
wire \word_out~11_combout ;
wire \datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg[5]~feeder_combout ;
wire \datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg[5]~feeder_combout ;
wire \datafifowrite|custom_fifo_dp6|mem_byte_out[5]~2_combout ;
wire \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[5]~feeder_combout ;
wire \word_out~10_combout ;
wire \datafifowrite|custom_fifo_dp6|mem_byte_out[6]~1_combout ;
wire \word_out~9_combout ;
wire \datafifowrite|custom_fifo_dp6|mem_byte_out[7]~0_combout ;
wire \word_out~8_combout ;
wire \datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[0]~feeder_combout ;
wire \datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[0]~feeder_combout ;
wire \datafifowrite|custom_fifo_dp5|mem_byte_out[0]~7_combout ;
wire \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[0]~feeder_combout ;
wire \word_out~7_combout ;
wire \word_out~6_combout ;
wire \datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[2]~feeder_combout ;
wire \datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[2]~feeder_combout ;
wire \datafifowrite|custom_fifo_dp5|mem_byte_out[2]~5_combout ;
wire \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[2]~feeder_combout ;
wire \word_out~5_combout ;
wire \datafifowrite|custom_fifo_dp5|mem_byte_out[3]~4_combout ;
wire \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[3]~feeder_combout ;
wire \word_out~4_combout ;
wire \word_out~3_combout ;
wire \word_out~2_combout ;
wire \datafifowrite|custom_fifo_dp5|mem_byte_out[6]~1_combout ;
wire \word_out~1_combout ;
wire \datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[7]~feeder_combout ;
wire \datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[7]~feeder_combout ;
wire \datafifowrite|custom_fifo_dp5|mem_byte_out[7]~0_combout ;
wire \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[7]~feeder_combout ;
wire \word_out~0_combout ;
wire \one_o~0_combout ;
wire \one_o~reg0_q ;
wire \zero_o~0_combout ;
wire \zero_o~reg0_q ;
wire \wb_interface|err_int~combout ;
wire \wb_interface|ack~0_combout ;
wire \wb_interface|ack~q ;
wire \wb_interface|err~q ;
wire \wb_interface|rty_int~0_combout ;
wire \wb_interface|rty~q ;
wire [31:0] word_out;
wire [31:0] pulseCnt;
wire [4:0] p2pCnt;
wire [6:0] bitCountReg;
wire [6:0] bitCount;
wire [7:0] \datafifowrite|custom_fifo_dp5|fifo_out ;
wire [2:0] \datafifowrite|custom_fifo_dp5|addr_wr ;
wire [2:0] \datafifowrite|custom_fifo_dp5|addr_rd ;
wire [7:0] \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg ;
wire [8:0] \wb_interface|size ;
wire [31:0] \wb_interface|pulsewidth ;
wire [31:0] \wb_interface|p2p ;
wire [7:0] \datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg ;
wire [7:0] \datafifowrite|custom_fifo_dp6|fifo_out ;
wire [7:0] \datafifowrite|custom_fifo_dp8|fifo_out ;
wire [7:0] \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg ;
wire [7:0] \datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg ;
wire [7:0] \datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg ;
wire [7:0] \datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg ;
wire [7:0] \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg ;
wire [7:0] \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg ;
wire [7:0] \datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg ;
wire [7:0] \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg ;
wire [7:0] \datafifowrite|custom_fifo_dp7|fifo_out ;
wire [7:0] \datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg ;
wire [7:0] \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg ;


// Location: IOOBUF_X23_Y0_N9
cycloneiv_io_obuf \wb_dat_o[0]~output (
        .i(\wb_interface|wb_dat_rdbk[0]~1_combout ),
        .oe(\wb_interface|wb_dat_o~0_combout ),
        .seriesterminationcontrol(16'b0000000000000000),
        .devoe(devoe),
        .o(\wb_dat_o[0]~output_o ),
        .obar());
// synopsys translate_off
defparam \wb_dat_o[0]~output .bus_hold = "false";
defparam \wb_dat_o[0]~output .open_drain_output = "false";
// synopsys translate_on

// Location: IOOBUF_X29_Y0_N9
cycloneiv_io_obuf \wb_dat_o[1]~output (
        .i(\wb_interface|wb_dat_rdbk[1]~3_combout ),
        .oe(\wb_interface|wb_dat_o~0_combout ),
        .seriesterminationcontrol(16'b0000000000000000),
        .devoe(devoe),
        .o(\wb_dat_o[1]~output_o ),
        .obar());
// synopsys translate_off
defparam \wb_dat_o[1]~output .bus_hold = "false";
defparam \wb_dat_o[1]~output .open_drain_output = "false";
// synopsys translate_on

// Location: IOOBUF_X31_Y41_N9
cycloneiv_io_obuf \wb_dat_o[2]~output (
        .i(\wb_interface|wb_dat_rdbk[2]~5_combout ),
        .oe(\wb_interface|wb_dat_o~0_combout ),
        .seriesterminationcontrol(16'b0000000000000000),
        .devoe(devoe),
        .o(\wb_dat_o[2]~output_o ),
        .obar());
// synopsys translate_off
defparam \wb_dat_o[2]~output .bus_hold = "false";
defparam \wb_dat_o[2]~output .open_drain_output = "false";
// synopsys translate_on

// Location: IOOBUF_X21_Y0_N9
cycloneiv_io_obuf \wb_dat_o[3]~output (
        .i(\wb_interface|wb_dat_rdbk[3]~7_combout ),
        .oe(\wb_interface|wb_dat_o~0_combout ),
        .seriesterminationcontrol(16'b0000000000000000),
        .devoe(devoe),
        .o(\wb_dat_o[3]~output_o ),
        .obar());
// synopsys translate_off
defparam \wb_dat_o[3]~output .bus_hold = "false";
defparam \wb_dat_o[3]~output .open_drain_output = "false";
// synopsys translate_on

// Location: IOOBUF_X46_Y0_N16
cycloneiv_io_obuf \wb_dat_o[4]~output (
        .i(\wb_interface|wb_dat_rdbk[4]~9_combout ),
        .oe(\wb_interface|wb_dat_o~0_combout ),
        .seriesterminationcontrol(16'b0000000000000000),
        .devoe(devoe),
        .o(\wb_dat_o[4]~output_o ),
        .obar());
// synopsys translate_off
defparam \wb_dat_o[4]~output .bus_hold = "false";
defparam \wb_dat_o[4]~output .open_drain_output = "false";
// synopsys translate_on

// Location: IOOBUF_X36_Y0_N2
cycloneiv_io_obuf \wb_dat_o[5]~output (
        .i(\wb_interface|wb_dat_rdbk[5]~11_combout ),
        .oe(\wb_interface|wb_dat_o~0_combout ),
        .seriesterminationcontrol(16'b0000000000000000),
        .devoe(devoe),
        .o(\wb_dat_o[5]~output_o ),
        .obar());
// synopsys translate_off
defparam \wb_dat_o[5]~output .bus_hold = "false";
defparam \wb_dat_o[5]~output .open_drain_output = "false";
// synopsys translate_on

// Location: IOOBUF_X46_Y0_N23
cycloneiv_io_obuf \wb_dat_o[6]~output (
        .i(\wb_interface|wb_dat_rdbk[6]~13_combout ),
        .oe(\wb_interface|wb_dat_o~0_combout ),
        .seriesterminationcontrol(16'b0000000000000000),
        .devoe(devoe),
        .o(\wb_dat_o[6]~output_o ),
        .obar());
// synopsys translate_off
defparam \wb_dat_o[6]~output .bus_hold = "false";
defparam \wb_dat_o[6]~output .open_drain_output = "false";
// synopsys translate_on

// Location: IOOBUF_X52_Y10_N2
cycloneiv_io_obuf \wb_dat_o[7]~output (
        .i(\wb_interface|wb_dat_rdbk[7]~15_combout ),
        .oe(\wb_interface|wb_dat_o~0_combout ),
        .seriesterminationcontrol(16'b0000000000000000),
        .devoe(devoe),
        .o(\wb_dat_o[7]~output_o ),
        .obar());
// synopsys translate_off
defparam \wb_dat_o[7]~output .bus_hold = "false";
defparam \wb_dat_o[7]~output .open_drain_output = "false";
// synopsys translate_on

// Location: IOOBUF_X18_Y0_N9
cycloneiv_io_obuf \wb_dat_o[8]~output (
        .i(\wb_interface|wb_dat_rdbk[8]~17_combout ),
        .oe(\wb_interface|wb_dat_o~0_combout ),
        .seriesterminationcontrol(16'b0000000000000000),
        .devoe(devoe),
        .o(\wb_dat_o[8]~output_o ),
        .obar());
// synopsys translate_off
defparam \wb_dat_o[8]~output .bus_hold = "false";
defparam \wb_dat_o[8]~output .open_drain_output = "false";
// synopsys translate_on

// Location: IOOBUF_X25_Y41_N9
cycloneiv_io_obuf \wb_dat_o[9]~output (
        .i(\wb_interface|wb_dat_rdbk[9]~18_combout ),
        .oe(\wb_interface|wb_dat_o~0_combout ),
        .seriesterminationcontrol(16'b0000000000000000),
        .devoe(devoe),
        .o(\wb_dat_o[9]~output_o ),
        .obar());
// synopsys translate_off
defparam \wb_dat_o[9]~output .bus_hold = "false";
defparam \wb_dat_o[9]~output .open_drain_output = "false";
// synopsys translate_on

// Location: IOOBUF_X52_Y23_N2
cycloneiv_io_obuf \wb_dat_o[10]~output (
        .i(\wb_interface|wb_dat_rdbk[10]~19_combout ),
        .oe(\wb_interface|wb_dat_o~0_combout ),
        .seriesterminationcontrol(16'b0000000000000000),
        .devoe(devoe),
        .o(\wb_dat_o[10]~output_o ),
        .obar());
// synopsys translate_off
defparam \wb_dat_o[10]~output .bus_hold = "false";
defparam \wb_dat_o[10]~output .open_drain_output = "false";
// synopsys translate_on

// Location: IOOBUF_X21_Y41_N9
cycloneiv_io_obuf \wb_dat_o[11]~output (
        .i(\wb_interface|wb_dat_rdbk[11]~20_combout ),
        .oe(\wb_interface|wb_dat_o~0_combout ),
        .seriesterminationcontrol(16'b0000000000000000),
        .devoe(devoe),
        .o(\wb_dat_o[11]~output_o ),
        .obar());
// synopsys translate_off
defparam \wb_dat_o[11]~output .bus_hold = "false";
defparam \wb_dat_o[11]~output .open_drain_output = "false";
// synopsys translate_on

// Location: IOOBUF_X16_Y0_N9
cycloneiv_io_obuf \wb_dat_o[12]~output (
        .i(\wb_interface|wb_dat_rdbk[12]~21_combout ),
        .oe(\wb_interface|wb_dat_o~0_combout ),
        .seriesterminationcontrol(16'b0000000000000000),
        .devoe(devoe),
        .o(\wb_dat_o[12]~output_o ),
        .obar());
// synopsys translate_off
defparam \wb_dat_o[12]~output .bus_hold = "false";
defparam \wb_dat_o[12]~output .open_drain_output = "false";
// synopsys translate_on

// Location: IOOBUF_X18_Y0_N2
cycloneiv_io_obuf \wb_dat_o[13]~output (
        .i(\wb_interface|wb_dat_rdbk[13]~22_combout ),
        .oe(\wb_interface|wb_dat_o~0_combout ),
        .seriesterminationcontrol(16'b0000000000000000),
        .devoe(devoe),
        .o(\wb_dat_o[13]~output_o ),
        .obar());
// synopsys translate_off
defparam \wb_dat_o[13]~output .bus_hold = "false";
defparam \wb_dat_o[13]~output .open_drain_output = "false";
// synopsys translate_on

// Location: IOOBUF_X25_Y41_N2
cycloneiv_io_obuf \wb_dat_o[14]~output (
        .i(\wb_interface|wb_dat_rdbk[14]~23_combout ),
        .oe(\wb_interface|wb_dat_o~0_combout ),
        .seriesterminationcontrol(16'b0000000000000000),
        .devoe(devoe),
        .o(\wb_dat_o[14]~output_o ),
        .obar());
// synopsys translate_off
defparam \wb_dat_o[14]~output .bus_hold = "false";
defparam \wb_dat_o[14]~output .open_drain_output = "false";
// synopsys translate_on

// Location: IOOBUF_X31_Y41_N16
cycloneiv_io_obuf \wb_dat_o[15]~output (
        .i(\wb_interface|wb_dat_rdbk[15]~24_combout ),
        .oe(\wb_interface|wb_dat_o~0_combout ),
        .seriesterminationcontrol(16'b0000000000000000),
        .devoe(devoe),
        .o(\wb_dat_o[15]~output_o ),
        .obar());
// synopsys translate_off
defparam \wb_dat_o[15]~output .bus_hold = "false";
defparam \wb_dat_o[15]~output .open_drain_output = "false";
// synopsys translate_on

// Location: IOOBUF_X14_Y41_N9
cycloneiv_io_obuf \wb_dat_o[16]~output (
        .i(\wb_interface|wb_dat_rdbk[16]~25_combout ),
        .oe(\wb_interface|wb_dat_o~0_combout ),
        .seriesterminationcontrol(16'b0000000000000000),
        .devoe(devoe),
        .o(\wb_dat_o[16]~output_o ),
        .obar());
// synopsys translate_off
defparam \wb_dat_o[16]~output .bus_hold = "false";
defparam \wb_dat_o[16]~output .open_drain_output = "false";
// synopsys translate_on

// Location: IOOBUF_X31_Y41_N23
cycloneiv_io_obuf \wb_dat_o[17]~output (
        .i(\wb_interface|wb_dat_rdbk[17]~26_combout ),
        .oe(\wb_interface|wb_dat_o~0_combout ),
        .seriesterminationcontrol(16'b0000000000000000),
        .devoe(devoe),
        .o(\wb_dat_o[17]~output_o ),
        .obar());
// synopsys translate_off
defparam \wb_dat_o[17]~output .bus_hold = "false";
defparam \wb_dat_o[17]~output .open_drain_output = "false";
// synopsys translate_on

// Location: IOOBUF_X23_Y41_N9
cycloneiv_io_obuf \wb_dat_o[18]~output (
        .i(\wb_interface|wb_dat_rdbk[18]~27_combout ),
        .oe(\wb_interface|wb_dat_o~0_combout ),
        .seriesterminationcontrol(16'b0000000000000000),
        .devoe(devoe),
        .o(\wb_dat_o[18]~output_o ),
        .obar());
// synopsys translate_off
defparam \wb_dat_o[18]~output .bus_hold = "false";
defparam \wb_dat_o[18]~output .open_drain_output = "false";
// synopsys translate_on

// Location: IOOBUF_X23_Y0_N2
cycloneiv_io_obuf \wb_dat_o[19]~output (
        .i(\wb_interface|wb_dat_rdbk[19]~28_combout ),
        .oe(\wb_interface|wb_dat_o~0_combout ),
        .seriesterminationcontrol(16'b0000000000000000),
        .devoe(devoe),
        .o(\wb_dat_o[19]~output_o ),
        .obar());
// synopsys translate_off
defparam \wb_dat_o[19]~output .bus_hold = "false";
defparam \wb_dat_o[19]~output .open_drain_output = "false";
// synopsys translate_on

// Location: IOOBUF_X12_Y0_N9
cycloneiv_io_obuf \wb_dat_o[20]~output (
        .i(\wb_interface|wb_dat_rdbk[20]~29_combout ),
        .oe(\wb_interface|wb_dat_o~0_combout ),
        .seriesterminationcontrol(16'b0000000000000000),
        .devoe(devoe),
        .o(\wb_dat_o[20]~output_o ),
        .obar());
// synopsys translate_off
defparam \wb_dat_o[20]~output .bus_hold = "false";
defparam \wb_dat_o[20]~output .open_drain_output = "false";
// synopsys translate_on

// Location: IOOBUF_X14_Y0_N9
cycloneiv_io_obuf \wb_dat_o[21]~output (
        .i(\wb_interface|wb_dat_rdbk[21]~30_combout ),
        .oe(\wb_interface|wb_dat_o~0_combout ),
        .seriesterminationcontrol(16'b0000000000000000),
        .devoe(devoe),
        .o(\wb_dat_o[21]~output_o ),
        .obar());
// synopsys translate_off
defparam \wb_dat_o[21]~output .bus_hold = "false";
defparam \wb_dat_o[21]~output .open_drain_output = "false";
// synopsys translate_on

// Location: IOOBUF_X14_Y0_N2
cycloneiv_io_obuf \wb_dat_o[22]~output (
        .i(\wb_interface|wb_dat_rdbk[22]~31_combout ),
        .oe(\wb_interface|wb_dat_o~0_combout ),
        .seriesterminationcontrol(16'b0000000000000000),
        .devoe(devoe),
        .o(\wb_dat_o[22]~output_o ),
        .obar());
// synopsys translate_off
defparam \wb_dat_o[22]~output .bus_hold = "false";
defparam \wb_dat_o[22]~output .open_drain_output = "false";
// synopsys translate_on

// Location: IOOBUF_X16_Y0_N2
cycloneiv_io_obuf \wb_dat_o[23]~output (
        .i(\wb_interface|wb_dat_rdbk[23]~32_combout ),
        .oe(\wb_interface|wb_dat_o~0_combout ),
        .seriesterminationcontrol(16'b0000000000000000),
        .devoe(devoe),
        .o(\wb_dat_o[23]~output_o ),
        .obar());
// synopsys translate_off
defparam \wb_dat_o[23]~output .bus_hold = "false";
defparam \wb_dat_o[23]~output .open_drain_output = "false";
// synopsys translate_on

// Location: IOOBUF_X12_Y0_N2
cycloneiv_io_obuf \wb_dat_o[24]~output (
        .i(\wb_interface|wb_dat_rdbk[24]~33_combout ),
        .oe(\wb_interface|wb_dat_o~0_combout ),
        .seriesterminationcontrol(16'b0000000000000000),
        .devoe(devoe),
        .o(\wb_dat_o[24]~output_o ),
        .obar());
// synopsys translate_off
defparam \wb_dat_o[24]~output .bus_hold = "false";
defparam \wb_dat_o[24]~output .open_drain_output = "false";
// synopsys translate_on

// Location: IOOBUF_X23_Y41_N2
cycloneiv_io_obuf \wb_dat_o[25]~output (
        .i(\wb_interface|wb_dat_rdbk[25]~34_combout ),
        .oe(\wb_interface|wb_dat_o~0_combout ),
        .seriesterminationcontrol(16'b0000000000000000),
        .devoe(devoe),
        .o(\wb_dat_o[25]~output_o ),
        .obar());
// synopsys translate_off
defparam \wb_dat_o[25]~output .bus_hold = "false";
defparam \wb_dat_o[25]~output .open_drain_output = "false";
// synopsys translate_on

// Location: IOOBUF_X52_Y19_N2
cycloneiv_io_obuf \wb_dat_o[26]~output (
        .i(\wb_interface|wb_dat_rdbk[26]~35_combout ),
        .oe(\wb_interface|wb_dat_o~0_combout ),
        .seriesterminationcontrol(16'b0000000000000000),
        .devoe(devoe),
        .o(\wb_dat_o[26]~output_o ),
        .obar());
// synopsys translate_off
defparam \wb_dat_o[26]~output .bus_hold = "false";
defparam \wb_dat_o[26]~output .open_drain_output = "false";
// synopsys translate_on

// Location: IOOBUF_X31_Y41_N2
cycloneiv_io_obuf \wb_dat_o[27]~output (
        .i(\wb_interface|wb_dat_rdbk[27]~36_combout ),
        .oe(\wb_interface|wb_dat_o~0_combout ),
        .seriesterminationcontrol(16'b0000000000000000),
        .devoe(devoe),
        .o(\wb_dat_o[27]~output_o ),
        .obar());
// synopsys translate_off
defparam \wb_dat_o[27]~output .bus_hold = "false";
defparam \wb_dat_o[27]~output .open_drain_output = "false";
// synopsys translate_on

// Location: IOOBUF_X52_Y10_N9
cycloneiv_io_obuf \wb_dat_o[28]~output (
        .i(\wb_interface|wb_dat_rdbk[28]~37_combout ),
        .oe(\wb_interface|wb_dat_o~0_combout ),
        .seriesterminationcontrol(16'b0000000000000000),
        .devoe(devoe),
        .o(\wb_dat_o[28]~output_o ),
        .obar());
// synopsys translate_off
defparam \wb_dat_o[28]~output .bus_hold = "false";
defparam \wb_dat_o[28]~output .open_drain_output = "false";
// synopsys translate_on

// Location: IOOBUF_X52_Y19_N9
cycloneiv_io_obuf \wb_dat_o[29]~output (
        .i(\wb_interface|wb_dat_rdbk[29]~38_combout ),
        .oe(\wb_interface|wb_dat_o~0_combout ),
        .seriesterminationcontrol(16'b0000000000000000),
        .devoe(devoe),
        .o(\wb_dat_o[29]~output_o ),
        .obar());
// synopsys translate_off
defparam \wb_dat_o[29]~output .bus_hold = "false";
defparam \wb_dat_o[29]~output .open_drain_output = "false";
// synopsys translate_on

// Location: IOOBUF_X52_Y12_N2
cycloneiv_io_obuf \wb_dat_o[30]~output (
        .i(\wb_interface|wb_dat_rdbk[30]~39_combout ),
        .oe(\wb_interface|wb_dat_o~0_combout ),
        .seriesterminationcontrol(16'b0000000000000000),
        .devoe(devoe),
        .o(\wb_dat_o[30]~output_o ),
        .obar());
// synopsys translate_off
defparam \wb_dat_o[30]~output .bus_hold = "false";
defparam \wb_dat_o[30]~output .open_drain_output = "false";
// synopsys translate_on

// Location: IOOBUF_X10_Y0_N2
cycloneiv_io_obuf \wb_dat_o[31]~output (
        .i(\wb_interface|wb_dat_rdbk[31]~40_combout ),
        .oe(\wb_interface|wb_dat_o~0_combout ),
        .seriesterminationcontrol(16'b0000000000000000),
        .devoe(devoe),
        .o(\wb_dat_o[31]~output_o ),
        .obar());
// synopsys translate_off
defparam \wb_dat_o[31]~output .bus_hold = "false";
defparam \wb_dat_o[31]~output .open_drain_output = "false";
// synopsys translate_on

// Location: IOOBUF_X29_Y41_N2
cycloneiv_io_obuf \one_o~output (
        .i(!\one_o~reg0_q ),
        .oe(vcc),
        .seriesterminationcontrol(16'b0000000000000000),
        .devoe(devoe),
        .o(\one_o~output_o ),
        .obar());
// synopsys translate_off
defparam \one_o~output .bus_hold = "false";
defparam \one_o~output .open_drain_output = "false";
// synopsys translate_on

// Location: IOOBUF_X52_Y27_N2
cycloneiv_io_obuf \zero_o~output (
        .i(!\zero_o~reg0_q ),
        .oe(vcc),
        .seriesterminationcontrol(16'b0000000000000000),
        .devoe(devoe),
        .o(\zero_o~output_o ),
        .obar());
// synopsys translate_off
defparam \zero_o~output .bus_hold = "false";
defparam \zero_o~output .open_drain_output = "false";
// synopsys translate_on

// Location: IOOBUF_X38_Y0_N9
cycloneiv_io_obuf \wb_ack_o~output (
        .i(\wb_interface|ack~q ),
        .oe(vcc),
        .seriesterminationcontrol(16'b0000000000000000),
        .devoe(devoe),
        .o(\wb_ack_o~output_o ),
        .obar());
// synopsys translate_off
defparam \wb_ack_o~output .bus_hold = "false";
defparam \wb_ack_o~output .open_drain_output = "false";
// synopsys translate_on

// Location: IOOBUF_X48_Y0_N2
cycloneiv_io_obuf \wb_err_o~output (
        .i(\wb_interface|err~q ),
        .oe(vcc),
        .seriesterminationcontrol(16'b0000000000000000),
        .devoe(devoe),
        .o(\wb_err_o~output_o ),
        .obar());
// synopsys translate_off
defparam \wb_err_o~output .bus_hold = "false";
defparam \wb_err_o~output .open_drain_output = "false";
// synopsys translate_on

// Location: IOOBUF_X38_Y0_N2
cycloneiv_io_obuf \wb_rty_o~output (
        .i(\wb_interface|rty~q ),
        .oe(vcc),
        .seriesterminationcontrol(16'b0000000000000000),
        .devoe(devoe),
        .o(\wb_rty_o~output_o ),
        .obar());
// synopsys translate_off
defparam \wb_rty_o~output .bus_hold = "false";
defparam \wb_rty_o~output .open_drain_output = "false";
// synopsys translate_on

// Location: IOIBUF_X36_Y0_N8
cycloneiv_io_ibuf \wb_adr_i[0]~input (
        .i(wb_adr_i[0]),
        .ibar(gnd),
        .o(\wb_adr_i[0]~input_o ));
// synopsys translate_off
defparam \wb_adr_i[0]~input .bus_hold = "false";
defparam \wb_adr_i[0]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: IOIBUF_X46_Y0_N1
cycloneiv_io_ibuf \wb_adr_i[1]~input (
        .i(wb_adr_i[1]),
        .ibar(gnd),
        .o(\wb_adr_i[1]~input_o ));
// synopsys translate_off
defparam \wb_adr_i[1]~input .bus_hold = "false";
defparam \wb_adr_i[1]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: IOIBUF_X52_Y15_N8
cycloneiv_io_ibuf \wb_adr_i[2]~input (
        .i(wb_adr_i[2]),
        .ibar(gnd),
        .o(\wb_adr_i[2]~input_o ));
// synopsys translate_off
defparam \wb_adr_i[2]~input .bus_hold = "false";
defparam \wb_adr_i[2]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: IOIBUF_X52_Y16_N1
cycloneiv_io_ibuf \wb_adr_i[5]~input (
        .i(wb_adr_i[5]),
        .ibar(gnd),
        .o(\wb_adr_i[5]~input_o ));
// synopsys translate_off
defparam \wb_adr_i[5]~input .bus_hold = "false";
defparam \wb_adr_i[5]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: IOIBUF_X52_Y15_N1
cycloneiv_io_ibuf \wb_adr_i[3]~input (
        .i(wb_adr_i[3]),
        .ibar(gnd),
        .o(\wb_adr_i[3]~input_o ));
// synopsys translate_off
defparam \wb_adr_i[3]~input .bus_hold = "false";
defparam \wb_adr_i[3]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: IOIBUF_X52_Y18_N8
cycloneiv_io_ibuf \wb_adr_i[4]~input (
        .i(wb_adr_i[4]),
        .ibar(gnd),
        .o(\wb_adr_i[4]~input_o ));
// synopsys translate_off
defparam \wb_adr_i[4]~input .bus_hold = "false";
defparam \wb_adr_i[4]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: LCCOMB_X51_Y15_N24
cycloneiv_lcell_comb \wb_interface|Equal2~0 (
// Equation(s):
// \wb_interface|Equal2~0_combout  = (!\wb_adr_i[2]~input_o  & (!\wb_adr_i[5]~input_o  & (!\wb_adr_i[3]~input_o  & !\wb_adr_i[4]~input_o )))

        .dataa(\wb_adr_i[2]~input_o ),
        .datab(\wb_adr_i[5]~input_o ),
        .datac(\wb_adr_i[3]~input_o ),
        .datad(\wb_adr_i[4]~input_o ),
        .cin(gnd),
        .combout(\wb_interface|Equal2~0_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|Equal2~0 .lut_mask = 16'h0001;
defparam \wb_interface|Equal2~0 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X31_Y3_N26
cycloneiv_lcell_comb \wb_interface|Equal1~0 (
// Equation(s):
// \wb_interface|Equal1~0_combout  = (\wb_adr_i[0]~input_o  & (\wb_adr_i[1]~input_o  & \wb_interface|Equal2~0_combout ))

        .dataa(\wb_adr_i[0]~input_o ),
        .datab(gnd),
        .datac(\wb_adr_i[1]~input_o ),
        .datad(\wb_interface|Equal2~0_combout ),
        .cin(gnd),
        .combout(\wb_interface|Equal1~0_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|Equal1~0 .lut_mask = 16'hA000;
defparam \wb_interface|Equal1~0 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: IOIBUF_X27_Y0_N15
cycloneiv_io_ibuf \wb_clk_i~input (
        .i(wb_clk_i),
        .ibar(gnd),
        .o(\wb_clk_i~input_o ));
// synopsys translate_off
defparam \wb_clk_i~input .bus_hold = "false";
defparam \wb_clk_i~input .simulate_z_as = "z";
// synopsys translate_on

// Location: CLKCTRL_G17
cycloneiv_clkctrl \wb_clk_i~inputclkctrl (
        .ena(vcc),
        .inclk({vcc,vcc,vcc,\wb_clk_i~input_o }),
        .clkselect(2'b00),
        .devclrn(devclrn),
        .devpor(devpor),
        .outclk(\wb_clk_i~inputclkctrl_outclk ));
// synopsys translate_off
defparam \wb_clk_i~inputclkctrl .clock_type = "global clock";
defparam \wb_clk_i~inputclkctrl .ena_register_mode = "none";
// synopsys translate_on

// Location: IOIBUF_X25_Y0_N1
cycloneiv_io_ibuf \wb_dat_i[0]~input (
        .i(wb_dat_i[0]),
        .ibar(gnd),
        .o(\wb_dat_i[0]~input_o ));
// synopsys translate_off
defparam \wb_dat_i[0]~input .bus_hold = "false";
defparam \wb_dat_i[0]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: IOIBUF_X27_Y0_N22
cycloneiv_io_ibuf \wb_rst_i~input (
        .i(wb_rst_i),
        .ibar(gnd),
        .o(\wb_rst_i~input_o ));
// synopsys translate_off
defparam \wb_rst_i~input .bus_hold = "false";
defparam \wb_rst_i~input .simulate_z_as = "z";
// synopsys translate_on

// Location: CLKCTRL_G19
cycloneiv_clkctrl \wb_rst_i~inputclkctrl (
        .ena(vcc),
        .inclk({vcc,vcc,vcc,\wb_rst_i~input_o }),
        .clkselect(2'b00),
        .devclrn(devclrn),
        .devpor(devpor),
        .outclk(\wb_rst_i~inputclkctrl_outclk ));
// synopsys translate_off
defparam \wb_rst_i~inputclkctrl .clock_type = "global clock";
defparam \wb_rst_i~inputclkctrl .ena_register_mode = "none";
// synopsys translate_on

// Location: LCCOMB_X30_Y2_N18
cycloneiv_lcell_comb \bitCountReg[0]~8 (
// Equation(s):
// \bitCountReg[0]~8_combout  = bitCountReg[0] $ (VCC)
// \bitCountReg[0]~9  = CARRY(bitCountReg[0])

        .dataa(bitCountReg[0]),
        .datab(gnd),
        .datac(gnd),
        .datad(vcc),
        .cin(gnd),
        .combout(\bitCountReg[0]~8_combout ),
        .cout(\bitCountReg[0]~9 ));
// synopsys translate_off
defparam \bitCountReg[0]~8 .lut_mask = 16'h55AA;
defparam \bitCountReg[0]~8 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X26_Y4_N0
cycloneiv_lcell_comb \pulseCnt[0]~32 (
// Equation(s):
// \pulseCnt[0]~32_combout  = pulseCnt[0] $ (VCC)
// \pulseCnt[0]~33  = CARRY(pulseCnt[0])

        .dataa(gnd),
        .datab(pulseCnt[0]),
        .datac(gnd),
        .datad(vcc),
        .cin(gnd),
        .combout(\pulseCnt[0]~32_combout ),
        .cout(\pulseCnt[0]~33 ));
// synopsys translate_off
defparam \pulseCnt[0]~32 .lut_mask = 16'h33CC;
defparam \pulseCnt[0]~32 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: IOIBUF_X31_Y0_N1
cycloneiv_io_ibuf \wb_dat_i[5]~input (
        .i(wb_dat_i[5]),
        .ibar(gnd),
        .o(\wb_dat_i[5]~input_o ));
// synopsys translate_off
defparam \wb_dat_i[5]~input .bus_hold = "false";
defparam \wb_dat_i[5]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: LCCOMB_X31_Y3_N22
cycloneiv_lcell_comb \wb_interface|Equal2~1 (
// Equation(s):
// \wb_interface|Equal2~1_combout  = (!\wb_adr_i[0]~input_o  & (\wb_adr_i[1]~input_o  & \wb_interface|Equal2~0_combout ))

        .dataa(\wb_adr_i[0]~input_o ),
        .datab(gnd),
        .datac(\wb_adr_i[1]~input_o ),
        .datad(\wb_interface|Equal2~0_combout ),
        .cin(gnd),
        .combout(\wb_interface|Equal2~1_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|Equal2~1 .lut_mask = 16'h5000;
defparam \wb_interface|Equal2~1 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: IOIBUF_X43_Y0_N8
cycloneiv_io_ibuf \wb_stb_i~input (
        .i(wb_stb_i),
        .ibar(gnd),
        .o(\wb_stb_i~input_o ));
// synopsys translate_off
defparam \wb_stb_i~input .bus_hold = "false";
defparam \wb_stb_i~input .simulate_z_as = "z";
// synopsys translate_on

// Location: IOIBUF_X50_Y0_N1
cycloneiv_io_ibuf \wb_cyc_i~input (
        .i(wb_cyc_i),
        .ibar(gnd),
        .o(\wb_cyc_i~input_o ));
// synopsys translate_off
defparam \wb_cyc_i~input .bus_hold = "false";
defparam \wb_cyc_i~input .simulate_z_as = "z";
// synopsys translate_on

// Location: LCCOMB_X31_Y3_N0
cycloneiv_lcell_comb \wb_interface|wb_dat_o~1 (
// Equation(s):
// \wb_interface|wb_dat_o~1_combout  = (\wb_stb_i~input_o  & \wb_cyc_i~input_o )

        .dataa(gnd),
        .datab(\wb_stb_i~input_o ),
        .datac(gnd),
        .datad(\wb_cyc_i~input_o ),
        .cin(gnd),
        .combout(\wb_interface|wb_dat_o~1_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|wb_dat_o~1 .lut_mask = 16'hCC00;
defparam \wb_interface|wb_dat_o~1 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: IOIBUF_X34_Y0_N8
cycloneiv_io_ibuf \wb_we_i~input (
        .i(wb_we_i),
        .ibar(gnd),
        .o(\wb_we_i~input_o ));
// synopsys translate_off
defparam \wb_we_i~input .bus_hold = "false";
defparam \wb_we_i~input .simulate_z_as = "z";
// synopsys translate_on

// Location: LCCOMB_X28_Y4_N30
cycloneiv_lcell_comb \wb_interface|always4~0 (
// Equation(s):
// \wb_interface|always4~0_combout  = (\wb_interface|Equal2~1_combout  & (!\lock_cfg~q  & (\wb_interface|wb_dat_o~1_combout  & \wb_we_i~input_o )))

        .dataa(\wb_interface|Equal2~1_combout ),
        .datab(\lock_cfg~q ),
        .datac(\wb_interface|wb_dat_o~1_combout ),
        .datad(\wb_we_i~input_o ),
        .cin(gnd),
        .combout(\wb_interface|always4~0_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|always4~0 .lut_mask = 16'h2000;
defparam \wb_interface|always4~0 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X27_Y4_N13
dffeas \wb_interface|p2p[5] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[5]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always4~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|p2p [5]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|p2p[5] .is_wysiwyg = "true";
defparam \wb_interface|p2p[5] .power_up = "low";
// synopsys translate_on

// Location: IOIBUF_X41_Y0_N8
cycloneiv_io_ibuf \wb_dat_i[9]~input (
        .i(wb_dat_i[9]),
        .ibar(gnd),
        .o(\wb_dat_i[9]~input_o ));
// synopsys translate_off
defparam \wb_dat_i[9]~input .bus_hold = "false";
defparam \wb_dat_i[9]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: FF_X27_Y4_N7
dffeas \wb_interface|p2p[9] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[9]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always4~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|p2p [9]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|p2p[9] .is_wysiwyg = "true";
defparam \wb_interface|p2p[9] .power_up = "low";
// synopsys translate_on

// Location: IOIBUF_X43_Y0_N1
cycloneiv_io_ibuf \wb_dat_i[8]~input (
        .i(wb_dat_i[8]),
        .ibar(gnd),
        .o(\wb_dat_i[8]~input_o ));
// synopsys translate_off
defparam \wb_dat_i[8]~input .bus_hold = "false";
defparam \wb_dat_i[8]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: FF_X27_Y4_N5
dffeas \wb_interface|p2p[8] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[8]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always4~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|p2p [8]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|p2p[8] .is_wysiwyg = "true";
defparam \wb_interface|p2p[8] .power_up = "low";
// synopsys translate_on

// Location: IOIBUF_X31_Y0_N15
cycloneiv_io_ibuf \wb_dat_i[7]~input (
        .i(wb_dat_i[7]),
        .ibar(gnd),
        .o(\wb_dat_i[7]~input_o ));
// synopsys translate_off
defparam \wb_dat_i[7]~input .bus_hold = "false";
defparam \wb_dat_i[7]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: FF_X27_Y4_N1
dffeas \wb_interface|p2p[7] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[7]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always4~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|p2p [7]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|p2p[7] .is_wysiwyg = "true";
defparam \wb_interface|p2p[7] .power_up = "low";
// synopsys translate_on

// Location: IOIBUF_X29_Y41_N8
cycloneiv_io_ibuf \wb_dat_i[6]~input (
        .i(wb_dat_i[6]),
        .ibar(gnd),
        .o(\wb_dat_i[6]~input_o ));
// synopsys translate_off
defparam \wb_dat_i[6]~input .bus_hold = "false";
defparam \wb_dat_i[6]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: FF_X27_Y4_N25
dffeas \wb_interface|p2p[6] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[6]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always4~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|p2p [6]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|p2p[6] .is_wysiwyg = "true";
defparam \wb_interface|p2p[6] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X27_Y4_N0
cycloneiv_lcell_comb \Equal1~10 (
// Equation(s):
// \Equal1~10_combout  = (!\wb_interface|p2p [9] & (!\wb_interface|p2p [8] & (!\wb_interface|p2p [7] & !\wb_interface|p2p [6])))

        .dataa(\wb_interface|p2p [9]),
        .datab(\wb_interface|p2p [8]),
        .datac(\wb_interface|p2p [7]),
        .datad(\wb_interface|p2p [6]),
        .cin(gnd),
        .combout(\Equal1~10_combout ),
        .cout());
// synopsys translate_off
defparam \Equal1~10 .lut_mask = 16'h0001;
defparam \Equal1~10 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X27_Y4_N12
cycloneiv_lcell_comb \Equal1~11 (
// Equation(s):
// \Equal1~11_combout  = (!\wb_interface|p2p [5] & \Equal1~10_combout )

        .dataa(gnd),
        .datab(gnd),
        .datac(\wb_interface|p2p [5]),
        .datad(\Equal1~10_combout ),
        .cin(gnd),
        .combout(\Equal1~11_combout ),
        .cout());
// synopsys translate_off
defparam \Equal1~11 .lut_mask = 16'h0F00;
defparam \Equal1~11 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: IOIBUF_X52_Y18_N1
cycloneiv_io_ibuf \wb_dat_i[20]~input (
        .i(wb_dat_i[20]),
        .ibar(gnd),
        .o(\wb_dat_i[20]~input_o ));
// synopsys translate_off
defparam \wb_dat_i[20]~input .bus_hold = "false";
defparam \wb_dat_i[20]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: FF_X25_Y3_N23
dffeas \wb_interface|p2p[20] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[20]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always4~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|p2p [20]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|p2p[20] .is_wysiwyg = "true";
defparam \wb_interface|p2p[20] .power_up = "low";
// synopsys translate_on

// Location: IOIBUF_X50_Y0_N8
cycloneiv_io_ibuf \wb_dat_i[18]~input (
        .i(wb_dat_i[18]),
        .ibar(gnd),
        .o(\wb_dat_i[18]~input_o ));
// synopsys translate_off
defparam \wb_dat_i[18]~input .bus_hold = "false";
defparam \wb_dat_i[18]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: FF_X25_Y3_N19
dffeas \wb_interface|p2p[18] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[18]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always4~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|p2p [18]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|p2p[18] .is_wysiwyg = "true";
defparam \wb_interface|p2p[18] .power_up = "low";
// synopsys translate_on

// Location: IOIBUF_X52_Y11_N8
cycloneiv_io_ibuf \wb_dat_i[19]~input (
        .i(wb_dat_i[19]),
        .ibar(gnd),
        .o(\wb_dat_i[19]~input_o ));
// synopsys translate_off
defparam \wb_dat_i[19]~input .bus_hold = "false";
defparam \wb_dat_i[19]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: FF_X25_Y3_N27
dffeas \wb_interface|p2p[19] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[19]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always4~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|p2p [19]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|p2p[19] .is_wysiwyg = "true";
defparam \wb_interface|p2p[19] .power_up = "low";
// synopsys translate_on

// Location: IOIBUF_X52_Y13_N8
cycloneiv_io_ibuf \wb_dat_i[21]~input (
        .i(wb_dat_i[21]),
        .ibar(gnd),
        .o(\wb_dat_i[21]~input_o ));
// synopsys translate_off
defparam \wb_dat_i[21]~input .bus_hold = "false";
defparam \wb_dat_i[21]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: FF_X25_Y3_N3
dffeas \wb_interface|p2p[21] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[21]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always4~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|p2p [21]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|p2p[21] .is_wysiwyg = "true";
defparam \wb_interface|p2p[21] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X25_Y3_N26
cycloneiv_lcell_comb \Equal1~6 (
// Equation(s):
// \Equal1~6_combout  = (!\wb_interface|p2p [20] & (!\wb_interface|p2p [18] & (!\wb_interface|p2p [19] & !\wb_interface|p2p [21])))

        .dataa(\wb_interface|p2p [20]),
        .datab(\wb_interface|p2p [18]),
        .datac(\wb_interface|p2p [19]),
        .datad(\wb_interface|p2p [21]),
        .cin(gnd),
        .combout(\Equal1~6_combout ),
        .cout());
// synopsys translate_off
defparam \Equal1~6 .lut_mask = 16'h0001;
defparam \Equal1~6 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: IOIBUF_X7_Y0_N22
cycloneiv_io_ibuf \wb_dat_i[16]~input (
        .i(wb_dat_i[16]),
        .ibar(gnd),
        .o(\wb_dat_i[16]~input_o ));
// synopsys translate_off
defparam \wb_dat_i[16]~input .bus_hold = "false";
defparam \wb_dat_i[16]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: FF_X27_Y3_N31
dffeas \wb_interface|p2p[16] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[16]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always4~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|p2p [16]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|p2p[16] .is_wysiwyg = "true";
defparam \wb_interface|p2p[16] .power_up = "low";
// synopsys translate_on

// Location: IOIBUF_X52_Y9_N8
cycloneiv_io_ibuf \wb_dat_i[17]~input (
        .i(wb_dat_i[17]),
        .ibar(gnd),
        .o(\wb_dat_i[17]~input_o ));
// synopsys translate_off
defparam \wb_dat_i[17]~input .bus_hold = "false";
defparam \wb_dat_i[17]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: FF_X27_Y3_N3
dffeas \wb_interface|p2p[17] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[17]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always4~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|p2p [17]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|p2p[17] .is_wysiwyg = "true";
defparam \wb_interface|p2p[17] .power_up = "low";
// synopsys translate_on

// Location: IOIBUF_X46_Y0_N8
cycloneiv_io_ibuf \wb_dat_i[15]~input (
        .i(wb_dat_i[15]),
        .ibar(gnd),
        .o(\wb_dat_i[15]~input_o ));
// synopsys translate_off
defparam \wb_dat_i[15]~input .bus_hold = "false";
defparam \wb_dat_i[15]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: FF_X27_Y3_N15
dffeas \wb_interface|p2p[15] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[15]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always4~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|p2p [15]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|p2p[15] .is_wysiwyg = "true";
defparam \wb_interface|p2p[15] .power_up = "low";
// synopsys translate_on

// Location: IOIBUF_X52_Y13_N1
cycloneiv_io_ibuf \wb_dat_i[14]~input (
        .i(wb_dat_i[14]),
        .ibar(gnd),
        .o(\wb_dat_i[14]~input_o ));
// synopsys translate_off
defparam \wb_dat_i[14]~input .bus_hold = "false";
defparam \wb_dat_i[14]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: FF_X27_Y3_N11
dffeas \wb_interface|p2p[14] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[14]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always4~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|p2p [14]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|p2p[14] .is_wysiwyg = "true";
defparam \wb_interface|p2p[14] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X27_Y3_N14
cycloneiv_lcell_comb \Equal1~7 (
// Equation(s):
// \Equal1~7_combout  = (!\wb_interface|p2p [16] & (!\wb_interface|p2p [17] & (!\wb_interface|p2p [15] & !\wb_interface|p2p [14])))

        .dataa(\wb_interface|p2p [16]),
        .datab(\wb_interface|p2p [17]),
        .datac(\wb_interface|p2p [15]),
        .datad(\wb_interface|p2p [14]),
        .cin(gnd),
        .combout(\Equal1~7_combout ),
        .cout());
// synopsys translate_off
defparam \Equal1~7 .lut_mask = 16'h0001;
defparam \Equal1~7 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: IOIBUF_X52_Y12_N8
cycloneiv_io_ibuf \wb_dat_i[13]~input (
        .i(wb_dat_i[13]),
        .ibar(gnd),
        .o(\wb_dat_i[13]~input_o ));
// synopsys translate_off
defparam \wb_dat_i[13]~input .bus_hold = "false";
defparam \wb_dat_i[13]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: LCCOMB_X27_Y3_N26
cycloneiv_lcell_comb \wb_interface|p2p[13]~feeder (
// Equation(s):
// \wb_interface|p2p[13]~feeder_combout  = \wb_dat_i[13]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[13]~input_o ),
        .cin(gnd),
        .combout(\wb_interface|p2p[13]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|p2p[13]~feeder .lut_mask = 16'hFF00;
defparam \wb_interface|p2p[13]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X27_Y3_N27
dffeas \wb_interface|p2p[13] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\wb_interface|p2p[13]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\wb_interface|always4~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|p2p [13]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|p2p[13] .is_wysiwyg = "true";
defparam \wb_interface|p2p[13] .power_up = "low";
// synopsys translate_on

// Location: IOIBUF_X52_Y11_N1
cycloneiv_io_ibuf \wb_dat_i[10]~input (
        .i(wb_dat_i[10]),
        .ibar(gnd),
        .o(\wb_dat_i[10]~input_o ));
// synopsys translate_off
defparam \wb_dat_i[10]~input .bus_hold = "false";
defparam \wb_dat_i[10]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: FF_X27_Y3_N29
dffeas \wb_interface|p2p[10] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[10]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always4~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|p2p [10]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|p2p[10] .is_wysiwyg = "true";
defparam \wb_interface|p2p[10] .power_up = "low";
// synopsys translate_on

// Location: IOIBUF_X52_Y9_N1
cycloneiv_io_ibuf \wb_dat_i[11]~input (
        .i(wb_dat_i[11]),
        .ibar(gnd),
        .o(\wb_dat_i[11]~input_o ));
// synopsys translate_off
defparam \wb_dat_i[11]~input .bus_hold = "false";
defparam \wb_dat_i[11]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: FF_X27_Y3_N9
dffeas \wb_interface|p2p[11] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[11]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always4~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|p2p [11]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|p2p[11] .is_wysiwyg = "true";
defparam \wb_interface|p2p[11] .power_up = "low";
// synopsys translate_on

// Location: IOIBUF_X48_Y0_N8
cycloneiv_io_ibuf \wb_dat_i[12]~input (
        .i(wb_dat_i[12]),
        .ibar(gnd),
        .o(\wb_dat_i[12]~input_o ));
// synopsys translate_off
defparam \wb_dat_i[12]~input .bus_hold = "false";
defparam \wb_dat_i[12]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: FF_X25_Y3_N17
dffeas \wb_interface|p2p[12] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[12]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always4~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|p2p [12]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|p2p[12] .is_wysiwyg = "true";
defparam \wb_interface|p2p[12] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X27_Y3_N8
cycloneiv_lcell_comb \Equal1~8 (
// Equation(s):
// \Equal1~8_combout  = (!\wb_interface|p2p [13] & (!\wb_interface|p2p [10] & (!\wb_interface|p2p [11] & !\wb_interface|p2p [12])))

        .dataa(\wb_interface|p2p [13]),
        .datab(\wb_interface|p2p [10]),
        .datac(\wb_interface|p2p [11]),
        .datad(\wb_interface|p2p [12]),
        .cin(gnd),
        .combout(\Equal1~8_combout ),
        .cout());
// synopsys translate_off
defparam \Equal1~8 .lut_mask = 16'h0001;
defparam \Equal1~8 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: IOIBUF_X7_Y0_N8
cycloneiv_io_ibuf \wb_dat_i[24]~input (
        .i(wb_dat_i[24]),
        .ibar(gnd),
        .o(\wb_dat_i[24]~input_o ));
// synopsys translate_off
defparam \wb_dat_i[24]~input .bus_hold = "false";
defparam \wb_dat_i[24]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: FF_X24_Y3_N23
dffeas \wb_interface|p2p[24] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[24]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always4~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|p2p [24]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|p2p[24] .is_wysiwyg = "true";
defparam \wb_interface|p2p[24] .power_up = "low";
// synopsys translate_on

// Location: IOIBUF_X25_Y0_N8
cycloneiv_io_ibuf \wb_dat_i[22]~input (
        .i(wb_dat_i[22]),
        .ibar(gnd),
        .o(\wb_dat_i[22]~input_o ));
// synopsys translate_off
defparam \wb_dat_i[22]~input .bus_hold = "false";
defparam \wb_dat_i[22]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: LCCOMB_X24_Y3_N28
cycloneiv_lcell_comb \wb_interface|p2p[22]~feeder (
// Equation(s):
// \wb_interface|p2p[22]~feeder_combout  = \wb_dat_i[22]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[22]~input_o ),
        .cin(gnd),
        .combout(\wb_interface|p2p[22]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|p2p[22]~feeder .lut_mask = 16'hFF00;
defparam \wb_interface|p2p[22]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X24_Y3_N29
dffeas \wb_interface|p2p[22] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\wb_interface|p2p[22]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\wb_interface|always4~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|p2p [22]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|p2p[22] .is_wysiwyg = "true";
defparam \wb_interface|p2p[22] .power_up = "low";
// synopsys translate_on

// Location: IOIBUF_X21_Y0_N1
cycloneiv_io_ibuf \wb_dat_i[23]~input (
        .i(wb_dat_i[23]),
        .ibar(gnd),
        .o(\wb_dat_i[23]~input_o ));
// synopsys translate_off
defparam \wb_dat_i[23]~input .bus_hold = "false";
defparam \wb_dat_i[23]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: LCCOMB_X24_Y3_N8
cycloneiv_lcell_comb \wb_interface|p2p[23]~feeder (
// Equation(s):
// \wb_interface|p2p[23]~feeder_combout  = \wb_dat_i[23]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[23]~input_o ),
        .cin(gnd),
        .combout(\wb_interface|p2p[23]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|p2p[23]~feeder .lut_mask = 16'hFF00;
defparam \wb_interface|p2p[23]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X24_Y3_N9
dffeas \wb_interface|p2p[23] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\wb_interface|p2p[23]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\wb_interface|always4~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|p2p [23]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|p2p[23] .is_wysiwyg = "true";
defparam \wb_interface|p2p[23] .power_up = "low";
// synopsys translate_on

// Location: IOIBUF_X7_Y0_N15
cycloneiv_io_ibuf \wb_dat_i[25]~input (
        .i(wb_dat_i[25]),
        .ibar(gnd),
        .o(\wb_dat_i[25]~input_o ));
// synopsys translate_off
defparam \wb_dat_i[25]~input .bus_hold = "false";
defparam \wb_dat_i[25]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: LCCOMB_X24_Y3_N12
cycloneiv_lcell_comb \wb_interface|p2p[25]~feeder (
// Equation(s):
// \wb_interface|p2p[25]~feeder_combout  = \wb_dat_i[25]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[25]~input_o ),
        .cin(gnd),
        .combout(\wb_interface|p2p[25]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|p2p[25]~feeder .lut_mask = 16'hFF00;
defparam \wb_interface|p2p[25]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X24_Y3_N13
dffeas \wb_interface|p2p[25] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\wb_interface|p2p[25]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\wb_interface|always4~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|p2p [25]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|p2p[25] .is_wysiwyg = "true";
defparam \wb_interface|p2p[25] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X24_Y3_N10
cycloneiv_lcell_comb \Equal1~5 (
// Equation(s):
// \Equal1~5_combout  = (!\wb_interface|p2p [24] & (!\wb_interface|p2p [22] & (!\wb_interface|p2p [23] & !\wb_interface|p2p [25])))

        .dataa(\wb_interface|p2p [24]),
        .datab(\wb_interface|p2p [22]),
        .datac(\wb_interface|p2p [23]),
        .datad(\wb_interface|p2p [25]),
        .cin(gnd),
        .combout(\Equal1~5_combout ),
        .cout());
// synopsys translate_off
defparam \Equal1~5 .lut_mask = 16'h0001;
defparam \Equal1~5 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X27_Y3_N6
cycloneiv_lcell_comb \Equal1~9 (
// Equation(s):
// \Equal1~9_combout  = (\Equal1~6_combout  & (\Equal1~7_combout  & (\Equal1~8_combout  & \Equal1~5_combout )))

        .dataa(\Equal1~6_combout ),
        .datab(\Equal1~7_combout ),
        .datac(\Equal1~8_combout ),
        .datad(\Equal1~5_combout ),
        .cin(gnd),
        .combout(\Equal1~9_combout ),
        .cout());
// synopsys translate_off
defparam \Equal1~9 .lut_mask = 16'h8000;
defparam \Equal1~9 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: IOIBUF_X34_Y0_N1
cycloneiv_io_ibuf \wb_dat_i[28]~input (
        .i(wb_dat_i[28]),
        .ibar(gnd),
        .o(\wb_dat_i[28]~input_o ));
// synopsys translate_off
defparam \wb_dat_i[28]~input .bus_hold = "false";
defparam \wb_dat_i[28]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: FF_X29_Y3_N23
dffeas \wb_interface|p2p[28] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[28]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always4~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|p2p [28]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|p2p[28] .is_wysiwyg = "true";
defparam \wb_interface|p2p[28] .power_up = "low";
// synopsys translate_on

// Location: IOIBUF_X41_Y0_N22
cycloneiv_io_ibuf \wb_dat_i[27]~input (
        .i(wb_dat_i[27]),
        .ibar(gnd),
        .o(\wb_dat_i[27]~input_o ));
// synopsys translate_off
defparam \wb_dat_i[27]~input .bus_hold = "false";
defparam \wb_dat_i[27]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: FF_X29_Y3_N3
dffeas \wb_interface|p2p[27] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[27]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always4~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|p2p [27]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|p2p[27] .is_wysiwyg = "true";
defparam \wb_interface|p2p[27] .power_up = "low";
// synopsys translate_on

// Location: IOIBUF_X41_Y0_N1
cycloneiv_io_ibuf \wb_dat_i[26]~input (
        .i(wb_dat_i[26]),
        .ibar(gnd),
        .o(\wb_dat_i[26]~input_o ));
// synopsys translate_off
defparam \wb_dat_i[26]~input .bus_hold = "false";
defparam \wb_dat_i[26]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: FF_X29_Y3_N15
dffeas \wb_interface|p2p[26] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[26]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always4~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|p2p [26]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|p2p[26] .is_wysiwyg = "true";
defparam \wb_interface|p2p[26] .power_up = "low";
// synopsys translate_on

// Location: IOIBUF_X41_Y0_N15
cycloneiv_io_ibuf \wb_dat_i[29]~input (
        .i(wb_dat_i[29]),
        .ibar(gnd),
        .o(\wb_dat_i[29]~input_o ));
// synopsys translate_off
defparam \wb_dat_i[29]~input .bus_hold = "false";
defparam \wb_dat_i[29]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: FF_X29_Y3_N25
dffeas \wb_interface|p2p[29] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[29]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always4~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|p2p [29]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|p2p[29] .is_wysiwyg = "true";
defparam \wb_interface|p2p[29] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X29_Y3_N20
cycloneiv_lcell_comb \Equal1~3 (
// Equation(s):
// \Equal1~3_combout  = (!\wb_interface|p2p [28] & (!\wb_interface|p2p [27] & (!\wb_interface|p2p [26] & !\wb_interface|p2p [29])))

        .dataa(\wb_interface|p2p [28]),
        .datab(\wb_interface|p2p [27]),
        .datac(\wb_interface|p2p [26]),
        .datad(\wb_interface|p2p [29]),
        .cin(gnd),
        .combout(\Equal1~3_combout ),
        .cout());
// synopsys translate_off
defparam \Equal1~3 .lut_mask = 16'h0001;
defparam \Equal1~3 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: IOIBUF_X52_Y16_N8
cycloneiv_io_ibuf \wb_dat_i[31]~input (
        .i(wb_dat_i[31]),
        .ibar(gnd),
        .o(\wb_dat_i[31]~input_o ));
// synopsys translate_off
defparam \wb_dat_i[31]~input .bus_hold = "false";
defparam \wb_dat_i[31]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: FF_X27_Y4_N27
dffeas \wb_interface|p2p[31] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[31]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always4~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|p2p [31]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|p2p[31] .is_wysiwyg = "true";
defparam \wb_interface|p2p[31] .power_up = "low";
// synopsys translate_on

// Location: IOIBUF_X10_Y0_N8
cycloneiv_io_ibuf \wb_dat_i[4]~input (
        .i(wb_dat_i[4]),
        .ibar(gnd),
        .o(\wb_dat_i[4]~input_o ));
// synopsys translate_off
defparam \wb_dat_i[4]~input .bus_hold = "false";
defparam \wb_dat_i[4]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: FF_X27_Y4_N9
dffeas \wb_interface|p2p[4] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[4]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always4~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|p2p [4]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|p2p[4] .is_wysiwyg = "true";
defparam \wb_interface|p2p[4] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X28_Y4_N12
cycloneiv_lcell_comb \p2pCnt[0]~5 (
// Equation(s):
// \p2pCnt[0]~5_combout  = p2pCnt[0] $ (VCC)
// \p2pCnt[0]~6  = CARRY(p2pCnt[0])

        .dataa(p2pCnt[0]),
        .datab(gnd),
        .datac(gnd),
        .datad(vcc),
        .cin(gnd),
        .combout(\p2pCnt[0]~5_combout ),
        .cout(\p2pCnt[0]~6 ));
// synopsys translate_off
defparam \p2pCnt[0]~5 .lut_mask = 16'h55AA;
defparam \p2pCnt[0]~5 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X28_Y4_N13
dffeas \p2pCnt[0] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\p2pCnt[0]~5_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(!\state.101~q ),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(p2pCnt[0]),
        .prn(vcc));
// synopsys translate_off
defparam \p2pCnt[0] .is_wysiwyg = "true";
defparam \p2pCnt[0] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X28_Y4_N14
cycloneiv_lcell_comb \p2pCnt[1]~7 (
// Equation(s):
// \p2pCnt[1]~7_combout  = (p2pCnt[1] & (!\p2pCnt[0]~6 )) # (!p2pCnt[1] & ((\p2pCnt[0]~6 ) # (GND)))
// \p2pCnt[1]~8  = CARRY((!\p2pCnt[0]~6 ) # (!p2pCnt[1]))

        .dataa(gnd),
        .datab(p2pCnt[1]),
        .datac(gnd),
        .datad(vcc),
        .cin(\p2pCnt[0]~6 ),
        .combout(\p2pCnt[1]~7_combout ),
        .cout(\p2pCnt[1]~8 ));
// synopsys translate_off
defparam \p2pCnt[1]~7 .lut_mask = 16'h3C3F;
defparam \p2pCnt[1]~7 .sum_lutc_input = "cin";
// synopsys translate_on

// Location: FF_X28_Y4_N15
dffeas \p2pCnt[1] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\p2pCnt[1]~7_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(!\state.101~q ),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(p2pCnt[1]),
        .prn(vcc));
// synopsys translate_off
defparam \p2pCnt[1] .is_wysiwyg = "true";
defparam \p2pCnt[1] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X28_Y4_N16
cycloneiv_lcell_comb \p2pCnt[2]~9 (
// Equation(s):
// \p2pCnt[2]~9_combout  = (p2pCnt[2] & (\p2pCnt[1]~8  $ (GND))) # (!p2pCnt[2] & (!\p2pCnt[1]~8  & VCC))
// \p2pCnt[2]~10  = CARRY((p2pCnt[2] & !\p2pCnt[1]~8 ))

        .dataa(gnd),
        .datab(p2pCnt[2]),
        .datac(gnd),
        .datad(vcc),
        .cin(\p2pCnt[1]~8 ),
        .combout(\p2pCnt[2]~9_combout ),
        .cout(\p2pCnt[2]~10 ));
// synopsys translate_off
defparam \p2pCnt[2]~9 .lut_mask = 16'hC30C;
defparam \p2pCnt[2]~9 .sum_lutc_input = "cin";
// synopsys translate_on

// Location: FF_X28_Y4_N17
dffeas \p2pCnt[2] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\p2pCnt[2]~9_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(!\state.101~q ),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(p2pCnt[2]),
        .prn(vcc));
// synopsys translate_off
defparam \p2pCnt[2] .is_wysiwyg = "true";
defparam \p2pCnt[2] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X28_Y4_N18
cycloneiv_lcell_comb \p2pCnt[3]~11 (
// Equation(s):
// \p2pCnt[3]~11_combout  = (p2pCnt[3] & (!\p2pCnt[2]~10 )) # (!p2pCnt[3] & ((\p2pCnt[2]~10 ) # (GND)))
// \p2pCnt[3]~12  = CARRY((!\p2pCnt[2]~10 ) # (!p2pCnt[3]))

        .dataa(gnd),
        .datab(p2pCnt[3]),
        .datac(gnd),
        .datad(vcc),
        .cin(\p2pCnt[2]~10 ),
        .combout(\p2pCnt[3]~11_combout ),
        .cout(\p2pCnt[3]~12 ));
// synopsys translate_off
defparam \p2pCnt[3]~11 .lut_mask = 16'h3C3F;
defparam \p2pCnt[3]~11 .sum_lutc_input = "cin";
// synopsys translate_on

// Location: FF_X28_Y4_N19
dffeas \p2pCnt[3] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\p2pCnt[3]~11_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(!\state.101~q ),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(p2pCnt[3]),
        .prn(vcc));
// synopsys translate_off
defparam \p2pCnt[3] .is_wysiwyg = "true";
defparam \p2pCnt[3] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X28_Y4_N20
cycloneiv_lcell_comb \p2pCnt[4]~13 (
// Equation(s):
// \p2pCnt[4]~13_combout  = \p2pCnt[3]~12  $ (!p2pCnt[4])

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(p2pCnt[4]),
        .cin(\p2pCnt[3]~12 ),
        .combout(\p2pCnt[4]~13_combout ),
        .cout());
// synopsys translate_off
defparam \p2pCnt[4]~13 .lut_mask = 16'hF00F;
defparam \p2pCnt[4]~13 .sum_lutc_input = "cin";
// synopsys translate_on

// Location: FF_X28_Y4_N21
dffeas \p2pCnt[4] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\p2pCnt[4]~13_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(!\state.101~q ),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(p2pCnt[4]),
        .prn(vcc));
// synopsys translate_off
defparam \p2pCnt[4] .is_wysiwyg = "true";
defparam \p2pCnt[4] .power_up = "low";
// synopsys translate_on

// Location: IOIBUF_X7_Y0_N1
cycloneiv_io_ibuf \wb_dat_i[30]~input (
        .i(wb_dat_i[30]),
        .ibar(gnd),
        .o(\wb_dat_i[30]~input_o ));
// synopsys translate_off
defparam \wb_dat_i[30]~input .bus_hold = "false";
defparam \wb_dat_i[30]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: FF_X27_Y4_N23
dffeas \wb_interface|p2p[30] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[30]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always4~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|p2p [30]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|p2p[30] .is_wysiwyg = "true";
defparam \wb_interface|p2p[30] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X27_Y4_N18
cycloneiv_lcell_comb \Equal1~2 (
// Equation(s):
// \Equal1~2_combout  = (!\wb_interface|p2p [31] & (!\wb_interface|p2p [30] & (\wb_interface|p2p [4] $ (!p2pCnt[4]))))

        .dataa(\wb_interface|p2p [31]),
        .datab(\wb_interface|p2p [4]),
        .datac(p2pCnt[4]),
        .datad(\wb_interface|p2p [30]),
        .cin(gnd),
        .combout(\Equal1~2_combout ),
        .cout());
// synopsys translate_off
defparam \Equal1~2 .lut_mask = 16'h0041;
defparam \Equal1~2 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: IOIBUF_X29_Y0_N1
cycloneiv_io_ibuf \wb_dat_i[1]~input (
        .i(wb_dat_i[1]),
        .ibar(gnd),
        .o(\wb_dat_i[1]~input_o ));
// synopsys translate_off
defparam \wb_dat_i[1]~input .bus_hold = "false";
defparam \wb_dat_i[1]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: FF_X29_Y3_N27
dffeas \wb_interface|p2p[1] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[1]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always4~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|p2p [1]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|p2p[1] .is_wysiwyg = "true";
defparam \wb_interface|p2p[1] .power_up = "low";
// synopsys translate_on

// Location: FF_X29_Y3_N13
dffeas \wb_interface|p2p[0] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[0]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always4~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|p2p [0]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|p2p[0] .is_wysiwyg = "true";
defparam \wb_interface|p2p[0] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X29_Y3_N12
cycloneiv_lcell_comb \Equal1~0 (
// Equation(s):
// \Equal1~0_combout  = (p2pCnt[1] & (\wb_interface|p2p [1] & (\wb_interface|p2p [0] $ (!p2pCnt[0])))) # (!p2pCnt[1] & (!\wb_interface|p2p [1] & (\wb_interface|p2p [0] $ (!p2pCnt[0]))))

        .dataa(p2pCnt[1]),
        .datab(\wb_interface|p2p [1]),
        .datac(\wb_interface|p2p [0]),
        .datad(p2pCnt[0]),
        .cin(gnd),
        .combout(\Equal1~0_combout ),
        .cout());
// synopsys translate_off
defparam \Equal1~0 .lut_mask = 16'h9009;
defparam \Equal1~0 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: IOIBUF_X31_Y0_N8
cycloneiv_io_ibuf \wb_dat_i[3]~input (
        .i(wb_dat_i[3]),
        .ibar(gnd),
        .o(\wb_dat_i[3]~input_o ));
// synopsys translate_off
defparam \wb_dat_i[3]~input .bus_hold = "false";
defparam \wb_dat_i[3]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: FF_X29_Y3_N19
dffeas \wb_interface|p2p[3] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[3]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always4~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|p2p [3]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|p2p[3] .is_wysiwyg = "true";
defparam \wb_interface|p2p[3] .power_up = "low";
// synopsys translate_on

// Location: IOIBUF_X31_Y0_N22
cycloneiv_io_ibuf \wb_dat_i[2]~input (
        .i(wb_dat_i[2]),
        .ibar(gnd),
        .o(\wb_dat_i[2]~input_o ));
// synopsys translate_off
defparam \wb_dat_i[2]~input .bus_hold = "false";
defparam \wb_dat_i[2]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: FF_X29_Y3_N5
dffeas \wb_interface|p2p[2] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[2]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always4~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|p2p [2]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|p2p[2] .is_wysiwyg = "true";
defparam \wb_interface|p2p[2] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X29_Y3_N4
cycloneiv_lcell_comb \Equal1~1 (
// Equation(s):
// \Equal1~1_combout  = (\wb_interface|p2p [3] & (p2pCnt[3] & (p2pCnt[2] $ (!\wb_interface|p2p [2])))) # (!\wb_interface|p2p [3] & (!p2pCnt[3] & (p2pCnt[2] $ (!\wb_interface|p2p [2]))))

        .dataa(\wb_interface|p2p [3]),
        .datab(p2pCnt[2]),
        .datac(\wb_interface|p2p [2]),
        .datad(p2pCnt[3]),
        .cin(gnd),
        .combout(\Equal1~1_combout ),
        .cout());
// synopsys translate_off
defparam \Equal1~1 .lut_mask = 16'h8241;
defparam \Equal1~1 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X28_Y3_N16
cycloneiv_lcell_comb \Equal1~4 (
// Equation(s):
// \Equal1~4_combout  = (\Equal1~3_combout  & (\Equal1~2_combout  & (\Equal1~0_combout  & \Equal1~1_combout )))

        .dataa(\Equal1~3_combout ),
        .datab(\Equal1~2_combout ),
        .datac(\Equal1~0_combout ),
        .datad(\Equal1~1_combout ),
        .cin(gnd),
        .combout(\Equal1~4_combout ),
        .cout());
// synopsys translate_off
defparam \Equal1~4 .lut_mask = 16'h8000;
defparam \Equal1~4 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X28_Y3_N2
cycloneiv_lcell_comb \Equal1~12 (
// Equation(s):
// \Equal1~12_combout  = (\Equal1~10_combout  & (!\wb_interface|p2p [5] & (\Equal1~9_combout  & \Equal1~4_combout )))

        .dataa(\Equal1~10_combout ),
        .datab(\wb_interface|p2p [5]),
        .datac(\Equal1~9_combout ),
        .datad(\Equal1~4_combout ),
        .cin(gnd),
        .combout(\Equal1~12_combout ),
        .cout());
// synopsys translate_off
defparam \Equal1~12 .lut_mask = 16'h2000;
defparam \Equal1~12 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X28_Y3_N8
cycloneiv_lcell_comb \Selector3~3 (
// Equation(s):
// \Selector3~3_combout  = (\state.110~q ) # ((\state.001~q ) # ((\Selector3~2_combout  & !\Equal1~12_combout )))

        .dataa(\state.110~q ),
        .datab(\state.001~q ),
        .datac(\Selector3~2_combout ),
        .datad(\Equal1~12_combout ),
        .cin(gnd),
        .combout(\Selector3~3_combout ),
        .cout());
// synopsys translate_off
defparam \Selector3~3 .lut_mask = 16'hEEFE;
defparam \Selector3~3 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X28_Y3_N9
dffeas \state.101 (
        .clk(\wb_clk_i~inputclkctrl_outclk ),
        .d(\Selector3~3_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\state.101~q ),
        .prn(vcc));
// synopsys translate_off
defparam \state.101 .is_wysiwyg = "true";
defparam \state.101 .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X30_Y2_N20
cycloneiv_lcell_comb \bitCountReg[1]~10 (
// Equation(s):
// \bitCountReg[1]~10_combout  = (bitCountReg[1] & (!\bitCountReg[0]~9 )) # (!bitCountReg[1] & ((\bitCountReg[0]~9 ) # (GND)))
// \bitCountReg[1]~11  = CARRY((!\bitCountReg[0]~9 ) # (!bitCountReg[1]))

        .dataa(gnd),
        .datab(bitCountReg[1]),
        .datac(gnd),
        .datad(vcc),
        .cin(\bitCountReg[0]~9 ),
        .combout(\bitCountReg[1]~10_combout ),
        .cout(\bitCountReg[1]~11 ));
// synopsys translate_off
defparam \bitCountReg[1]~10 .lut_mask = 16'h3C3F;
defparam \bitCountReg[1]~10 .sum_lutc_input = "cin";
// synopsys translate_on

// Location: LCCOMB_X30_Y2_N22
cycloneiv_lcell_comb \bitCountReg[2]~12 (
// Equation(s):
// \bitCountReg[2]~12_combout  = (bitCountReg[2] & (\bitCountReg[1]~11  $ (GND))) # (!bitCountReg[2] & (!\bitCountReg[1]~11  & VCC))
// \bitCountReg[2]~13  = CARRY((bitCountReg[2] & !\bitCountReg[1]~11 ))

        .dataa(bitCountReg[2]),
        .datab(gnd),
        .datac(gnd),
        .datad(vcc),
        .cin(\bitCountReg[1]~11 ),
        .combout(\bitCountReg[2]~12_combout ),
        .cout(\bitCountReg[2]~13 ));
// synopsys translate_off
defparam \bitCountReg[2]~12 .lut_mask = 16'hA50A;
defparam \bitCountReg[2]~12 .sum_lutc_input = "cin";
// synopsys translate_on

// Location: LCCOMB_X30_Y2_N16
cycloneiv_lcell_comb \bitCountReg[3]~7 (
// Equation(s):
// \bitCountReg[3]~7_combout  = \state.001~q  $ (\state.110~q )

        .dataa(gnd),
        .datab(gnd),
        .datac(\state.001~q ),
        .datad(\state.110~q ),
        .cin(gnd),
        .combout(\bitCountReg[3]~7_combout ),
        .cout());
// synopsys translate_off
defparam \bitCountReg[3]~7 .lut_mask = 16'h0FF0;
defparam \bitCountReg[3]~7 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X30_Y2_N23
dffeas \bitCountReg[2] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\bitCountReg[2]~12_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(!\state.110~q ),
        .sload(gnd),
        .ena(\bitCountReg[3]~7_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(bitCountReg[2]),
        .prn(vcc));
// synopsys translate_off
defparam \bitCountReg[2] .is_wysiwyg = "true";
defparam \bitCountReg[2] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X30_Y2_N24
cycloneiv_lcell_comb \bitCountReg[3]~14 (
// Equation(s):
// \bitCountReg[3]~14_combout  = (bitCountReg[3] & (!\bitCountReg[2]~13 )) # (!bitCountReg[3] & ((\bitCountReg[2]~13 ) # (GND)))
// \bitCountReg[3]~15  = CARRY((!\bitCountReg[2]~13 ) # (!bitCountReg[3]))

        .dataa(gnd),
        .datab(bitCountReg[3]),
        .datac(gnd),
        .datad(vcc),
        .cin(\bitCountReg[2]~13 ),
        .combout(\bitCountReg[3]~14_combout ),
        .cout(\bitCountReg[3]~15 ));
// synopsys translate_off
defparam \bitCountReg[3]~14 .lut_mask = 16'h3C3F;
defparam \bitCountReg[3]~14 .sum_lutc_input = "cin";
// synopsys translate_on

// Location: FF_X30_Y2_N25
dffeas \bitCountReg[3] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\bitCountReg[3]~14_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(!\state.110~q ),
        .sload(gnd),
        .ena(\bitCountReg[3]~7_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(bitCountReg[3]),
        .prn(vcc));
// synopsys translate_off
defparam \bitCountReg[3] .is_wysiwyg = "true";
defparam \bitCountReg[3] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X30_Y2_N26
cycloneiv_lcell_comb \bitCountReg[4]~16 (
// Equation(s):
// \bitCountReg[4]~16_combout  = (bitCountReg[4] & (\bitCountReg[3]~15  $ (GND))) # (!bitCountReg[4] & (!\bitCountReg[3]~15  & VCC))
// \bitCountReg[4]~17  = CARRY((bitCountReg[4] & !\bitCountReg[3]~15 ))

        .dataa(bitCountReg[4]),
        .datab(gnd),
        .datac(gnd),
        .datad(vcc),
        .cin(\bitCountReg[3]~15 ),
        .combout(\bitCountReg[4]~16_combout ),
        .cout(\bitCountReg[4]~17 ));
// synopsys translate_off
defparam \bitCountReg[4]~16 .lut_mask = 16'hA50A;
defparam \bitCountReg[4]~16 .sum_lutc_input = "cin";
// synopsys translate_on

// Location: FF_X30_Y2_N27
dffeas \bitCountReg[4] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\bitCountReg[4]~16_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(!\state.110~q ),
        .sload(gnd),
        .ena(\bitCountReg[3]~7_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(bitCountReg[4]),
        .prn(vcc));
// synopsys translate_off
defparam \bitCountReg[4] .is_wysiwyg = "true";
defparam \bitCountReg[4] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X30_Y2_N28
cycloneiv_lcell_comb \bitCountReg[5]~18 (
// Equation(s):
// \bitCountReg[5]~18_combout  = (bitCountReg[5] & (!\bitCountReg[4]~17 )) # (!bitCountReg[5] & ((\bitCountReg[4]~17 ) # (GND)))
// \bitCountReg[5]~19  = CARRY((!\bitCountReg[4]~17 ) # (!bitCountReg[5]))

        .dataa(gnd),
        .datab(bitCountReg[5]),
        .datac(gnd),
        .datad(vcc),
        .cin(\bitCountReg[4]~17 ),
        .combout(\bitCountReg[5]~18_combout ),
        .cout(\bitCountReg[5]~19 ));
// synopsys translate_off
defparam \bitCountReg[5]~18 .lut_mask = 16'h3C3F;
defparam \bitCountReg[5]~18 .sum_lutc_input = "cin";
// synopsys translate_on

// Location: FF_X30_Y2_N29
dffeas \bitCountReg[5] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\bitCountReg[5]~18_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(!\state.110~q ),
        .sload(gnd),
        .ena(\bitCountReg[3]~7_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(bitCountReg[5]),
        .prn(vcc));
// synopsys translate_off
defparam \bitCountReg[5] .is_wysiwyg = "true";
defparam \bitCountReg[5] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X30_Y2_N30
cycloneiv_lcell_comb \bitCountReg[6]~20 (
// Equation(s):
// \bitCountReg[6]~20_combout  = bitCountReg[6] $ (!\bitCountReg[5]~19 )

        .dataa(bitCountReg[6]),
        .datab(gnd),
        .datac(gnd),
        .datad(gnd),
        .cin(\bitCountReg[5]~19 ),
        .combout(\bitCountReg[6]~20_combout ),
        .cout());
// synopsys translate_off
defparam \bitCountReg[6]~20 .lut_mask = 16'hA5A5;
defparam \bitCountReg[6]~20 .sum_lutc_input = "cin";
// synopsys translate_on

// Location: FF_X30_Y2_N31
dffeas \bitCountReg[6] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\bitCountReg[6]~20_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(!\state.110~q ),
        .sload(gnd),
        .ena(\bitCountReg[3]~7_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(bitCountReg[6]),
        .prn(vcc));
// synopsys translate_off
defparam \bitCountReg[6] .is_wysiwyg = "true";
defparam \bitCountReg[6] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X30_Y2_N0
cycloneiv_lcell_comb \Selector3~0 (
// Equation(s):
// \Selector3~0_combout  = (bitCountReg[6]) # (((bitCountReg[4]) # (bitCountReg[1])) # (!bitCountReg[5]))

        .dataa(bitCountReg[6]),
        .datab(bitCountReg[5]),
        .datac(bitCountReg[4]),
        .datad(bitCountReg[1]),
        .cin(gnd),
        .combout(\Selector3~0_combout ),
        .cout());
// synopsys translate_off
defparam \Selector3~0 .lut_mask = 16'hFFFB;
defparam \Selector3~0 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X31_Y2_N22
cycloneiv_lcell_comb \Selector3~1 (
// Equation(s):
// \Selector3~1_combout  = (bitCountReg[0]) # (bitCountReg[3])

        .dataa(gnd),
        .datab(gnd),
        .datac(bitCountReg[0]),
        .datad(bitCountReg[3]),
        .cin(gnd),
        .combout(\Selector3~1_combout ),
        .cout());
// synopsys translate_off
defparam \Selector3~1 .lut_mask = 16'hFFF0;
defparam \Selector3~1 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X28_Y3_N22
cycloneiv_lcell_comb \Selector3~2 (
// Equation(s):
// \Selector3~2_combout  = (\state.101~q  & ((\Selector3~0_combout ) # ((bitCountReg[2]) # (\Selector3~1_combout ))))

        .dataa(\state.101~q ),
        .datab(\Selector3~0_combout ),
        .datac(bitCountReg[2]),
        .datad(\Selector3~1_combout ),
        .cin(gnd),
        .combout(\Selector3~2_combout ),
        .cout());
// synopsys translate_off
defparam \Selector3~2 .lut_mask = 16'hAAA8;
defparam \Selector3~2 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X28_Y3_N6
cycloneiv_lcell_comb \Selector4~0 (
// Equation(s):
// \Selector4~0_combout  = (\Equal1~11_combout  & (\Equal1~9_combout  & (\Selector3~2_combout  & \Equal1~4_combout )))

        .dataa(\Equal1~11_combout ),
        .datab(\Equal1~9_combout ),
        .datac(\Selector3~2_combout ),
        .datad(\Equal1~4_combout ),
        .cin(gnd),
        .combout(\Selector4~0_combout ),
        .cout());
// synopsys translate_off
defparam \Selector4~0 .lut_mask = 16'h8000;
defparam \Selector4~0 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X30_Y2_N2
cycloneiv_lcell_comb \bitCount[0]~7 (
// Equation(s):
// \bitCount[0]~7_combout  = bitCount[0] $ (VCC)
// \bitCount[0]~8  = CARRY(bitCount[0])

        .dataa(gnd),
        .datab(bitCount[0]),
        .datac(gnd),
        .datad(vcc),
        .cin(gnd),
        .combout(\bitCount[0]~7_combout ),
        .cout(\bitCount[0]~8 ));
// synopsys translate_off
defparam \bitCount[0]~7 .lut_mask = 16'h33CC;
defparam \bitCount[0]~7 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X31_Y3_N24
cycloneiv_lcell_comb \wb_interface|rty_int~1 (
// Equation(s):
// \wb_interface|rty_int~1_combout  = (\wb_cyc_i~input_o  & (\wb_stb_i~input_o  & (\wb_we_i~input_o  & \wb_interface|Equal2~0_combout )))

        .dataa(\wb_cyc_i~input_o ),
        .datab(\wb_stb_i~input_o ),
        .datac(\wb_we_i~input_o ),
        .datad(\wb_interface|Equal2~0_combout ),
        .cin(gnd),
        .combout(\wb_interface|rty_int~1_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|rty_int~1 .lut_mask = 16'h8000;
defparam \wb_interface|rty_int~1 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X31_Y3_N8
cycloneiv_lcell_comb \wb_interface|always3~0 (
// Equation(s):
// \wb_interface|always3~0_combout  = (\wb_adr_i[0]~input_o  & (!\wb_adr_i[1]~input_o  & (!\lock_cfg~q  & \wb_interface|rty_int~1_combout )))

        .dataa(\wb_adr_i[0]~input_o ),
        .datab(\wb_adr_i[1]~input_o ),
        .datac(\lock_cfg~q ),
        .datad(\wb_interface|rty_int~1_combout ),
        .cin(gnd),
        .combout(\wb_interface|always3~0_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|always3~0 .lut_mask = 16'h0200;
defparam \wb_interface|always3~0 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X27_Y3_N25
dffeas \wb_interface|pulsewidth[15] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[15]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always3~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|pulsewidth [15]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|pulsewidth[15] .is_wysiwyg = "true";
defparam \wb_interface|pulsewidth[15] .power_up = "low";
// synopsys translate_on

// Location: FF_X27_Y3_N17
dffeas \wb_interface|pulsewidth[14] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[14]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always3~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|pulsewidth [14]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|pulsewidth[14] .is_wysiwyg = "true";
defparam \wb_interface|pulsewidth[14] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X27_Y3_N16
cycloneiv_lcell_comb \Equal3~8 (
// Equation(s):
// \Equal3~8_combout  = (pulseCnt[15] & (\wb_interface|pulsewidth [15] & (\wb_interface|pulsewidth [14] $ (!pulseCnt[14])))) # (!pulseCnt[15] & (!\wb_interface|pulsewidth [15] & (\wb_interface|pulsewidth [14] $ (!pulseCnt[14]))))

        .dataa(pulseCnt[15]),
        .datab(\wb_interface|pulsewidth [15]),
        .datac(\wb_interface|pulsewidth [14]),
        .datad(pulseCnt[14]),
        .cin(gnd),
        .combout(\Equal3~8_combout ),
        .cout());
// synopsys translate_off
defparam \Equal3~8 .lut_mask = 16'h9009;
defparam \Equal3~8 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X27_Y3_N23
dffeas \wb_interface|pulsewidth[11] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[11]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always3~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|pulsewidth [11]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|pulsewidth[11] .is_wysiwyg = "true";
defparam \wb_interface|pulsewidth[11] .power_up = "low";
// synopsys translate_on

// Location: FF_X27_Y3_N19
dffeas \wb_interface|pulsewidth[10] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[10]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always3~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|pulsewidth [10]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|pulsewidth[10] .is_wysiwyg = "true";
defparam \wb_interface|pulsewidth[10] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X27_Y3_N18
cycloneiv_lcell_comb \Equal3~6 (
// Equation(s):
// \Equal3~6_combout  = (\wb_interface|pulsewidth [11] & (pulseCnt[11] & (pulseCnt[10] $ (!\wb_interface|pulsewidth [10])))) # (!\wb_interface|pulsewidth [11] & (!pulseCnt[11] & (pulseCnt[10] $ (!\wb_interface|pulsewidth [10]))))

        .dataa(\wb_interface|pulsewidth [11]),
        .datab(pulseCnt[10]),
        .datac(\wb_interface|pulsewidth [10]),
        .datad(pulseCnt[11]),
        .cin(gnd),
        .combout(\Equal3~6_combout ),
        .cout());
// synopsys translate_off
defparam \Equal3~6 .lut_mask = 16'h8241;
defparam \Equal3~6 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X27_Y3_N13
dffeas \wb_interface|pulsewidth[13] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[13]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always3~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|pulsewidth [13]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|pulsewidth[13] .is_wysiwyg = "true";
defparam \wb_interface|pulsewidth[13] .power_up = "low";
// synopsys translate_on

// Location: FF_X27_Y3_N5
dffeas \wb_interface|pulsewidth[12] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[12]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always3~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|pulsewidth [12]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|pulsewidth[12] .is_wysiwyg = "true";
defparam \wb_interface|pulsewidth[12] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X27_Y3_N4
cycloneiv_lcell_comb \Equal3~7 (
// Equation(s):
// \Equal3~7_combout  = (\wb_interface|pulsewidth [13] & (pulseCnt[13] & (pulseCnt[12] $ (!\wb_interface|pulsewidth [12])))) # (!\wb_interface|pulsewidth [13] & (!pulseCnt[13] & (pulseCnt[12] $ (!\wb_interface|pulsewidth [12]))))

        .dataa(\wb_interface|pulsewidth [13]),
        .datab(pulseCnt[12]),
        .datac(\wb_interface|pulsewidth [12]),
        .datad(pulseCnt[13]),
        .cin(gnd),
        .combout(\Equal3~7_combout ),
        .cout());
// synopsys translate_off
defparam \Equal3~7 .lut_mask = 16'h8241;
defparam \Equal3~7 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X27_Y1_N23
dffeas \wb_interface|pulsewidth[8] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[8]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always3~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|pulsewidth [8]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|pulsewidth[8] .is_wysiwyg = "true";
defparam \wb_interface|pulsewidth[8] .power_up = "low";
// synopsys translate_on

// Location: FF_X27_Y1_N29
dffeas \wb_interface|pulsewidth[9] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[9]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always3~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|pulsewidth [9]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|pulsewidth[9] .is_wysiwyg = "true";
defparam \wb_interface|pulsewidth[9] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X27_Y1_N24
cycloneiv_lcell_comb \Equal3~5 (
// Equation(s):
// \Equal3~5_combout  = (\wb_interface|pulsewidth [8] & (pulseCnt[8] & (\wb_interface|pulsewidth [9] $ (!pulseCnt[9])))) # (!\wb_interface|pulsewidth [8] & (!pulseCnt[8] & (\wb_interface|pulsewidth [9] $ (!pulseCnt[9]))))

        .dataa(\wb_interface|pulsewidth [8]),
        .datab(\wb_interface|pulsewidth [9]),
        .datac(pulseCnt[8]),
        .datad(pulseCnt[9]),
        .cin(gnd),
        .combout(\Equal3~5_combout ),
        .cout());
// synopsys translate_off
defparam \Equal3~5 .lut_mask = 16'h8421;
defparam \Equal3~5 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X28_Y3_N28
cycloneiv_lcell_comb \Equal3~9 (
// Equation(s):
// \Equal3~9_combout  = (\Equal3~8_combout  & (\Equal3~6_combout  & (\Equal3~7_combout  & \Equal3~5_combout )))

        .dataa(\Equal3~8_combout ),
        .datab(\Equal3~6_combout ),
        .datac(\Equal3~7_combout ),
        .datad(\Equal3~5_combout ),
        .cin(gnd),
        .combout(\Equal3~9_combout ),
        .cout());
// synopsys translate_off
defparam \Equal3~9 .lut_mask = 16'h8000;
defparam \Equal3~9 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X27_Y4_N3
dffeas \wb_interface|pulsewidth[5] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[5]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always3~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|pulsewidth [5]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|pulsewidth[5] .is_wysiwyg = "true";
defparam \wb_interface|pulsewidth[5] .power_up = "low";
// synopsys translate_on

// Location: FF_X27_Y4_N31
dffeas \wb_interface|pulsewidth[4] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[4]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always3~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|pulsewidth [4]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|pulsewidth[4] .is_wysiwyg = "true";
defparam \wb_interface|pulsewidth[4] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X27_Y4_N30
cycloneiv_lcell_comb \Equal3~2 (
// Equation(s):
// \Equal3~2_combout  = (pulseCnt[4] & (\wb_interface|pulsewidth [4] & (\wb_interface|pulsewidth [5] $ (!pulseCnt[5])))) # (!pulseCnt[4] & (!\wb_interface|pulsewidth [4] & (\wb_interface|pulsewidth [5] $ (!pulseCnt[5]))))

        .dataa(pulseCnt[4]),
        .datab(\wb_interface|pulsewidth [5]),
        .datac(\wb_interface|pulsewidth [4]),
        .datad(pulseCnt[5]),
        .cin(gnd),
        .combout(\Equal3~2_combout ),
        .cout());
// synopsys translate_off
defparam \Equal3~2 .lut_mask = 16'h8421;
defparam \Equal3~2 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X29_Y3_N0
cycloneiv_lcell_comb \wb_interface|pulsewidth[3]~1 (
// Equation(s):
// \wb_interface|pulsewidth[3]~1_combout  = !\wb_dat_i[3]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(\wb_dat_i[3]~input_o ),
        .datad(gnd),
        .cin(gnd),
        .combout(\wb_interface|pulsewidth[3]~1_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|pulsewidth[3]~1 .lut_mask = 16'h0F0F;
defparam \wb_interface|pulsewidth[3]~1 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X29_Y3_N1
dffeas \wb_interface|pulsewidth[3] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\wb_interface|pulsewidth[3]~1_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\wb_interface|always3~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|pulsewidth [3]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|pulsewidth[3] .is_wysiwyg = "true";
defparam \wb_interface|pulsewidth[3] .power_up = "low";
// synopsys translate_on

// Location: FF_X29_Y3_N11
dffeas \wb_interface|pulsewidth[2] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[2]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always3~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|pulsewidth [2]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|pulsewidth[2] .is_wysiwyg = "true";
defparam \wb_interface|pulsewidth[2] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X28_Y3_N24
cycloneiv_lcell_comb \Equal3~1 (
// Equation(s):
// \Equal3~1_combout  = (pulseCnt[2] & (\wb_interface|pulsewidth [2] & (\wb_interface|pulsewidth [3] $ (pulseCnt[3])))) # (!pulseCnt[2] & (!\wb_interface|pulsewidth [2] & (\wb_interface|pulsewidth [3] $ (pulseCnt[3]))))

        .dataa(pulseCnt[2]),
        .datab(\wb_interface|pulsewidth [3]),
        .datac(\wb_interface|pulsewidth [2]),
        .datad(pulseCnt[3]),
        .cin(gnd),
        .combout(\Equal3~1_combout ),
        .cout());
// synopsys translate_off
defparam \Equal3~1 .lut_mask = 16'h2184;
defparam \Equal3~1 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X27_Y4_N15
dffeas \wb_interface|pulsewidth[7] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[7]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always3~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|pulsewidth [7]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|pulsewidth[7] .is_wysiwyg = "true";
defparam \wb_interface|pulsewidth[7] .power_up = "low";
// synopsys translate_on

// Location: FF_X27_Y4_N11
dffeas \wb_interface|pulsewidth[6] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[6]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always3~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|pulsewidth [6]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|pulsewidth[6] .is_wysiwyg = "true";
defparam \wb_interface|pulsewidth[6] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X27_Y4_N10
cycloneiv_lcell_comb \Equal3~3 (
// Equation(s):
// \Equal3~3_combout  = (pulseCnt[6] & (\wb_interface|pulsewidth [6] & (\wb_interface|pulsewidth [7] $ (!pulseCnt[7])))) # (!pulseCnt[6] & (!\wb_interface|pulsewidth [6] & (\wb_interface|pulsewidth [7] $ (!pulseCnt[7]))))

        .dataa(pulseCnt[6]),
        .datab(\wb_interface|pulsewidth [7]),
        .datac(\wb_interface|pulsewidth [6]),
        .datad(pulseCnt[7]),
        .cin(gnd),
        .combout(\Equal3~3_combout ),
        .cout());
// synopsys translate_off
defparam \Equal3~3 .lut_mask = 16'h8421;
defparam \Equal3~3 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X27_Y1_N13
dffeas \wb_interface|pulsewidth[0] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[0]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always3~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|pulsewidth [0]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|pulsewidth[0] .is_wysiwyg = "true";
defparam \wb_interface|pulsewidth[0] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X27_Y1_N16
cycloneiv_lcell_comb \wb_interface|pulsewidth[1]~0 (
// Equation(s):
// \wb_interface|pulsewidth[1]~0_combout  = !\wb_dat_i[1]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(\wb_dat_i[1]~input_o ),
        .datad(gnd),
        .cin(gnd),
        .combout(\wb_interface|pulsewidth[1]~0_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|pulsewidth[1]~0 .lut_mask = 16'h0F0F;
defparam \wb_interface|pulsewidth[1]~0 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X27_Y1_N17
dffeas \wb_interface|pulsewidth[1] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\wb_interface|pulsewidth[1]~0_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\wb_interface|always3~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|pulsewidth [1]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|pulsewidth[1] .is_wysiwyg = "true";
defparam \wb_interface|pulsewidth[1] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X27_Y1_N18
cycloneiv_lcell_comb \Equal3~0 (
// Equation(s):
// \Equal3~0_combout  = (\wb_interface|pulsewidth [0] & (pulseCnt[0] & (\wb_interface|pulsewidth [1] $ (pulseCnt[1])))) # (!\wb_interface|pulsewidth [0] & (!pulseCnt[0] & (\wb_interface|pulsewidth [1] $ (pulseCnt[1]))))

        .dataa(\wb_interface|pulsewidth [0]),
        .datab(\wb_interface|pulsewidth [1]),
        .datac(pulseCnt[0]),
        .datad(pulseCnt[1]),
        .cin(gnd),
        .combout(\Equal3~0_combout ),
        .cout());
// synopsys translate_off
defparam \Equal3~0 .lut_mask = 16'h2184;
defparam \Equal3~0 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X28_Y3_N14
cycloneiv_lcell_comb \Equal3~4 (
// Equation(s):
// \Equal3~4_combout  = (\Equal3~2_combout  & (\Equal3~1_combout  & (\Equal3~3_combout  & \Equal3~0_combout )))

        .dataa(\Equal3~2_combout ),
        .datab(\Equal3~1_combout ),
        .datac(\Equal3~3_combout ),
        .datad(\Equal3~0_combout ),
        .cin(gnd),
        .combout(\Equal3~4_combout ),
        .cout());
// synopsys translate_off
defparam \Equal3~4 .lut_mask = 16'h8000;
defparam \Equal3~4 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X25_Y3_N13
dffeas \wb_interface|pulsewidth[25] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[25]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always3~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|pulsewidth [25]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|pulsewidth[25] .is_wysiwyg = "true";
defparam \wb_interface|pulsewidth[25] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X26_Y3_N6
cycloneiv_lcell_comb \pulseCnt[19]~70 (
// Equation(s):
// \pulseCnt[19]~70_combout  = (pulseCnt[19] & (!\pulseCnt[18]~69 )) # (!pulseCnt[19] & ((\pulseCnt[18]~69 ) # (GND)))
// \pulseCnt[19]~71  = CARRY((!\pulseCnt[18]~69 ) # (!pulseCnt[19]))

        .dataa(pulseCnt[19]),
        .datab(gnd),
        .datac(gnd),
        .datad(vcc),
        .cin(\pulseCnt[18]~69 ),
        .combout(\pulseCnt[19]~70_combout ),
        .cout(\pulseCnt[19]~71 ));
// synopsys translate_off
defparam \pulseCnt[19]~70 .lut_mask = 16'h5A5F;
defparam \pulseCnt[19]~70 .sum_lutc_input = "cin";
// synopsys translate_on

// Location: LCCOMB_X26_Y3_N8
cycloneiv_lcell_comb \pulseCnt[20]~72 (
// Equation(s):
// \pulseCnt[20]~72_combout  = (pulseCnt[20] & (\pulseCnt[19]~71  $ (GND))) # (!pulseCnt[20] & (!\pulseCnt[19]~71  & VCC))
// \pulseCnt[20]~73  = CARRY((pulseCnt[20] & !\pulseCnt[19]~71 ))

        .dataa(gnd),
        .datab(pulseCnt[20]),
        .datac(gnd),
        .datad(vcc),
        .cin(\pulseCnt[19]~71 ),
        .combout(\pulseCnt[20]~72_combout ),
        .cout(\pulseCnt[20]~73 ));
// synopsys translate_off
defparam \pulseCnt[20]~72 .lut_mask = 16'hC30C;
defparam \pulseCnt[20]~72 .sum_lutc_input = "cin";
// synopsys translate_on

// Location: FF_X26_Y3_N9
dffeas \pulseCnt[20] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\pulseCnt[20]~72_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(\bit~0_combout ),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(pulseCnt[20]),
        .prn(vcc));
// synopsys translate_off
defparam \pulseCnt[20] .is_wysiwyg = "true";
defparam \pulseCnt[20] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X26_Y3_N10
cycloneiv_lcell_comb \pulseCnt[21]~74 (
// Equation(s):
// \pulseCnt[21]~74_combout  = (pulseCnt[21] & (!\pulseCnt[20]~73 )) # (!pulseCnt[21] & ((\pulseCnt[20]~73 ) # (GND)))
// \pulseCnt[21]~75  = CARRY((!\pulseCnt[20]~73 ) # (!pulseCnt[21]))

        .dataa(pulseCnt[21]),
        .datab(gnd),
        .datac(gnd),
        .datad(vcc),
        .cin(\pulseCnt[20]~73 ),
        .combout(\pulseCnt[21]~74_combout ),
        .cout(\pulseCnt[21]~75 ));
// synopsys translate_off
defparam \pulseCnt[21]~74 .lut_mask = 16'h5A5F;
defparam \pulseCnt[21]~74 .sum_lutc_input = "cin";
// synopsys translate_on

// Location: FF_X26_Y3_N11
dffeas \pulseCnt[21] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\pulseCnt[21]~74_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(\bit~0_combout ),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(pulseCnt[21]),
        .prn(vcc));
// synopsys translate_off
defparam \pulseCnt[21] .is_wysiwyg = "true";
defparam \pulseCnt[21] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X26_Y3_N12
cycloneiv_lcell_comb \pulseCnt[22]~76 (
// Equation(s):
// \pulseCnt[22]~76_combout  = (pulseCnt[22] & (\pulseCnt[21]~75  $ (GND))) # (!pulseCnt[22] & (!\pulseCnt[21]~75  & VCC))
// \pulseCnt[22]~77  = CARRY((pulseCnt[22] & !\pulseCnt[21]~75 ))

        .dataa(pulseCnt[22]),
        .datab(gnd),
        .datac(gnd),
        .datad(vcc),
        .cin(\pulseCnt[21]~75 ),
        .combout(\pulseCnt[22]~76_combout ),
        .cout(\pulseCnt[22]~77 ));
// synopsys translate_off
defparam \pulseCnt[22]~76 .lut_mask = 16'hA50A;
defparam \pulseCnt[22]~76 .sum_lutc_input = "cin";
// synopsys translate_on

// Location: FF_X26_Y3_N13
dffeas \pulseCnt[22] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\pulseCnt[22]~76_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(\bit~0_combout ),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(pulseCnt[22]),
        .prn(vcc));
// synopsys translate_off
defparam \pulseCnt[22] .is_wysiwyg = "true";
defparam \pulseCnt[22] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X26_Y3_N14
cycloneiv_lcell_comb \pulseCnt[23]~78 (
// Equation(s):
// \pulseCnt[23]~78_combout  = (pulseCnt[23] & (!\pulseCnt[22]~77 )) # (!pulseCnt[23] & ((\pulseCnt[22]~77 ) # (GND)))
// \pulseCnt[23]~79  = CARRY((!\pulseCnt[22]~77 ) # (!pulseCnt[23]))

        .dataa(gnd),
        .datab(pulseCnt[23]),
        .datac(gnd),
        .datad(vcc),
        .cin(\pulseCnt[22]~77 ),
        .combout(\pulseCnt[23]~78_combout ),
        .cout(\pulseCnt[23]~79 ));
// synopsys translate_off
defparam \pulseCnt[23]~78 .lut_mask = 16'h3C3F;
defparam \pulseCnt[23]~78 .sum_lutc_input = "cin";
// synopsys translate_on

// Location: FF_X26_Y3_N15
dffeas \pulseCnt[23] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\pulseCnt[23]~78_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(\bit~0_combout ),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(pulseCnt[23]),
        .prn(vcc));
// synopsys translate_off
defparam \pulseCnt[23] .is_wysiwyg = "true";
defparam \pulseCnt[23] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X26_Y3_N16
cycloneiv_lcell_comb \pulseCnt[24]~80 (
// Equation(s):
// \pulseCnt[24]~80_combout  = (pulseCnt[24] & (\pulseCnt[23]~79  $ (GND))) # (!pulseCnt[24] & (!\pulseCnt[23]~79  & VCC))
// \pulseCnt[24]~81  = CARRY((pulseCnt[24] & !\pulseCnt[23]~79 ))

        .dataa(gnd),
        .datab(pulseCnt[24]),
        .datac(gnd),
        .datad(vcc),
        .cin(\pulseCnt[23]~79 ),
        .combout(\pulseCnt[24]~80_combout ),
        .cout(\pulseCnt[24]~81 ));
// synopsys translate_off
defparam \pulseCnt[24]~80 .lut_mask = 16'hC30C;
defparam \pulseCnt[24]~80 .sum_lutc_input = "cin";
// synopsys translate_on

// Location: FF_X26_Y3_N17
dffeas \pulseCnt[24] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\pulseCnt[24]~80_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(\bit~0_combout ),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(pulseCnt[24]),
        .prn(vcc));
// synopsys translate_off
defparam \pulseCnt[24] .is_wysiwyg = "true";
defparam \pulseCnt[24] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X26_Y3_N18
cycloneiv_lcell_comb \pulseCnt[25]~82 (
// Equation(s):
// \pulseCnt[25]~82_combout  = (pulseCnt[25] & (!\pulseCnt[24]~81 )) # (!pulseCnt[25] & ((\pulseCnt[24]~81 ) # (GND)))
// \pulseCnt[25]~83  = CARRY((!\pulseCnt[24]~81 ) # (!pulseCnt[25]))

        .dataa(gnd),
        .datab(pulseCnt[25]),
        .datac(gnd),
        .datad(vcc),
        .cin(\pulseCnt[24]~81 ),
        .combout(\pulseCnt[25]~82_combout ),
        .cout(\pulseCnt[25]~83 ));
// synopsys translate_off
defparam \pulseCnt[25]~82 .lut_mask = 16'h3C3F;
defparam \pulseCnt[25]~82 .sum_lutc_input = "cin";
// synopsys translate_on

// Location: FF_X26_Y3_N19
dffeas \pulseCnt[25] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\pulseCnt[25]~82_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(\bit~0_combout ),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(pulseCnt[25]),
        .prn(vcc));
// synopsys translate_off
defparam \pulseCnt[25] .is_wysiwyg = "true";
defparam \pulseCnt[25] .power_up = "low";
// synopsys translate_on

// Location: FF_X25_Y3_N11
dffeas \wb_interface|pulsewidth[24] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[24]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always3~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|pulsewidth [24]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|pulsewidth[24] .is_wysiwyg = "true";
defparam \wb_interface|pulsewidth[24] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X25_Y3_N10
cycloneiv_lcell_comb \Equal3~15 (
// Equation(s):
// \Equal3~15_combout  = (\wb_interface|pulsewidth [25] & (pulseCnt[25] & (\wb_interface|pulsewidth [24] $ (!pulseCnt[24])))) # (!\wb_interface|pulsewidth [25] & (!pulseCnt[25] & (\wb_interface|pulsewidth [24] $ (!pulseCnt[24]))))

        .dataa(\wb_interface|pulsewidth [25]),
        .datab(pulseCnt[25]),
        .datac(\wb_interface|pulsewidth [24]),
        .datad(pulseCnt[24]),
        .cin(gnd),
        .combout(\Equal3~15_combout ),
        .cout());
// synopsys translate_off
defparam \Equal3~15 .lut_mask = 16'h9009;
defparam \Equal3~15 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X26_Y3_N20
cycloneiv_lcell_comb \pulseCnt[26]~84 (
// Equation(s):
// \pulseCnt[26]~84_combout  = (pulseCnt[26] & (\pulseCnt[25]~83  $ (GND))) # (!pulseCnt[26] & (!\pulseCnt[25]~83  & VCC))
// \pulseCnt[26]~85  = CARRY((pulseCnt[26] & !\pulseCnt[25]~83 ))

        .dataa(gnd),
        .datab(pulseCnt[26]),
        .datac(gnd),
        .datad(vcc),
        .cin(\pulseCnt[25]~83 ),
        .combout(\pulseCnt[26]~84_combout ),
        .cout(\pulseCnt[26]~85 ));
// synopsys translate_off
defparam \pulseCnt[26]~84 .lut_mask = 16'hC30C;
defparam \pulseCnt[26]~84 .sum_lutc_input = "cin";
// synopsys translate_on

// Location: FF_X26_Y3_N21
dffeas \pulseCnt[26] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\pulseCnt[26]~84_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(\bit~0_combout ),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(pulseCnt[26]),
        .prn(vcc));
// synopsys translate_off
defparam \pulseCnt[26] .is_wysiwyg = "true";
defparam \pulseCnt[26] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X26_Y3_N22
cycloneiv_lcell_comb \pulseCnt[27]~86 (
// Equation(s):
// \pulseCnt[27]~86_combout  = (pulseCnt[27] & (!\pulseCnt[26]~85 )) # (!pulseCnt[27] & ((\pulseCnt[26]~85 ) # (GND)))
// \pulseCnt[27]~87  = CARRY((!\pulseCnt[26]~85 ) # (!pulseCnt[27]))

        .dataa(pulseCnt[27]),
        .datab(gnd),
        .datac(gnd),
        .datad(vcc),
        .cin(\pulseCnt[26]~85 ),
        .combout(\pulseCnt[27]~86_combout ),
        .cout(\pulseCnt[27]~87 ));
// synopsys translate_off
defparam \pulseCnt[27]~86 .lut_mask = 16'h5A5F;
defparam \pulseCnt[27]~86 .sum_lutc_input = "cin";
// synopsys translate_on

// Location: FF_X26_Y3_N23
dffeas \pulseCnt[27] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\pulseCnt[27]~86_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(\bit~0_combout ),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(pulseCnt[27]),
        .prn(vcc));
// synopsys translate_off
defparam \pulseCnt[27] .is_wysiwyg = "true";
defparam \pulseCnt[27] .power_up = "low";
// synopsys translate_on

// Location: FF_X29_Y3_N17
dffeas \wb_interface|pulsewidth[27] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[27]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always3~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|pulsewidth [27]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|pulsewidth[27] .is_wysiwyg = "true";
defparam \wb_interface|pulsewidth[27] .power_up = "low";
// synopsys translate_on

// Location: FF_X29_Y3_N29
dffeas \wb_interface|pulsewidth[26] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[26]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always3~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|pulsewidth [26]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|pulsewidth[26] .is_wysiwyg = "true";
defparam \wb_interface|pulsewidth[26] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X29_Y3_N28
cycloneiv_lcell_comb \Equal3~16 (
// Equation(s):
// \Equal3~16_combout  = (pulseCnt[27] & (\wb_interface|pulsewidth [27] & (\wb_interface|pulsewidth [26] $ (!pulseCnt[26])))) # (!pulseCnt[27] & (!\wb_interface|pulsewidth [27] & (\wb_interface|pulsewidth [26] $ (!pulseCnt[26]))))

        .dataa(pulseCnt[27]),
        .datab(\wb_interface|pulsewidth [27]),
        .datac(\wb_interface|pulsewidth [26]),
        .datad(pulseCnt[26]),
        .cin(gnd),
        .combout(\Equal3~16_combout ),
        .cout());
// synopsys translate_off
defparam \Equal3~16 .lut_mask = 16'h9009;
defparam \Equal3~16 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X29_Y3_N7
dffeas \wb_interface|pulsewidth[29] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[29]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always3~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|pulsewidth [29]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|pulsewidth[29] .is_wysiwyg = "true";
defparam \wb_interface|pulsewidth[29] .power_up = "low";
// synopsys translate_on

// Location: FF_X29_Y3_N9
dffeas \wb_interface|pulsewidth[28] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[28]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always3~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|pulsewidth [28]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|pulsewidth[28] .is_wysiwyg = "true";
defparam \wb_interface|pulsewidth[28] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X26_Y3_N24
cycloneiv_lcell_comb \pulseCnt[28]~88 (
// Equation(s):
// \pulseCnt[28]~88_combout  = (pulseCnt[28] & (\pulseCnt[27]~87  $ (GND))) # (!pulseCnt[28] & (!\pulseCnt[27]~87  & VCC))
// \pulseCnt[28]~89  = CARRY((pulseCnt[28] & !\pulseCnt[27]~87 ))

        .dataa(gnd),
        .datab(pulseCnt[28]),
        .datac(gnd),
        .datad(vcc),
        .cin(\pulseCnt[27]~87 ),
        .combout(\pulseCnt[28]~88_combout ),
        .cout(\pulseCnt[28]~89 ));
// synopsys translate_off
defparam \pulseCnt[28]~88 .lut_mask = 16'hC30C;
defparam \pulseCnt[28]~88 .sum_lutc_input = "cin";
// synopsys translate_on

// Location: FF_X26_Y3_N25
dffeas \pulseCnt[28] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\pulseCnt[28]~88_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(\bit~0_combout ),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(pulseCnt[28]),
        .prn(vcc));
// synopsys translate_off
defparam \pulseCnt[28] .is_wysiwyg = "true";
defparam \pulseCnt[28] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X26_Y3_N26
cycloneiv_lcell_comb \pulseCnt[29]~90 (
// Equation(s):
// \pulseCnt[29]~90_combout  = (pulseCnt[29] & (!\pulseCnt[28]~89 )) # (!pulseCnt[29] & ((\pulseCnt[28]~89 ) # (GND)))
// \pulseCnt[29]~91  = CARRY((!\pulseCnt[28]~89 ) # (!pulseCnt[29]))

        .dataa(pulseCnt[29]),
        .datab(gnd),
        .datac(gnd),
        .datad(vcc),
        .cin(\pulseCnt[28]~89 ),
        .combout(\pulseCnt[29]~90_combout ),
        .cout(\pulseCnt[29]~91 ));
// synopsys translate_off
defparam \pulseCnt[29]~90 .lut_mask = 16'h5A5F;
defparam \pulseCnt[29]~90 .sum_lutc_input = "cin";
// synopsys translate_on

// Location: FF_X26_Y3_N27
dffeas \pulseCnt[29] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\pulseCnt[29]~90_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(\bit~0_combout ),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(pulseCnt[29]),
        .prn(vcc));
// synopsys translate_off
defparam \pulseCnt[29] .is_wysiwyg = "true";
defparam \pulseCnt[29] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X29_Y3_N30
cycloneiv_lcell_comb \Equal3~17 (
// Equation(s):
// \Equal3~17_combout  = (\wb_interface|pulsewidth [29] & (pulseCnt[29] & (\wb_interface|pulsewidth [28] $ (!pulseCnt[28])))) # (!\wb_interface|pulsewidth [29] & (!pulseCnt[29] & (\wb_interface|pulsewidth [28] $ (!pulseCnt[28]))))

        .dataa(\wb_interface|pulsewidth [29]),
        .datab(\wb_interface|pulsewidth [28]),
        .datac(pulseCnt[28]),
        .datad(pulseCnt[29]),
        .cin(gnd),
        .combout(\Equal3~17_combout ),
        .cout());
// synopsys translate_off
defparam \Equal3~17 .lut_mask = 16'h8241;
defparam \Equal3~17 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X26_Y3_N28
cycloneiv_lcell_comb \pulseCnt[30]~92 (
// Equation(s):
// \pulseCnt[30]~92_combout  = (pulseCnt[30] & (\pulseCnt[29]~91  $ (GND))) # (!pulseCnt[30] & (!\pulseCnt[29]~91  & VCC))
// \pulseCnt[30]~93  = CARRY((pulseCnt[30] & !\pulseCnt[29]~91 ))

        .dataa(gnd),
        .datab(pulseCnt[30]),
        .datac(gnd),
        .datad(vcc),
        .cin(\pulseCnt[29]~91 ),
        .combout(\pulseCnt[30]~92_combout ),
        .cout(\pulseCnt[30]~93 ));
// synopsys translate_off
defparam \pulseCnt[30]~92 .lut_mask = 16'hC30C;
defparam \pulseCnt[30]~92 .sum_lutc_input = "cin";
// synopsys translate_on

// Location: FF_X26_Y3_N29
dffeas \pulseCnt[30] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\pulseCnt[30]~92_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(\bit~0_combout ),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(pulseCnt[30]),
        .prn(vcc));
// synopsys translate_off
defparam \pulseCnt[30] .is_wysiwyg = "true";
defparam \pulseCnt[30] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X26_Y3_N30
cycloneiv_lcell_comb \pulseCnt[31]~94 (
// Equation(s):
// \pulseCnt[31]~94_combout  = pulseCnt[31] $ (\pulseCnt[30]~93 )

        .dataa(pulseCnt[31]),
        .datab(gnd),
        .datac(gnd),
        .datad(gnd),
        .cin(\pulseCnt[30]~93 ),
        .combout(\pulseCnt[31]~94_combout ),
        .cout());
// synopsys translate_off
defparam \pulseCnt[31]~94 .lut_mask = 16'h5A5A;
defparam \pulseCnt[31]~94 .sum_lutc_input = "cin";
// synopsys translate_on

// Location: FF_X26_Y3_N31
dffeas \pulseCnt[31] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\pulseCnt[31]~94_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(\bit~0_combout ),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(pulseCnt[31]),
        .prn(vcc));
// synopsys translate_off
defparam \pulseCnt[31] .is_wysiwyg = "true";
defparam \pulseCnt[31] .power_up = "low";
// synopsys translate_on

// Location: FF_X27_Y4_N29
dffeas \wb_interface|pulsewidth[31] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[31]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always3~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|pulsewidth [31]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|pulsewidth[31] .is_wysiwyg = "true";
defparam \wb_interface|pulsewidth[31] .power_up = "low";
// synopsys translate_on

// Location: FF_X27_Y4_N21
dffeas \wb_interface|pulsewidth[30] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[30]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always3~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|pulsewidth [30]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|pulsewidth[30] .is_wysiwyg = "true";
defparam \wb_interface|pulsewidth[30] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X27_Y4_N20
cycloneiv_lcell_comb \Equal3~18 (
// Equation(s):
// \Equal3~18_combout  = (pulseCnt[31] & (\wb_interface|pulsewidth [31] & (\wb_interface|pulsewidth [30] $ (!pulseCnt[30])))) # (!pulseCnt[31] & (!\wb_interface|pulsewidth [31] & (\wb_interface|pulsewidth [30] $ (!pulseCnt[30]))))

        .dataa(pulseCnt[31]),
        .datab(\wb_interface|pulsewidth [31]),
        .datac(\wb_interface|pulsewidth [30]),
        .datad(pulseCnt[30]),
        .cin(gnd),
        .combout(\Equal3~18_combout ),
        .cout());
// synopsys translate_off
defparam \Equal3~18 .lut_mask = 16'h9009;
defparam \Equal3~18 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X28_Y3_N20
cycloneiv_lcell_comb \Equal3~19 (
// Equation(s):
// \Equal3~19_combout  = (\Equal3~15_combout  & (\Equal3~16_combout  & (\Equal3~17_combout  & \Equal3~18_combout )))

        .dataa(\Equal3~15_combout ),
        .datab(\Equal3~16_combout ),
        .datac(\Equal3~17_combout ),
        .datad(\Equal3~18_combout ),
        .cin(gnd),
        .combout(\Equal3~19_combout ),
        .cout());
// synopsys translate_off
defparam \Equal3~19 .lut_mask = 16'h8000;
defparam \Equal3~19 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X28_Y3_N10
cycloneiv_lcell_comb \Equal3~20 (
// Equation(s):
// \Equal3~20_combout  = (\Equal3~14_combout  & (\Equal3~9_combout  & (\Equal3~4_combout  & \Equal3~19_combout )))

        .dataa(\Equal3~14_combout ),
        .datab(\Equal3~9_combout ),
        .datac(\Equal3~4_combout ),
        .datad(\Equal3~19_combout ),
        .cin(gnd),
        .combout(\Equal3~20_combout ),
        .cout());
// synopsys translate_off
defparam \Equal3~20 .lut_mask = 16'h8000;
defparam \Equal3~20 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X28_Y3_N12
cycloneiv_lcell_comb \Selector2~0 (
// Equation(s):
// \Selector2~0_combout  = (\Selector4~0_combout  & ((\Equal2~4_combout ) # ((\state.100~q  & !\Equal3~20_combout )))) # (!\Selector4~0_combout  & (((\state.100~q  & !\Equal3~20_combout ))))

        .dataa(\Selector4~0_combout ),
        .datab(\Equal2~4_combout ),
        .datac(\state.100~q ),
        .datad(\Equal3~20_combout ),
        .cin(gnd),
        .combout(\Selector2~0_combout ),
        .cout());
// synopsys translate_off
defparam \Selector2~0 .lut_mask = 16'h88F8;
defparam \Selector2~0 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X28_Y3_N13
dffeas \state.100 (
        .clk(\wb_clk_i~inputclkctrl_outclk ),
        .d(\Selector2~0_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\state.100~q ),
        .prn(vcc));
// synopsys translate_off
defparam \state.100 .is_wysiwyg = "true";
defparam \state.100 .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X28_Y4_N24
cycloneiv_lcell_comb \wb_interface|size~0 (
// Equation(s):
// \wb_interface|size~0_combout  = (\wb_interface|always5~0_combout  & \wb_dat_i[7]~input_o )

        .dataa(gnd),
        .datab(\wb_interface|always5~0_combout ),
        .datac(gnd),
        .datad(\wb_dat_i[7]~input_o ),
        .cin(gnd),
        .combout(\wb_interface|size~0_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|size~0 .lut_mask = 16'hCC00;
defparam \wb_interface|size~0 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X28_Y4_N25
dffeas \wb_interface|size[7] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\wb_interface|size~0_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|size [7]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|size[7] .is_wysiwyg = "true";
defparam \wb_interface|size[7] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X28_Y3_N0
cycloneiv_lcell_comb \Selector0~0 (
// Equation(s):
// \Selector0~0_combout  = (\state.100~q  & (!\Equal3~20_combout  & ((\wb_interface|size [7]) # (\state.000~q )))) # (!\state.100~q  & ((\wb_interface|size [7]) # ((\state.000~q ))))

        .dataa(\state.100~q ),
        .datab(\wb_interface|size [7]),
        .datac(\state.000~q ),
        .datad(\Equal3~20_combout ),
        .cin(gnd),
        .combout(\Selector0~0_combout ),
        .cout());
// synopsys translate_off
defparam \Selector0~0 .lut_mask = 16'h54FC;
defparam \Selector0~0 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X28_Y3_N1
dffeas \state.000 (
        .clk(\wb_clk_i~inputclkctrl_outclk ),
        .d(\Selector0~0_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\state.000~q ),
        .prn(vcc));
// synopsys translate_off
defparam \state.000 .is_wysiwyg = "true";
defparam \state.000 .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X29_Y2_N6
cycloneiv_lcell_comb \bitCount[4]~11 (
// Equation(s):
// \bitCount[4]~11_combout  = \state.110~q  $ (!\state.000~q )

        .dataa(gnd),
        .datab(gnd),
        .datac(\state.110~q ),
        .datad(\state.000~q ),
        .cin(gnd),
        .combout(\bitCount[4]~11_combout ),
        .cout());
// synopsys translate_off
defparam \bitCount[4]~11 .lut_mask = 16'hF00F;
defparam \bitCount[4]~11 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X30_Y2_N3
dffeas \bitCount[0] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\bitCount[0]~7_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(!\state.110~q ),
        .sload(gnd),
        .ena(\bitCount[4]~11_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(bitCount[0]),
        .prn(vcc));
// synopsys translate_off
defparam \bitCount[0] .is_wysiwyg = "true";
defparam \bitCount[0] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X30_Y2_N4
cycloneiv_lcell_comb \bitCount[1]~9 (
// Equation(s):
// \bitCount[1]~9_combout  = (bitCount[1] & (!\bitCount[0]~8 )) # (!bitCount[1] & ((\bitCount[0]~8 ) # (GND)))
// \bitCount[1]~10  = CARRY((!\bitCount[0]~8 ) # (!bitCount[1]))

        .dataa(gnd),
        .datab(bitCount[1]),
        .datac(gnd),
        .datad(vcc),
        .cin(\bitCount[0]~8 ),
        .combout(\bitCount[1]~9_combout ),
        .cout(\bitCount[1]~10 ));
// synopsys translate_off
defparam \bitCount[1]~9 .lut_mask = 16'h3C3F;
defparam \bitCount[1]~9 .sum_lutc_input = "cin";
// synopsys translate_on

// Location: FF_X30_Y2_N5
dffeas \bitCount[1] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\bitCount[1]~9_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(!\state.110~q ),
        .sload(gnd),
        .ena(\bitCount[4]~11_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(bitCount[1]),
        .prn(vcc));
// synopsys translate_off
defparam \bitCount[1] .is_wysiwyg = "true";
defparam \bitCount[1] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X29_Y2_N30
cycloneiv_lcell_comb \wb_interface|size[1]~feeder (
// Equation(s):
// \wb_interface|size[1]~feeder_combout  = \wb_dat_i[1]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[1]~input_o ),
        .cin(gnd),
        .combout(\wb_interface|size[1]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|size[1]~feeder .lut_mask = 16'hFF00;
defparam \wb_interface|size[1]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X29_Y2_N31
dffeas \wb_interface|size[1] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\wb_interface|size[1]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\wb_interface|always5~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|size [1]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|size[1] .is_wysiwyg = "true";
defparam \wb_interface|size[1] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X29_Y2_N22
cycloneiv_lcell_comb \Equal2~0 (
// Equation(s):
// \Equal2~0_combout  = (bitCount[1] & (\wb_interface|size [1] & (\wb_interface|size [0] $ (!bitCount[0])))) # (!bitCount[1] & (!\wb_interface|size [1] & (\wb_interface|size [0] $ (!bitCount[0]))))

        .dataa(bitCount[1]),
        .datab(\wb_interface|size [0]),
        .datac(\wb_interface|size [1]),
        .datad(bitCount[0]),
        .cin(gnd),
        .combout(\Equal2~0_combout ),
        .cout());
// synopsys translate_off
defparam \Equal2~0 .lut_mask = 16'h8421;
defparam \Equal2~0 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X29_Y2_N11
dffeas \wb_interface|size[4] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[4]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always5~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|size [4]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|size[4] .is_wysiwyg = "true";
defparam \wb_interface|size[4] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X30_Y2_N6
cycloneiv_lcell_comb \bitCount[2]~12 (
// Equation(s):
// \bitCount[2]~12_combout  = (bitCount[2] & (\bitCount[1]~10  $ (GND))) # (!bitCount[2] & (!\bitCount[1]~10  & VCC))
// \bitCount[2]~13  = CARRY((bitCount[2] & !\bitCount[1]~10 ))

        .dataa(bitCount[2]),
        .datab(gnd),
        .datac(gnd),
        .datad(vcc),
        .cin(\bitCount[1]~10 ),
        .combout(\bitCount[2]~12_combout ),
        .cout(\bitCount[2]~13 ));
// synopsys translate_off
defparam \bitCount[2]~12 .lut_mask = 16'hA50A;
defparam \bitCount[2]~12 .sum_lutc_input = "cin";
// synopsys translate_on

// Location: FF_X30_Y2_N7
dffeas \bitCount[2] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\bitCount[2]~12_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(!\state.110~q ),
        .sload(gnd),
        .ena(\bitCount[4]~11_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(bitCount[2]),
        .prn(vcc));
// synopsys translate_off
defparam \bitCount[2] .is_wysiwyg = "true";
defparam \bitCount[2] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X30_Y2_N8
cycloneiv_lcell_comb \bitCount[3]~14 (
// Equation(s):
// \bitCount[3]~14_combout  = (bitCount[3] & (!\bitCount[2]~13 )) # (!bitCount[3] & ((\bitCount[2]~13 ) # (GND)))
// \bitCount[3]~15  = CARRY((!\bitCount[2]~13 ) # (!bitCount[3]))

        .dataa(gnd),
        .datab(bitCount[3]),
        .datac(gnd),
        .datad(vcc),
        .cin(\bitCount[2]~13 ),
        .combout(\bitCount[3]~14_combout ),
        .cout(\bitCount[3]~15 ));
// synopsys translate_off
defparam \bitCount[3]~14 .lut_mask = 16'h3C3F;
defparam \bitCount[3]~14 .sum_lutc_input = "cin";
// synopsys translate_on

// Location: FF_X30_Y2_N9
dffeas \bitCount[3] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\bitCount[3]~14_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(!\state.110~q ),
        .sload(gnd),
        .ena(\bitCount[4]~11_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(bitCount[3]),
        .prn(vcc));
// synopsys translate_off
defparam \bitCount[3] .is_wysiwyg = "true";
defparam \bitCount[3] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X30_Y2_N10
cycloneiv_lcell_comb \bitCount[4]~16 (
// Equation(s):
// \bitCount[4]~16_combout  = (bitCount[4] & (\bitCount[3]~15  $ (GND))) # (!bitCount[4] & (!\bitCount[3]~15  & VCC))
// \bitCount[4]~17  = CARRY((bitCount[4] & !\bitCount[3]~15 ))

        .dataa(bitCount[4]),
        .datab(gnd),
        .datac(gnd),
        .datad(vcc),
        .cin(\bitCount[3]~15 ),
        .combout(\bitCount[4]~16_combout ),
        .cout(\bitCount[4]~17 ));
// synopsys translate_off
defparam \bitCount[4]~16 .lut_mask = 16'hA50A;
defparam \bitCount[4]~16 .sum_lutc_input = "cin";
// synopsys translate_on

// Location: FF_X30_Y2_N11
dffeas \bitCount[4] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\bitCount[4]~16_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(!\state.110~q ),
        .sload(gnd),
        .ena(\bitCount[4]~11_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(bitCount[4]),
        .prn(vcc));
// synopsys translate_off
defparam \bitCount[4] .is_wysiwyg = "true";
defparam \bitCount[4] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X30_Y2_N12
cycloneiv_lcell_comb \bitCount[5]~18 (
// Equation(s):
// \bitCount[5]~18_combout  = (bitCount[5] & (!\bitCount[4]~17 )) # (!bitCount[5] & ((\bitCount[4]~17 ) # (GND)))
// \bitCount[5]~19  = CARRY((!\bitCount[4]~17 ) # (!bitCount[5]))

        .dataa(bitCount[5]),
        .datab(gnd),
        .datac(gnd),
        .datad(vcc),
        .cin(\bitCount[4]~17 ),
        .combout(\bitCount[5]~18_combout ),
        .cout(\bitCount[5]~19 ));
// synopsys translate_off
defparam \bitCount[5]~18 .lut_mask = 16'h5A5F;
defparam \bitCount[5]~18 .sum_lutc_input = "cin";
// synopsys translate_on

// Location: FF_X30_Y2_N13
dffeas \bitCount[5] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\bitCount[5]~18_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(!\state.110~q ),
        .sload(gnd),
        .ena(\bitCount[4]~11_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(bitCount[5]),
        .prn(vcc));
// synopsys translate_off
defparam \bitCount[5] .is_wysiwyg = "true";
defparam \bitCount[5] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X29_Y2_N16
cycloneiv_lcell_comb \wb_interface|size[5]~feeder (
// Equation(s):
// \wb_interface|size[5]~feeder_combout  = \wb_dat_i[5]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[5]~input_o ),
        .cin(gnd),
        .combout(\wb_interface|size[5]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|size[5]~feeder .lut_mask = 16'hFF00;
defparam \wb_interface|size[5]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X29_Y2_N17
dffeas \wb_interface|size[5] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\wb_interface|size[5]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\wb_interface|always5~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|size [5]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|size[5] .is_wysiwyg = "true";
defparam \wb_interface|size[5] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X29_Y2_N14
cycloneiv_lcell_comb \Equal2~2 (
// Equation(s):
// \Equal2~2_combout  = (\wb_interface|size [4] & (bitCount[4] & (bitCount[5] $ (!\wb_interface|size [5])))) # (!\wb_interface|size [4] & (!bitCount[4] & (bitCount[5] $ (!\wb_interface|size [5]))))

        .dataa(\wb_interface|size [4]),
        .datab(bitCount[4]),
        .datac(bitCount[5]),
        .datad(\wb_interface|size [5]),
        .cin(gnd),
        .combout(\Equal2~2_combout ),
        .cout());
// synopsys translate_off
defparam \Equal2~2 .lut_mask = 16'h9009;
defparam \Equal2~2 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X30_Y2_N14
cycloneiv_lcell_comb \bitCount[6]~20 (
// Equation(s):
// \bitCount[6]~20_combout  = bitCount[6] $ (!\bitCount[5]~19 )

        .dataa(gnd),
        .datab(bitCount[6]),
        .datac(gnd),
        .datad(gnd),
        .cin(\bitCount[5]~19 ),
        .combout(\bitCount[6]~20_combout ),
        .cout());
// synopsys translate_off
defparam \bitCount[6]~20 .lut_mask = 16'hC3C3;
defparam \bitCount[6]~20 .sum_lutc_input = "cin";
// synopsys translate_on

// Location: FF_X30_Y2_N15
dffeas \bitCount[6] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\bitCount[6]~20_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(!\state.110~q ),
        .sload(gnd),
        .ena(\bitCount[4]~11_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(bitCount[6]),
        .prn(vcc));
// synopsys translate_off
defparam \bitCount[6] .is_wysiwyg = "true";
defparam \bitCount[6] .power_up = "low";
// synopsys translate_on

// Location: FF_X29_Y2_N25
dffeas \wb_interface|size[6] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[6]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always5~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|size [6]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|size[6] .is_wysiwyg = "true";
defparam \wb_interface|size[6] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X29_Y2_N4
cycloneiv_lcell_comb \Equal2~3 (
// Equation(s):
// \Equal2~3_combout  = bitCount[6] $ (\wb_interface|size [6])

        .dataa(gnd),
        .datab(gnd),
        .datac(bitCount[6]),
        .datad(\wb_interface|size [6]),
        .cin(gnd),
        .combout(\Equal2~3_combout ),
        .cout());
// synopsys translate_off
defparam \Equal2~3 .lut_mask = 16'h0FF0;
defparam \Equal2~3 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X29_Y2_N21
dffeas \wb_interface|size[3] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[3]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always5~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|size [3]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|size[3] .is_wysiwyg = "true";
defparam \wb_interface|size[3] .power_up = "low";
// synopsys translate_on

// Location: FF_X29_Y2_N19
dffeas \wb_interface|size[2] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[2]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always5~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|size [2]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|size[2] .is_wysiwyg = "true";
defparam \wb_interface|size[2] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X29_Y2_N12
cycloneiv_lcell_comb \Equal2~1 (
// Equation(s):
// \Equal2~1_combout  = (bitCount[2] & (\wb_interface|size [2] & (\wb_interface|size [3] $ (!bitCount[3])))) # (!bitCount[2] & (!\wb_interface|size [2] & (\wb_interface|size [3] $ (!bitCount[3]))))

        .dataa(bitCount[2]),
        .datab(\wb_interface|size [3]),
        .datac(bitCount[3]),
        .datad(\wb_interface|size [2]),
        .cin(gnd),
        .combout(\Equal2~1_combout ),
        .cout());
// synopsys translate_off
defparam \Equal2~1 .lut_mask = 16'h8241;
defparam \Equal2~1 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X29_Y2_N26
cycloneiv_lcell_comb \Equal2~4 (
// Equation(s):
// \Equal2~4_combout  = (\Equal2~0_combout  & (\Equal2~2_combout  & (!\Equal2~3_combout  & \Equal2~1_combout )))

        .dataa(\Equal2~0_combout ),
        .datab(\Equal2~2_combout ),
        .datac(\Equal2~3_combout ),
        .datad(\Equal2~1_combout ),
        .cin(gnd),
        .combout(\Equal2~4_combout ),
        .cout());
// synopsys translate_off
defparam \Equal2~4 .lut_mask = 16'h0800;
defparam \Equal2~4 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X28_Y3_N26
cycloneiv_lcell_comb \Selector4~1 (
// Equation(s):
// \Selector4~1_combout  = (\Selector4~0_combout  & (((\state.111~q  & !\Equal3~20_combout )) # (!\Equal2~4_combout ))) # (!\Selector4~0_combout  & (((\state.111~q  & !\Equal3~20_combout ))))

        .dataa(\Selector4~0_combout ),
        .datab(\Equal2~4_combout ),
        .datac(\state.111~q ),
        .datad(\Equal3~20_combout ),
        .cin(gnd),
        .combout(\Selector4~1_combout ),
        .cout());
// synopsys translate_off
defparam \Selector4~1 .lut_mask = 16'h22F2;
defparam \Selector4~1 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X28_Y3_N27
dffeas \state.111 (
        .clk(\wb_clk_i~inputclkctrl_outclk ),
        .d(\Selector4~1_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\state.111~q ),
        .prn(vcc));
// synopsys translate_off
defparam \state.111 .is_wysiwyg = "true";
defparam \state.111 .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X27_Y3_N2
cycloneiv_lcell_comb \bit~0 (
// Equation(s):
// \bit~0_combout  = (!\state.111~q  & !\state.100~q )

        .dataa(gnd),
        .datab(\state.111~q ),
        .datac(gnd),
        .datad(\state.100~q ),
        .cin(gnd),
        .combout(\bit~0_combout ),
        .cout());
// synopsys translate_off
defparam \bit~0 .lut_mask = 16'h0033;
defparam \bit~0 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X26_Y4_N1
dffeas \pulseCnt[0] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\pulseCnt[0]~32_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(\bit~0_combout ),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(pulseCnt[0]),
        .prn(vcc));
// synopsys translate_off
defparam \pulseCnt[0] .is_wysiwyg = "true";
defparam \pulseCnt[0] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X26_Y4_N2
cycloneiv_lcell_comb \pulseCnt[1]~34 (
// Equation(s):
// \pulseCnt[1]~34_combout  = (pulseCnt[1] & (!\pulseCnt[0]~33 )) # (!pulseCnt[1] & ((\pulseCnt[0]~33 ) # (GND)))
// \pulseCnt[1]~35  = CARRY((!\pulseCnt[0]~33 ) # (!pulseCnt[1]))

        .dataa(gnd),
        .datab(pulseCnt[1]),
        .datac(gnd),
        .datad(vcc),
        .cin(\pulseCnt[0]~33 ),
        .combout(\pulseCnt[1]~34_combout ),
        .cout(\pulseCnt[1]~35 ));
// synopsys translate_off
defparam \pulseCnt[1]~34 .lut_mask = 16'h3C3F;
defparam \pulseCnt[1]~34 .sum_lutc_input = "cin";
// synopsys translate_on

// Location: FF_X26_Y4_N3
dffeas \pulseCnt[1] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\pulseCnt[1]~34_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(\bit~0_combout ),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(pulseCnt[1]),
        .prn(vcc));
// synopsys translate_off
defparam \pulseCnt[1] .is_wysiwyg = "true";
defparam \pulseCnt[1] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X26_Y4_N4
cycloneiv_lcell_comb \pulseCnt[2]~36 (
// Equation(s):
// \pulseCnt[2]~36_combout  = (pulseCnt[2] & (\pulseCnt[1]~35  $ (GND))) # (!pulseCnt[2] & (!\pulseCnt[1]~35  & VCC))
// \pulseCnt[2]~37  = CARRY((pulseCnt[2] & !\pulseCnt[1]~35 ))

        .dataa(gnd),
        .datab(pulseCnt[2]),
        .datac(gnd),
        .datad(vcc),
        .cin(\pulseCnt[1]~35 ),
        .combout(\pulseCnt[2]~36_combout ),
        .cout(\pulseCnt[2]~37 ));
// synopsys translate_off
defparam \pulseCnt[2]~36 .lut_mask = 16'hC30C;
defparam \pulseCnt[2]~36 .sum_lutc_input = "cin";
// synopsys translate_on

// Location: FF_X26_Y4_N5
dffeas \pulseCnt[2] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\pulseCnt[2]~36_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(\bit~0_combout ),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(pulseCnt[2]),
        .prn(vcc));
// synopsys translate_off
defparam \pulseCnt[2] .is_wysiwyg = "true";
defparam \pulseCnt[2] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X26_Y4_N6
cycloneiv_lcell_comb \pulseCnt[3]~38 (
// Equation(s):
// \pulseCnt[3]~38_combout  = (pulseCnt[3] & (!\pulseCnt[2]~37 )) # (!pulseCnt[3] & ((\pulseCnt[2]~37 ) # (GND)))
// \pulseCnt[3]~39  = CARRY((!\pulseCnt[2]~37 ) # (!pulseCnt[3]))

        .dataa(pulseCnt[3]),
        .datab(gnd),
        .datac(gnd),
        .datad(vcc),
        .cin(\pulseCnt[2]~37 ),
        .combout(\pulseCnt[3]~38_combout ),
        .cout(\pulseCnt[3]~39 ));
// synopsys translate_off
defparam \pulseCnt[3]~38 .lut_mask = 16'h5A5F;
defparam \pulseCnt[3]~38 .sum_lutc_input = "cin";
// synopsys translate_on

// Location: FF_X26_Y4_N7
dffeas \pulseCnt[3] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\pulseCnt[3]~38_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(\bit~0_combout ),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(pulseCnt[3]),
        .prn(vcc));
// synopsys translate_off
defparam \pulseCnt[3] .is_wysiwyg = "true";
defparam \pulseCnt[3] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X26_Y4_N8
cycloneiv_lcell_comb \pulseCnt[4]~40 (
// Equation(s):
// \pulseCnt[4]~40_combout  = (pulseCnt[4] & (\pulseCnt[3]~39  $ (GND))) # (!pulseCnt[4] & (!\pulseCnt[3]~39  & VCC))
// \pulseCnt[4]~41  = CARRY((pulseCnt[4] & !\pulseCnt[3]~39 ))

        .dataa(gnd),
        .datab(pulseCnt[4]),
        .datac(gnd),
        .datad(vcc),
        .cin(\pulseCnt[3]~39 ),
        .combout(\pulseCnt[4]~40_combout ),
        .cout(\pulseCnt[4]~41 ));
// synopsys translate_off
defparam \pulseCnt[4]~40 .lut_mask = 16'hC30C;
defparam \pulseCnt[4]~40 .sum_lutc_input = "cin";
// synopsys translate_on

// Location: FF_X26_Y4_N9
dffeas \pulseCnt[4] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\pulseCnt[4]~40_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(\bit~0_combout ),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(pulseCnt[4]),
        .prn(vcc));
// synopsys translate_off
defparam \pulseCnt[4] .is_wysiwyg = "true";
defparam \pulseCnt[4] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X26_Y4_N10
cycloneiv_lcell_comb \pulseCnt[5]~42 (
// Equation(s):
// \pulseCnt[5]~42_combout  = (pulseCnt[5] & (!\pulseCnt[4]~41 )) # (!pulseCnt[5] & ((\pulseCnt[4]~41 ) # (GND)))
// \pulseCnt[5]~43  = CARRY((!\pulseCnt[4]~41 ) # (!pulseCnt[5]))

        .dataa(pulseCnt[5]),
        .datab(gnd),
        .datac(gnd),
        .datad(vcc),
        .cin(\pulseCnt[4]~41 ),
        .combout(\pulseCnt[5]~42_combout ),
        .cout(\pulseCnt[5]~43 ));
// synopsys translate_off
defparam \pulseCnt[5]~42 .lut_mask = 16'h5A5F;
defparam \pulseCnt[5]~42 .sum_lutc_input = "cin";
// synopsys translate_on

// Location: FF_X26_Y4_N11
dffeas \pulseCnt[5] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\pulseCnt[5]~42_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(\bit~0_combout ),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(pulseCnt[5]),
        .prn(vcc));
// synopsys translate_off
defparam \pulseCnt[5] .is_wysiwyg = "true";
defparam \pulseCnt[5] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X26_Y4_N12
cycloneiv_lcell_comb \pulseCnt[6]~44 (
// Equation(s):
// \pulseCnt[6]~44_combout  = (pulseCnt[6] & (\pulseCnt[5]~43  $ (GND))) # (!pulseCnt[6] & (!\pulseCnt[5]~43  & VCC))
// \pulseCnt[6]~45  = CARRY((pulseCnt[6] & !\pulseCnt[5]~43 ))

        .dataa(pulseCnt[6]),
        .datab(gnd),
        .datac(gnd),
        .datad(vcc),
        .cin(\pulseCnt[5]~43 ),
        .combout(\pulseCnt[6]~44_combout ),
        .cout(\pulseCnt[6]~45 ));
// synopsys translate_off
defparam \pulseCnt[6]~44 .lut_mask = 16'hA50A;
defparam \pulseCnt[6]~44 .sum_lutc_input = "cin";
// synopsys translate_on

// Location: FF_X26_Y4_N13
dffeas \pulseCnt[6] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\pulseCnt[6]~44_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(\bit~0_combout ),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(pulseCnt[6]),
        .prn(vcc));
// synopsys translate_off
defparam \pulseCnt[6] .is_wysiwyg = "true";
defparam \pulseCnt[6] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X26_Y4_N14
cycloneiv_lcell_comb \pulseCnt[7]~46 (
// Equation(s):
// \pulseCnt[7]~46_combout  = (pulseCnt[7] & (!\pulseCnt[6]~45 )) # (!pulseCnt[7] & ((\pulseCnt[6]~45 ) # (GND)))
// \pulseCnt[7]~47  = CARRY((!\pulseCnt[6]~45 ) # (!pulseCnt[7]))

        .dataa(gnd),
        .datab(pulseCnt[7]),
        .datac(gnd),
        .datad(vcc),
        .cin(\pulseCnt[6]~45 ),
        .combout(\pulseCnt[7]~46_combout ),
        .cout(\pulseCnt[7]~47 ));
// synopsys translate_off
defparam \pulseCnt[7]~46 .lut_mask = 16'h3C3F;
defparam \pulseCnt[7]~46 .sum_lutc_input = "cin";
// synopsys translate_on

// Location: FF_X26_Y4_N15
dffeas \pulseCnt[7] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\pulseCnt[7]~46_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(\bit~0_combout ),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(pulseCnt[7]),
        .prn(vcc));
// synopsys translate_off
defparam \pulseCnt[7] .is_wysiwyg = "true";
defparam \pulseCnt[7] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X26_Y4_N16
cycloneiv_lcell_comb \pulseCnt[8]~48 (
// Equation(s):
// \pulseCnt[8]~48_combout  = (pulseCnt[8] & (\pulseCnt[7]~47  $ (GND))) # (!pulseCnt[8] & (!\pulseCnt[7]~47  & VCC))
// \pulseCnt[8]~49  = CARRY((pulseCnt[8] & !\pulseCnt[7]~47 ))

        .dataa(gnd),
        .datab(pulseCnt[8]),
        .datac(gnd),
        .datad(vcc),
        .cin(\pulseCnt[7]~47 ),
        .combout(\pulseCnt[8]~48_combout ),
        .cout(\pulseCnt[8]~49 ));
// synopsys translate_off
defparam \pulseCnt[8]~48 .lut_mask = 16'hC30C;
defparam \pulseCnt[8]~48 .sum_lutc_input = "cin";
// synopsys translate_on

// Location: FF_X26_Y4_N17
dffeas \pulseCnt[8] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\pulseCnt[8]~48_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(\bit~0_combout ),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(pulseCnt[8]),
        .prn(vcc));
// synopsys translate_off
defparam \pulseCnt[8] .is_wysiwyg = "true";
defparam \pulseCnt[8] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X26_Y4_N18
cycloneiv_lcell_comb \pulseCnt[9]~50 (
// Equation(s):
// \pulseCnt[9]~50_combout  = (pulseCnt[9] & (!\pulseCnt[8]~49 )) # (!pulseCnt[9] & ((\pulseCnt[8]~49 ) # (GND)))
// \pulseCnt[9]~51  = CARRY((!\pulseCnt[8]~49 ) # (!pulseCnt[9]))

        .dataa(gnd),
        .datab(pulseCnt[9]),
        .datac(gnd),
        .datad(vcc),
        .cin(\pulseCnt[8]~49 ),
        .combout(\pulseCnt[9]~50_combout ),
        .cout(\pulseCnt[9]~51 ));
// synopsys translate_off
defparam \pulseCnt[9]~50 .lut_mask = 16'h3C3F;
defparam \pulseCnt[9]~50 .sum_lutc_input = "cin";
// synopsys translate_on

// Location: FF_X26_Y4_N19
dffeas \pulseCnt[9] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\pulseCnt[9]~50_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(\bit~0_combout ),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(pulseCnt[9]),
        .prn(vcc));
// synopsys translate_off
defparam \pulseCnt[9] .is_wysiwyg = "true";
defparam \pulseCnt[9] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X26_Y4_N20
cycloneiv_lcell_comb \pulseCnt[10]~52 (
// Equation(s):
// \pulseCnt[10]~52_combout  = (pulseCnt[10] & (\pulseCnt[9]~51  $ (GND))) # (!pulseCnt[10] & (!\pulseCnt[9]~51  & VCC))
// \pulseCnt[10]~53  = CARRY((pulseCnt[10] & !\pulseCnt[9]~51 ))

        .dataa(gnd),
        .datab(pulseCnt[10]),
        .datac(gnd),
        .datad(vcc),
        .cin(\pulseCnt[9]~51 ),
        .combout(\pulseCnt[10]~52_combout ),
        .cout(\pulseCnt[10]~53 ));
// synopsys translate_off
defparam \pulseCnt[10]~52 .lut_mask = 16'hC30C;
defparam \pulseCnt[10]~52 .sum_lutc_input = "cin";
// synopsys translate_on

// Location: FF_X26_Y4_N21
dffeas \pulseCnt[10] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\pulseCnt[10]~52_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(\bit~0_combout ),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(pulseCnt[10]),
        .prn(vcc));
// synopsys translate_off
defparam \pulseCnt[10] .is_wysiwyg = "true";
defparam \pulseCnt[10] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X26_Y4_N22
cycloneiv_lcell_comb \pulseCnt[11]~54 (
// Equation(s):
// \pulseCnt[11]~54_combout  = (pulseCnt[11] & (!\pulseCnt[10]~53 )) # (!pulseCnt[11] & ((\pulseCnt[10]~53 ) # (GND)))
// \pulseCnt[11]~55  = CARRY((!\pulseCnt[10]~53 ) # (!pulseCnt[11]))

        .dataa(pulseCnt[11]),
        .datab(gnd),
        .datac(gnd),
        .datad(vcc),
        .cin(\pulseCnt[10]~53 ),
        .combout(\pulseCnt[11]~54_combout ),
        .cout(\pulseCnt[11]~55 ));
// synopsys translate_off
defparam \pulseCnt[11]~54 .lut_mask = 16'h5A5F;
defparam \pulseCnt[11]~54 .sum_lutc_input = "cin";
// synopsys translate_on

// Location: FF_X26_Y4_N23
dffeas \pulseCnt[11] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\pulseCnt[11]~54_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(\bit~0_combout ),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(pulseCnt[11]),
        .prn(vcc));
// synopsys translate_off
defparam \pulseCnt[11] .is_wysiwyg = "true";
defparam \pulseCnt[11] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X26_Y4_N24
cycloneiv_lcell_comb \pulseCnt[12]~56 (
// Equation(s):
// \pulseCnt[12]~56_combout  = (pulseCnt[12] & (\pulseCnt[11]~55  $ (GND))) # (!pulseCnt[12] & (!\pulseCnt[11]~55  & VCC))
// \pulseCnt[12]~57  = CARRY((pulseCnt[12] & !\pulseCnt[11]~55 ))

        .dataa(gnd),
        .datab(pulseCnt[12]),
        .datac(gnd),
        .datad(vcc),
        .cin(\pulseCnt[11]~55 ),
        .combout(\pulseCnt[12]~56_combout ),
        .cout(\pulseCnt[12]~57 ));
// synopsys translate_off
defparam \pulseCnt[12]~56 .lut_mask = 16'hC30C;
defparam \pulseCnt[12]~56 .sum_lutc_input = "cin";
// synopsys translate_on

// Location: FF_X26_Y4_N25
dffeas \pulseCnt[12] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\pulseCnt[12]~56_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(\bit~0_combout ),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(pulseCnt[12]),
        .prn(vcc));
// synopsys translate_off
defparam \pulseCnt[12] .is_wysiwyg = "true";
defparam \pulseCnt[12] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X26_Y4_N26
cycloneiv_lcell_comb \pulseCnt[13]~58 (
// Equation(s):
// \pulseCnt[13]~58_combout  = (pulseCnt[13] & (!\pulseCnt[12]~57 )) # (!pulseCnt[13] & ((\pulseCnt[12]~57 ) # (GND)))
// \pulseCnt[13]~59  = CARRY((!\pulseCnt[12]~57 ) # (!pulseCnt[13]))

        .dataa(pulseCnt[13]),
        .datab(gnd),
        .datac(gnd),
        .datad(vcc),
        .cin(\pulseCnt[12]~57 ),
        .combout(\pulseCnt[13]~58_combout ),
        .cout(\pulseCnt[13]~59 ));
// synopsys translate_off
defparam \pulseCnt[13]~58 .lut_mask = 16'h5A5F;
defparam \pulseCnt[13]~58 .sum_lutc_input = "cin";
// synopsys translate_on

// Location: FF_X26_Y4_N27
dffeas \pulseCnt[13] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\pulseCnt[13]~58_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(\bit~0_combout ),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(pulseCnt[13]),
        .prn(vcc));
// synopsys translate_off
defparam \pulseCnt[13] .is_wysiwyg = "true";
defparam \pulseCnt[13] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X26_Y4_N28
cycloneiv_lcell_comb \pulseCnt[14]~60 (
// Equation(s):
// \pulseCnt[14]~60_combout  = (pulseCnt[14] & (\pulseCnt[13]~59  $ (GND))) # (!pulseCnt[14] & (!\pulseCnt[13]~59  & VCC))
// \pulseCnt[14]~61  = CARRY((pulseCnt[14] & !\pulseCnt[13]~59 ))

        .dataa(gnd),
        .datab(pulseCnt[14]),
        .datac(gnd),
        .datad(vcc),
        .cin(\pulseCnt[13]~59 ),
        .combout(\pulseCnt[14]~60_combout ),
        .cout(\pulseCnt[14]~61 ));
// synopsys translate_off
defparam \pulseCnt[14]~60 .lut_mask = 16'hC30C;
defparam \pulseCnt[14]~60 .sum_lutc_input = "cin";
// synopsys translate_on

// Location: FF_X26_Y4_N29
dffeas \pulseCnt[14] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\pulseCnt[14]~60_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(\bit~0_combout ),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(pulseCnt[14]),
        .prn(vcc));
// synopsys translate_off
defparam \pulseCnt[14] .is_wysiwyg = "true";
defparam \pulseCnt[14] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X26_Y4_N30
cycloneiv_lcell_comb \pulseCnt[15]~62 (
// Equation(s):
// \pulseCnt[15]~62_combout  = (pulseCnt[15] & (!\pulseCnt[14]~61 )) # (!pulseCnt[15] & ((\pulseCnt[14]~61 ) # (GND)))
// \pulseCnt[15]~63  = CARRY((!\pulseCnt[14]~61 ) # (!pulseCnt[15]))

        .dataa(pulseCnt[15]),
        .datab(gnd),
        .datac(gnd),
        .datad(vcc),
        .cin(\pulseCnt[14]~61 ),
        .combout(\pulseCnt[15]~62_combout ),
        .cout(\pulseCnt[15]~63 ));
// synopsys translate_off
defparam \pulseCnt[15]~62 .lut_mask = 16'h5A5F;
defparam \pulseCnt[15]~62 .sum_lutc_input = "cin";
// synopsys translate_on

// Location: FF_X26_Y4_N31
dffeas \pulseCnt[15] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\pulseCnt[15]~62_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(\bit~0_combout ),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(pulseCnt[15]),
        .prn(vcc));
// synopsys translate_off
defparam \pulseCnt[15] .is_wysiwyg = "true";
defparam \pulseCnt[15] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X26_Y3_N0
cycloneiv_lcell_comb \pulseCnt[16]~64 (
// Equation(s):
// \pulseCnt[16]~64_combout  = (pulseCnt[16] & (\pulseCnt[15]~63  $ (GND))) # (!pulseCnt[16] & (!\pulseCnt[15]~63  & VCC))
// \pulseCnt[16]~65  = CARRY((pulseCnt[16] & !\pulseCnt[15]~63 ))

        .dataa(gnd),
        .datab(pulseCnt[16]),
        .datac(gnd),
        .datad(vcc),
        .cin(\pulseCnt[15]~63 ),
        .combout(\pulseCnt[16]~64_combout ),
        .cout(\pulseCnt[16]~65 ));
// synopsys translate_off
defparam \pulseCnt[16]~64 .lut_mask = 16'hC30C;
defparam \pulseCnt[16]~64 .sum_lutc_input = "cin";
// synopsys translate_on

// Location: FF_X26_Y3_N1
dffeas \pulseCnt[16] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\pulseCnt[16]~64_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(\bit~0_combout ),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(pulseCnt[16]),
        .prn(vcc));
// synopsys translate_off
defparam \pulseCnt[16] .is_wysiwyg = "true";
defparam \pulseCnt[16] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X26_Y3_N2
cycloneiv_lcell_comb \pulseCnt[17]~66 (
// Equation(s):
// \pulseCnt[17]~66_combout  = (pulseCnt[17] & (!\pulseCnt[16]~65 )) # (!pulseCnt[17] & ((\pulseCnt[16]~65 ) # (GND)))
// \pulseCnt[17]~67  = CARRY((!\pulseCnt[16]~65 ) # (!pulseCnt[17]))

        .dataa(gnd),
        .datab(pulseCnt[17]),
        .datac(gnd),
        .datad(vcc),
        .cin(\pulseCnt[16]~65 ),
        .combout(\pulseCnt[17]~66_combout ),
        .cout(\pulseCnt[17]~67 ));
// synopsys translate_off
defparam \pulseCnt[17]~66 .lut_mask = 16'h3C3F;
defparam \pulseCnt[17]~66 .sum_lutc_input = "cin";
// synopsys translate_on

// Location: FF_X26_Y3_N3
dffeas \pulseCnt[17] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\pulseCnt[17]~66_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(\bit~0_combout ),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(pulseCnt[17]),
        .prn(vcc));
// synopsys translate_off
defparam \pulseCnt[17] .is_wysiwyg = "true";
defparam \pulseCnt[17] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X26_Y3_N4
cycloneiv_lcell_comb \pulseCnt[18]~68 (
// Equation(s):
// \pulseCnt[18]~68_combout  = (pulseCnt[18] & (\pulseCnt[17]~67  $ (GND))) # (!pulseCnt[18] & (!\pulseCnt[17]~67  & VCC))
// \pulseCnt[18]~69  = CARRY((pulseCnt[18] & !\pulseCnt[17]~67 ))

        .dataa(gnd),
        .datab(pulseCnt[18]),
        .datac(gnd),
        .datad(vcc),
        .cin(\pulseCnt[17]~67 ),
        .combout(\pulseCnt[18]~68_combout ),
        .cout(\pulseCnt[18]~69 ));
// synopsys translate_off
defparam \pulseCnt[18]~68 .lut_mask = 16'hC30C;
defparam \pulseCnt[18]~68 .sum_lutc_input = "cin";
// synopsys translate_on

// Location: FF_X26_Y3_N5
dffeas \pulseCnt[18] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\pulseCnt[18]~68_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(\bit~0_combout ),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(pulseCnt[18]),
        .prn(vcc));
// synopsys translate_off
defparam \pulseCnt[18] .is_wysiwyg = "true";
defparam \pulseCnt[18] .power_up = "low";
// synopsys translate_on

// Location: FF_X26_Y3_N7
dffeas \pulseCnt[19] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\pulseCnt[19]~70_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(\bit~0_combout ),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(pulseCnt[19]),
        .prn(vcc));
// synopsys translate_off
defparam \pulseCnt[19] .is_wysiwyg = "true";
defparam \pulseCnt[19] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X25_Y3_N20
cycloneiv_lcell_comb \wb_interface|pulsewidth[18]~feeder (
// Equation(s):
// \wb_interface|pulsewidth[18]~feeder_combout  = \wb_dat_i[18]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[18]~input_o ),
        .cin(gnd),
        .combout(\wb_interface|pulsewidth[18]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|pulsewidth[18]~feeder .lut_mask = 16'hFF00;
defparam \wb_interface|pulsewidth[18]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X25_Y3_N21
dffeas \wb_interface|pulsewidth[18] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\wb_interface|pulsewidth[18]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\wb_interface|always3~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|pulsewidth [18]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|pulsewidth[18] .is_wysiwyg = "true";
defparam \wb_interface|pulsewidth[18] .power_up = "low";
// synopsys translate_on

// Location: FF_X25_Y3_N5
dffeas \wb_interface|pulsewidth[19] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[19]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always3~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|pulsewidth [19]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|pulsewidth[19] .is_wysiwyg = "true";
defparam \wb_interface|pulsewidth[19] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X25_Y3_N30
cycloneiv_lcell_comb \Equal3~11 (
// Equation(s):
// \Equal3~11_combout  = (pulseCnt[19] & (\wb_interface|pulsewidth [19] & (\wb_interface|pulsewidth [18] $ (!pulseCnt[18])))) # (!pulseCnt[19] & (!\wb_interface|pulsewidth [19] & (\wb_interface|pulsewidth [18] $ (!pulseCnt[18]))))

        .dataa(pulseCnt[19]),
        .datab(\wb_interface|pulsewidth [18]),
        .datac(\wb_interface|pulsewidth [19]),
        .datad(pulseCnt[18]),
        .cin(gnd),
        .combout(\Equal3~11_combout ),
        .cout());
// synopsys translate_off
defparam \Equal3~11 .lut_mask = 16'h8421;
defparam \Equal3~11 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X27_Y3_N1
dffeas \wb_interface|pulsewidth[17] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[17]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always3~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|pulsewidth [17]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|pulsewidth[17] .is_wysiwyg = "true";
defparam \wb_interface|pulsewidth[17] .power_up = "low";
// synopsys translate_on

// Location: FF_X27_Y3_N21
dffeas \wb_interface|pulsewidth[16] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[16]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always3~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|pulsewidth [16]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|pulsewidth[16] .is_wysiwyg = "true";
defparam \wb_interface|pulsewidth[16] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X27_Y3_N20
cycloneiv_lcell_comb \Equal3~10 (
// Equation(s):
// \Equal3~10_combout  = (pulseCnt[16] & (\wb_interface|pulsewidth [16] & (\wb_interface|pulsewidth [17] $ (!pulseCnt[17])))) # (!pulseCnt[16] & (!\wb_interface|pulsewidth [16] & (\wb_interface|pulsewidth [17] $ (!pulseCnt[17]))))

        .dataa(pulseCnt[16]),
        .datab(\wb_interface|pulsewidth [17]),
        .datac(\wb_interface|pulsewidth [16]),
        .datad(pulseCnt[17]),
        .cin(gnd),
        .combout(\Equal3~10_combout ),
        .cout());
// synopsys translate_off
defparam \Equal3~10 .lut_mask = 16'h8421;
defparam \Equal3~10 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X25_Y3_N0
cycloneiv_lcell_comb \wb_interface|pulsewidth[20]~feeder (
// Equation(s):
// \wb_interface|pulsewidth[20]~feeder_combout  = \wb_dat_i[20]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[20]~input_o ),
        .cin(gnd),
        .combout(\wb_interface|pulsewidth[20]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|pulsewidth[20]~feeder .lut_mask = 16'hFF00;
defparam \wb_interface|pulsewidth[20]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X25_Y3_N1
dffeas \wb_interface|pulsewidth[20] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\wb_interface|pulsewidth[20]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\wb_interface|always3~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|pulsewidth [20]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|pulsewidth[20] .is_wysiwyg = "true";
defparam \wb_interface|pulsewidth[20] .power_up = "low";
// synopsys translate_on

// Location: FF_X25_Y3_N9
dffeas \wb_interface|pulsewidth[21] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[21]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always3~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|pulsewidth [21]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|pulsewidth[21] .is_wysiwyg = "true";
defparam \wb_interface|pulsewidth[21] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X25_Y3_N28
cycloneiv_lcell_comb \Equal3~12 (
// Equation(s):
// \Equal3~12_combout  = (\wb_interface|pulsewidth [20] & (pulseCnt[20] & (pulseCnt[21] $ (!\wb_interface|pulsewidth [21])))) # (!\wb_interface|pulsewidth [20] & (!pulseCnt[20] & (pulseCnt[21] $ (!\wb_interface|pulsewidth [21]))))

        .dataa(\wb_interface|pulsewidth [20]),
        .datab(pulseCnt[20]),
        .datac(pulseCnt[21]),
        .datad(\wb_interface|pulsewidth [21]),
        .cin(gnd),
        .combout(\Equal3~12_combout ),
        .cout());
// synopsys translate_off
defparam \Equal3~12 .lut_mask = 16'h9009;
defparam \Equal3~12 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X25_Y3_N6
cycloneiv_lcell_comb \wb_interface|pulsewidth[22]~feeder (
// Equation(s):
// \wb_interface|pulsewidth[22]~feeder_combout  = \wb_dat_i[22]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[22]~input_o ),
        .cin(gnd),
        .combout(\wb_interface|pulsewidth[22]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|pulsewidth[22]~feeder .lut_mask = 16'hFF00;
defparam \wb_interface|pulsewidth[22]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X25_Y3_N7
dffeas \wb_interface|pulsewidth[22] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\wb_interface|pulsewidth[22]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\wb_interface|always3~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|pulsewidth [22]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|pulsewidth[22] .is_wysiwyg = "true";
defparam \wb_interface|pulsewidth[22] .power_up = "low";
// synopsys translate_on

// Location: FF_X25_Y3_N25
dffeas \wb_interface|pulsewidth[23] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[23]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always3~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|pulsewidth [23]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|pulsewidth[23] .is_wysiwyg = "true";
defparam \wb_interface|pulsewidth[23] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X25_Y3_N14
cycloneiv_lcell_comb \Equal3~13 (
// Equation(s):
// \Equal3~13_combout  = (\wb_interface|pulsewidth [22] & (pulseCnt[22] & (pulseCnt[23] $ (!\wb_interface|pulsewidth [23])))) # (!\wb_interface|pulsewidth [22] & (!pulseCnt[22] & (pulseCnt[23] $ (!\wb_interface|pulsewidth [23]))))

        .dataa(\wb_interface|pulsewidth [22]),
        .datab(pulseCnt[22]),
        .datac(pulseCnt[23]),
        .datad(\wb_interface|pulsewidth [23]),
        .cin(gnd),
        .combout(\Equal3~13_combout ),
        .cout());
// synopsys translate_off
defparam \Equal3~13 .lut_mask = 16'h9009;
defparam \Equal3~13 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X28_Y3_N30
cycloneiv_lcell_comb \Equal3~14 (
// Equation(s):
// \Equal3~14_combout  = (\Equal3~11_combout  & (\Equal3~10_combout  & (\Equal3~12_combout  & \Equal3~13_combout )))

        .dataa(\Equal3~11_combout ),
        .datab(\Equal3~10_combout ),
        .datac(\Equal3~12_combout ),
        .datad(\Equal3~13_combout ),
        .cin(gnd),
        .combout(\Equal3~14_combout ),
        .cout());
// synopsys translate_off
defparam \Equal3~14 .lut_mask = 16'h8000;
defparam \Equal3~14 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X28_Y3_N18
cycloneiv_lcell_comb \next_state.110~0 (
// Equation(s):
// \next_state.110~0_combout  = (\state.111~q  & \Equal3~9_combout )

        .dataa(gnd),
        .datab(gnd),
        .datac(\state.111~q ),
        .datad(\Equal3~9_combout ),
        .cin(gnd),
        .combout(\next_state.110~0_combout ),
        .cout());
// synopsys translate_off
defparam \next_state.110~0 .lut_mask = 16'hF000;
defparam \next_state.110~0 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X28_Y3_N4
cycloneiv_lcell_comb \next_state.110~1 (
// Equation(s):
// \next_state.110~1_combout  = (\Equal3~14_combout  & (\Equal3~19_combout  & (\Equal3~4_combout  & \next_state.110~0_combout )))

        .dataa(\Equal3~14_combout ),
        .datab(\Equal3~19_combout ),
        .datac(\Equal3~4_combout ),
        .datad(\next_state.110~0_combout ),
        .cin(gnd),
        .combout(\next_state.110~1_combout ),
        .cout());
// synopsys translate_off
defparam \next_state.110~1 .lut_mask = 16'h8000;
defparam \next_state.110~1 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X28_Y3_N5
dffeas \state.110 (
        .clk(\wb_clk_i~inputclkctrl_outclk ),
        .d(\next_state.110~1_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\state.110~q ),
        .prn(vcc));
// synopsys translate_off
defparam \state.110 .is_wysiwyg = "true";
defparam \state.110 .power_up = "low";
// synopsys translate_on

// Location: FF_X31_Y2_N5
dffeas \bitCountReg[0] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\bitCountReg[0]~8_combout ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(!\state.110~q ),
        .sload(vcc),
        .ena(\bitCountReg[3]~7_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(bitCountReg[0]),
        .prn(vcc));
// synopsys translate_off
defparam \bitCountReg[0] .is_wysiwyg = "true";
defparam \bitCountReg[0] .power_up = "low";
// synopsys translate_on

// Location: FF_X30_Y2_N21
dffeas \bitCountReg[1] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\bitCountReg[1]~10_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(!\state.110~q ),
        .sload(gnd),
        .ena(\bitCountReg[3]~7_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(bitCountReg[1]),
        .prn(vcc));
// synopsys translate_off
defparam \bitCountReg[1] .is_wysiwyg = "true";
defparam \bitCountReg[1] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X31_Y2_N16
cycloneiv_lcell_comb \Equal0~0 (
// Equation(s):
// \Equal0~0_combout  = (!bitCountReg[1] & (!bitCountReg[3] & (!bitCountReg[0] & !bitCountReg[2])))

        .dataa(bitCountReg[1]),
        .datab(bitCountReg[3]),
        .datac(bitCountReg[0]),
        .datad(bitCountReg[2]),
        .cin(gnd),
        .combout(\Equal0~0_combout ),
        .cout());
// synopsys translate_off
defparam \Equal0~0 .lut_mask = 16'h0001;
defparam \Equal0~0 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X29_Y2_N28
cycloneiv_lcell_comb \Selector1~0 (
// Equation(s):
// \Selector1~0_combout  = (\state.101~q  & (bitCountReg[5] & (!bitCountReg[6] & !bitCountReg[4])))

        .dataa(\state.101~q ),
        .datab(bitCountReg[5]),
        .datac(bitCountReg[6]),
        .datad(bitCountReg[4]),
        .cin(gnd),
        .combout(\Selector1~0_combout ),
        .cout());
// synopsys translate_off
defparam \Selector1~0 .lut_mask = 16'h0008;
defparam \Selector1~0 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X29_Y2_N0
cycloneiv_lcell_comb \Selector1~1 (
// Equation(s):
// \Selector1~1_combout  = (\Equal0~0_combout  & ((\Selector1~0_combout ) # ((!\state.000~q  & \wb_interface|size [7])))) # (!\Equal0~0_combout  & (!\state.000~q  & (\wb_interface|size [7])))

        .dataa(\Equal0~0_combout ),
        .datab(\state.000~q ),
        .datac(\wb_interface|size [7]),
        .datad(\Selector1~0_combout ),
        .cin(gnd),
        .combout(\Selector1~1_combout ),
        .cout());
// synopsys translate_off
defparam \Selector1~1 .lut_mask = 16'hBA30;
defparam \Selector1~1 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X29_Y2_N1
dffeas \state.001 (
        .clk(\wb_clk_i~inputclkctrl_outclk ),
        .d(\Selector1~1_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\state.001~q ),
        .prn(vcc));
// synopsys translate_off
defparam \state.001 .is_wysiwyg = "true";
defparam \state.001 .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X28_Y4_N28
cycloneiv_lcell_comb \lock_cfg~0 (
// Equation(s):
// \lock_cfg~0_combout  = (\state.001~q ) # ((\state.110~q ) # ((\state.101~q ) # (!\bit~0_combout )))

        .dataa(\state.001~q ),
        .datab(\state.110~q ),
        .datac(\bit~0_combout ),
        .datad(\state.101~q ),
        .cin(gnd),
        .combout(\lock_cfg~0_combout ),
        .cout());
// synopsys translate_off
defparam \lock_cfg~0 .lut_mask = 16'hFFEF;
defparam \lock_cfg~0 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X28_Y4_N29
dffeas lock_cfg(
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\lock_cfg~0_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\lock_cfg~q ),
        .prn(vcc));
// synopsys translate_off
defparam lock_cfg.is_wysiwyg = "true";
defparam lock_cfg.power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X28_Y4_N0
cycloneiv_lcell_comb \wb_interface|always5~0 (
// Equation(s):
// \wb_interface|always5~0_combout  = (\wb_interface|Equal1~0_combout  & (!\lock_cfg~q  & (\wb_interface|wb_dat_o~1_combout  & \wb_we_i~input_o )))

        .dataa(\wb_interface|Equal1~0_combout ),
        .datab(\lock_cfg~q ),
        .datac(\wb_interface|wb_dat_o~1_combout ),
        .datad(\wb_we_i~input_o ),
        .cin(gnd),
        .combout(\wb_interface|always5~0_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|always5~0 .lut_mask = 16'h2000;
defparam \wb_interface|always5~0 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X29_Y2_N9
dffeas \wb_interface|size[0] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[0]~input_o ),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\wb_interface|always5~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|size [0]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|size[0] .is_wysiwyg = "true";
defparam \wb_interface|size[0] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X27_Y1_N12
cycloneiv_lcell_comb \wb_interface|wb_dat_rdbk[0]~0 (
// Equation(s):
// \wb_interface|wb_dat_rdbk[0]~0_combout  = (!\wb_interface|Equal1~0_combout  & ((\wb_interface|Equal2~1_combout  & (\wb_interface|p2p [0])) # (!\wb_interface|Equal2~1_combout  & ((\wb_interface|pulsewidth [0])))))

        .dataa(\wb_interface|Equal1~0_combout ),
        .datab(\wb_interface|p2p [0]),
        .datac(\wb_interface|pulsewidth [0]),
        .datad(\wb_interface|Equal2~1_combout ),
        .cin(gnd),
        .combout(\wb_interface|wb_dat_rdbk[0]~0_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|wb_dat_rdbk[0]~0 .lut_mask = 16'h4450;
defparam \wb_interface|wb_dat_rdbk[0]~0 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X27_Y1_N22
cycloneiv_lcell_comb \wb_interface|wb_dat_rdbk[0]~1 (
// Equation(s):
// \wb_interface|wb_dat_rdbk[0]~1_combout  = (\wb_interface|wb_dat_rdbk[0]~0_combout ) # ((\wb_interface|Equal1~0_combout  & \wb_interface|size [0]))

        .dataa(\wb_interface|Equal1~0_combout ),
        .datab(\wb_interface|size [0]),
        .datac(gnd),
        .datad(\wb_interface|wb_dat_rdbk[0]~0_combout ),
        .cin(gnd),
        .combout(\wb_interface|wb_dat_rdbk[0]~1_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|wb_dat_rdbk[0]~1 .lut_mask = 16'hFF88;
defparam \wb_interface|wb_dat_rdbk[0]~1 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X31_Y3_N20
cycloneiv_lcell_comb \wb_interface|wb_dat_o~0 (
// Equation(s):
// \wb_interface|wb_dat_o~0_combout  = (\wb_stb_i~input_o  & (!\wb_we_i~input_o  & \wb_cyc_i~input_o ))

        .dataa(gnd),
        .datab(\wb_stb_i~input_o ),
        .datac(\wb_we_i~input_o ),
        .datad(\wb_cyc_i~input_o ),
        .cin(gnd),
        .combout(\wb_interface|wb_dat_o~0_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|wb_dat_o~0 .lut_mask = 16'h0C00;
defparam \wb_interface|wb_dat_o~0 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X29_Y3_N26
cycloneiv_lcell_comb \wb_interface|wb_dat_rdbk[1]~2 (
// Equation(s):
// \wb_interface|wb_dat_rdbk[1]~2_combout  = (!\wb_interface|Equal1~0_combout  & ((\wb_interface|Equal2~1_combout  & ((\wb_interface|p2p [1]))) # (!\wb_interface|Equal2~1_combout  & (!\wb_interface|pulsewidth [1]))))

        .dataa(\wb_interface|Equal1~0_combout ),
        .datab(\wb_interface|pulsewidth [1]),
        .datac(\wb_interface|p2p [1]),
        .datad(\wb_interface|Equal2~1_combout ),
        .cin(gnd),
        .combout(\wb_interface|wb_dat_rdbk[1]~2_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|wb_dat_rdbk[1]~2 .lut_mask = 16'h5011;
defparam \wb_interface|wb_dat_rdbk[1]~2 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X29_Y2_N24
cycloneiv_lcell_comb \wb_interface|wb_dat_rdbk[1]~3 (
// Equation(s):
// \wb_interface|wb_dat_rdbk[1]~3_combout  = (\wb_interface|wb_dat_rdbk[1]~2_combout ) # ((\wb_interface|size [1] & \wb_interface|Equal1~0_combout ))

        .dataa(\wb_interface|wb_dat_rdbk[1]~2_combout ),
        .datab(\wb_interface|size [1]),
        .datac(gnd),
        .datad(\wb_interface|Equal1~0_combout ),
        .cin(gnd),
        .combout(\wb_interface|wb_dat_rdbk[1]~3_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|wb_dat_rdbk[1]~3 .lut_mask = 16'hEEAA;
defparam \wb_interface|wb_dat_rdbk[1]~3 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X29_Y3_N10
cycloneiv_lcell_comb \wb_interface|wb_dat_rdbk[2]~4 (
// Equation(s):
// \wb_interface|wb_dat_rdbk[2]~4_combout  = (!\wb_interface|Equal1~0_combout  & ((\wb_interface|Equal2~1_combout  & (\wb_interface|p2p [2])) # (!\wb_interface|Equal2~1_combout  & ((\wb_interface|pulsewidth [2])))))

        .dataa(\wb_interface|Equal1~0_combout ),
        .datab(\wb_interface|p2p [2]),
        .datac(\wb_interface|pulsewidth [2]),
        .datad(\wb_interface|Equal2~1_combout ),
        .cin(gnd),
        .combout(\wb_interface|wb_dat_rdbk[2]~4_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|wb_dat_rdbk[2]~4 .lut_mask = 16'h4450;
defparam \wb_interface|wb_dat_rdbk[2]~4 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X29_Y3_N8
cycloneiv_lcell_comb \wb_interface|wb_dat_rdbk[2]~5 (
// Equation(s):
// \wb_interface|wb_dat_rdbk[2]~5_combout  = (\wb_interface|wb_dat_rdbk[2]~4_combout ) # ((\wb_interface|Equal1~0_combout  & \wb_interface|size [2]))

        .dataa(\wb_interface|Equal1~0_combout ),
        .datab(\wb_interface|size [2]),
        .datac(gnd),
        .datad(\wb_interface|wb_dat_rdbk[2]~4_combout ),
        .cin(gnd),
        .combout(\wb_interface|wb_dat_rdbk[2]~5_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|wb_dat_rdbk[2]~5 .lut_mask = 16'hFF88;
defparam \wb_interface|wb_dat_rdbk[2]~5 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X29_Y3_N18
cycloneiv_lcell_comb \wb_interface|wb_dat_rdbk[3]~6 (
// Equation(s):
// \wb_interface|wb_dat_rdbk[3]~6_combout  = (!\wb_interface|Equal1~0_combout  & ((\wb_interface|Equal2~1_combout  & ((\wb_interface|p2p [3]))) # (!\wb_interface|Equal2~1_combout  & (!\wb_interface|pulsewidth [3]))))

        .dataa(\wb_interface|Equal1~0_combout ),
        .datab(\wb_interface|pulsewidth [3]),
        .datac(\wb_interface|p2p [3]),
        .datad(\wb_interface|Equal2~1_combout ),
        .cin(gnd),
        .combout(\wb_interface|wb_dat_rdbk[3]~6_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|wb_dat_rdbk[3]~6 .lut_mask = 16'h5011;
defparam \wb_interface|wb_dat_rdbk[3]~6 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X29_Y2_N18
cycloneiv_lcell_comb \wb_interface|wb_dat_rdbk[3]~7 (
// Equation(s):
// \wb_interface|wb_dat_rdbk[3]~7_combout  = (\wb_interface|wb_dat_rdbk[3]~6_combout ) # ((\wb_interface|Equal1~0_combout  & \wb_interface|size [3]))

        .dataa(\wb_interface|Equal1~0_combout ),
        .datab(\wb_interface|wb_dat_rdbk[3]~6_combout ),
        .datac(gnd),
        .datad(\wb_interface|size [3]),
        .cin(gnd),
        .combout(\wb_interface|wb_dat_rdbk[3]~7_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|wb_dat_rdbk[3]~7 .lut_mask = 16'hEECC;
defparam \wb_interface|wb_dat_rdbk[3]~7 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X27_Y4_N8
cycloneiv_lcell_comb \wb_interface|wb_dat_rdbk[4]~8 (
// Equation(s):
// \wb_interface|wb_dat_rdbk[4]~8_combout  = (!\wb_interface|Equal1~0_combout  & ((\wb_interface|Equal2~1_combout  & ((\wb_interface|p2p [4]))) # (!\wb_interface|Equal2~1_combout  & (\wb_interface|pulsewidth [4]))))

        .dataa(\wb_interface|pulsewidth [4]),
        .datab(\wb_interface|Equal1~0_combout ),
        .datac(\wb_interface|p2p [4]),
        .datad(\wb_interface|Equal2~1_combout ),
        .cin(gnd),
        .combout(\wb_interface|wb_dat_rdbk[4]~8_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|wb_dat_rdbk[4]~8 .lut_mask = 16'h3022;
defparam \wb_interface|wb_dat_rdbk[4]~8 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X29_Y2_N10
cycloneiv_lcell_comb \wb_interface|wb_dat_rdbk[4]~9 (
// Equation(s):
// \wb_interface|wb_dat_rdbk[4]~9_combout  = (\wb_interface|wb_dat_rdbk[4]~8_combout ) # ((\wb_interface|Equal1~0_combout  & \wb_interface|size [4]))

        .dataa(\wb_interface|Equal1~0_combout ),
        .datab(gnd),
        .datac(\wb_interface|size [4]),
        .datad(\wb_interface|wb_dat_rdbk[4]~8_combout ),
        .cin(gnd),
        .combout(\wb_interface|wb_dat_rdbk[4]~9_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|wb_dat_rdbk[4]~9 .lut_mask = 16'hFFA0;
defparam \wb_interface|wb_dat_rdbk[4]~9 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X27_Y4_N2
cycloneiv_lcell_comb \wb_interface|wb_dat_rdbk[5]~10 (
// Equation(s):
// \wb_interface|wb_dat_rdbk[5]~10_combout  = (!\wb_interface|Equal1~0_combout  & ((\wb_interface|Equal2~1_combout  & ((\wb_interface|p2p [5]))) # (!\wb_interface|Equal2~1_combout  & (\wb_interface|pulsewidth [5]))))

        .dataa(\wb_interface|Equal2~1_combout ),
        .datab(\wb_interface|Equal1~0_combout ),
        .datac(\wb_interface|pulsewidth [5]),
        .datad(\wb_interface|p2p [5]),
        .cin(gnd),
        .combout(\wb_interface|wb_dat_rdbk[5]~10_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|wb_dat_rdbk[5]~10 .lut_mask = 16'h3210;
defparam \wb_interface|wb_dat_rdbk[5]~10 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X29_Y2_N20
cycloneiv_lcell_comb \wb_interface|wb_dat_rdbk[5]~11 (
// Equation(s):
// \wb_interface|wb_dat_rdbk[5]~11_combout  = (\wb_interface|wb_dat_rdbk[5]~10_combout ) # ((\wb_interface|size [5] & \wb_interface|Equal1~0_combout ))

        .dataa(\wb_interface|wb_dat_rdbk[5]~10_combout ),
        .datab(\wb_interface|size [5]),
        .datac(gnd),
        .datad(\wb_interface|Equal1~0_combout ),
        .cin(gnd),
        .combout(\wb_interface|wb_dat_rdbk[5]~11_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|wb_dat_rdbk[5]~11 .lut_mask = 16'hEEAA;
defparam \wb_interface|wb_dat_rdbk[5]~11 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X27_Y4_N24
cycloneiv_lcell_comb \wb_interface|wb_dat_rdbk[6]~12 (
// Equation(s):
// \wb_interface|wb_dat_rdbk[6]~12_combout  = (!\wb_interface|Equal1~0_combout  & ((\wb_interface|Equal2~1_combout  & ((\wb_interface|p2p [6]))) # (!\wb_interface|Equal2~1_combout  & (\wb_interface|pulsewidth [6]))))

        .dataa(\wb_interface|pulsewidth [6]),
        .datab(\wb_interface|Equal1~0_combout ),
        .datac(\wb_interface|p2p [6]),
        .datad(\wb_interface|Equal2~1_combout ),
        .cin(gnd),
        .combout(\wb_interface|wb_dat_rdbk[6]~12_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|wb_dat_rdbk[6]~12 .lut_mask = 16'h3022;
defparam \wb_interface|wb_dat_rdbk[6]~12 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X29_Y2_N8
cycloneiv_lcell_comb \wb_interface|wb_dat_rdbk[6]~13 (
// Equation(s):
// \wb_interface|wb_dat_rdbk[6]~13_combout  = (\wb_interface|wb_dat_rdbk[6]~12_combout ) # ((\wb_interface|size [6] & \wb_interface|Equal1~0_combout ))

        .dataa(\wb_interface|wb_dat_rdbk[6]~12_combout ),
        .datab(\wb_interface|size [6]),
        .datac(gnd),
        .datad(\wb_interface|Equal1~0_combout ),
        .cin(gnd),
        .combout(\wb_interface|wb_dat_rdbk[6]~13_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|wb_dat_rdbk[6]~13 .lut_mask = 16'hEEAA;
defparam \wb_interface|wb_dat_rdbk[6]~13 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X27_Y4_N14
cycloneiv_lcell_comb \wb_interface|wb_dat_rdbk[7]~14 (
// Equation(s):
// \wb_interface|wb_dat_rdbk[7]~14_combout  = (!\wb_interface|Equal1~0_combout  & ((\wb_interface|Equal2~1_combout  & (\wb_interface|p2p [7])) # (!\wb_interface|Equal2~1_combout  & ((\wb_interface|pulsewidth [7])))))

        .dataa(\wb_interface|p2p [7]),
        .datab(\wb_interface|Equal1~0_combout ),
        .datac(\wb_interface|pulsewidth [7]),
        .datad(\wb_interface|Equal2~1_combout ),
        .cin(gnd),
        .combout(\wb_interface|wb_dat_rdbk[7]~14_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|wb_dat_rdbk[7]~14 .lut_mask = 16'h2230;
defparam \wb_interface|wb_dat_rdbk[7]~14 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X28_Y4_N22
cycloneiv_lcell_comb \wb_interface|wb_dat_rdbk[7]~15 (
// Equation(s):
// \wb_interface|wb_dat_rdbk[7]~15_combout  = (\wb_interface|wb_dat_rdbk[7]~14_combout ) # ((\wb_interface|size [7] & \wb_interface|Equal1~0_combout ))

        .dataa(\wb_interface|wb_dat_rdbk[7]~14_combout ),
        .datab(\wb_interface|size [7]),
        .datac(\wb_interface|Equal1~0_combout ),
        .datad(gnd),
        .cin(gnd),
        .combout(\wb_interface|wb_dat_rdbk[7]~15_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|wb_dat_rdbk[7]~15 .lut_mask = 16'hEAEA;
defparam \wb_interface|wb_dat_rdbk[7]~15 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X27_Y1_N6
cycloneiv_lcell_comb \wb_interface|size~1 (
// Equation(s):
// \wb_interface|size~1_combout  = (\wb_dat_i[8]~input_o  & \wb_interface|always5~0_combout )

        .dataa(\wb_dat_i[8]~input_o ),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_interface|always5~0_combout ),
        .cin(gnd),
        .combout(\wb_interface|size~1_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|size~1 .lut_mask = 16'hAA00;
defparam \wb_interface|size~1 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X27_Y1_N7
dffeas \wb_interface|size[8] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\wb_interface|size~1_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|size [8]),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|size[8] .is_wysiwyg = "true";
defparam \wb_interface|size[8] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X27_Y4_N4
cycloneiv_lcell_comb \wb_interface|wb_dat_rdbk[8]~16 (
// Equation(s):
// \wb_interface|wb_dat_rdbk[8]~16_combout  = (!\wb_interface|Equal1~0_combout  & ((\wb_interface|Equal2~1_combout  & (\wb_interface|p2p [8])) # (!\wb_interface|Equal2~1_combout  & ((\wb_interface|pulsewidth [8])))))

        .dataa(\wb_interface|Equal2~1_combout ),
        .datab(\wb_interface|Equal1~0_combout ),
        .datac(\wb_interface|p2p [8]),
        .datad(\wb_interface|pulsewidth [8]),
        .cin(gnd),
        .combout(\wb_interface|wb_dat_rdbk[8]~16_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|wb_dat_rdbk[8]~16 .lut_mask = 16'h3120;
defparam \wb_interface|wb_dat_rdbk[8]~16 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X27_Y4_N6
cycloneiv_lcell_comb \wb_interface|wb_dat_rdbk[8]~17 (
// Equation(s):
// \wb_interface|wb_dat_rdbk[8]~17_combout  = (\wb_interface|wb_dat_rdbk[8]~16_combout ) # ((\wb_interface|size [8] & \wb_interface|Equal1~0_combout ))

        .dataa(\wb_interface|size [8]),
        .datab(\wb_interface|Equal1~0_combout ),
        .datac(gnd),
        .datad(\wb_interface|wb_dat_rdbk[8]~16_combout ),
        .cin(gnd),
        .combout(\wb_interface|wb_dat_rdbk[8]~17_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|wb_dat_rdbk[8]~17 .lut_mask = 16'hFF88;
defparam \wb_interface|wb_dat_rdbk[8]~17 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X27_Y4_N16
cycloneiv_lcell_comb \wb_interface|wb_dat_rdbk[9]~18 (
// Equation(s):
// \wb_interface|wb_dat_rdbk[9]~18_combout  = (!\wb_interface|Equal1~0_combout  & ((\wb_interface|Equal2~1_combout  & ((\wb_interface|p2p [9]))) # (!\wb_interface|Equal2~1_combout  & (\wb_interface|pulsewidth [9]))))

        .dataa(\wb_interface|Equal2~1_combout ),
        .datab(\wb_interface|Equal1~0_combout ),
        .datac(\wb_interface|pulsewidth [9]),
        .datad(\wb_interface|p2p [9]),
        .cin(gnd),
        .combout(\wb_interface|wb_dat_rdbk[9]~18_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|wb_dat_rdbk[9]~18 .lut_mask = 16'h3210;
defparam \wb_interface|wb_dat_rdbk[9]~18 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X27_Y3_N28
cycloneiv_lcell_comb \wb_interface|wb_dat_rdbk[10]~19 (
// Equation(s):
// \wb_interface|wb_dat_rdbk[10]~19_combout  = (!\wb_interface|Equal1~0_combout  & ((\wb_interface|Equal2~1_combout  & ((\wb_interface|p2p [10]))) # (!\wb_interface|Equal2~1_combout  & (\wb_interface|pulsewidth [10]))))

        .dataa(\wb_interface|Equal1~0_combout ),
        .datab(\wb_interface|pulsewidth [10]),
        .datac(\wb_interface|p2p [10]),
        .datad(\wb_interface|Equal2~1_combout ),
        .cin(gnd),
        .combout(\wb_interface|wb_dat_rdbk[10]~19_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|wb_dat_rdbk[10]~19 .lut_mask = 16'h5044;
defparam \wb_interface|wb_dat_rdbk[10]~19 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X27_Y3_N22
cycloneiv_lcell_comb \wb_interface|wb_dat_rdbk[11]~20 (
// Equation(s):
// \wb_interface|wb_dat_rdbk[11]~20_combout  = (!\wb_interface|Equal1~0_combout  & ((\wb_interface|Equal2~1_combout  & ((\wb_interface|p2p [11]))) # (!\wb_interface|Equal2~1_combout  & (\wb_interface|pulsewidth [11]))))

        .dataa(\wb_interface|Equal1~0_combout ),
        .datab(\wb_interface|Equal2~1_combout ),
        .datac(\wb_interface|pulsewidth [11]),
        .datad(\wb_interface|p2p [11]),
        .cin(gnd),
        .combout(\wb_interface|wb_dat_rdbk[11]~20_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|wb_dat_rdbk[11]~20 .lut_mask = 16'h5410;
defparam \wb_interface|wb_dat_rdbk[11]~20 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X25_Y3_N16
cycloneiv_lcell_comb \wb_interface|wb_dat_rdbk[12]~21 (
// Equation(s):
// \wb_interface|wb_dat_rdbk[12]~21_combout  = (!\wb_interface|Equal1~0_combout  & ((\wb_interface|Equal2~1_combout  & ((\wb_interface|p2p [12]))) # (!\wb_interface|Equal2~1_combout  & (\wb_interface|pulsewidth [12]))))

        .dataa(\wb_interface|Equal1~0_combout ),
        .datab(\wb_interface|pulsewidth [12]),
        .datac(\wb_interface|p2p [12]),
        .datad(\wb_interface|Equal2~1_combout ),
        .cin(gnd),
        .combout(\wb_interface|wb_dat_rdbk[12]~21_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|wb_dat_rdbk[12]~21 .lut_mask = 16'h5044;
defparam \wb_interface|wb_dat_rdbk[12]~21 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X27_Y3_N12
cycloneiv_lcell_comb \wb_interface|wb_dat_rdbk[13]~22 (
// Equation(s):
// \wb_interface|wb_dat_rdbk[13]~22_combout  = (!\wb_interface|Equal1~0_combout  & ((\wb_interface|Equal2~1_combout  & (\wb_interface|p2p [13])) # (!\wb_interface|Equal2~1_combout  & ((\wb_interface|pulsewidth [13])))))

        .dataa(\wb_interface|Equal1~0_combout ),
        .datab(\wb_interface|p2p [13]),
        .datac(\wb_interface|pulsewidth [13]),
        .datad(\wb_interface|Equal2~1_combout ),
        .cin(gnd),
        .combout(\wb_interface|wb_dat_rdbk[13]~22_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|wb_dat_rdbk[13]~22 .lut_mask = 16'h4450;
defparam \wb_interface|wb_dat_rdbk[13]~22 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X27_Y3_N10
cycloneiv_lcell_comb \wb_interface|wb_dat_rdbk[14]~23 (
// Equation(s):
// \wb_interface|wb_dat_rdbk[14]~23_combout  = (!\wb_interface|Equal1~0_combout  & ((\wb_interface|Equal2~1_combout  & ((\wb_interface|p2p [14]))) # (!\wb_interface|Equal2~1_combout  & (\wb_interface|pulsewidth [14]))))

        .dataa(\wb_interface|Equal1~0_combout ),
        .datab(\wb_interface|pulsewidth [14]),
        .datac(\wb_interface|p2p [14]),
        .datad(\wb_interface|Equal2~1_combout ),
        .cin(gnd),
        .combout(\wb_interface|wb_dat_rdbk[14]~23_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|wb_dat_rdbk[14]~23 .lut_mask = 16'h5044;
defparam \wb_interface|wb_dat_rdbk[14]~23 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X27_Y3_N24
cycloneiv_lcell_comb \wb_interface|wb_dat_rdbk[15]~24 (
// Equation(s):
// \wb_interface|wb_dat_rdbk[15]~24_combout  = (!\wb_interface|Equal1~0_combout  & ((\wb_interface|Equal2~1_combout  & ((\wb_interface|p2p [15]))) # (!\wb_interface|Equal2~1_combout  & (\wb_interface|pulsewidth [15]))))

        .dataa(\wb_interface|Equal1~0_combout ),
        .datab(\wb_interface|Equal2~1_combout ),
        .datac(\wb_interface|pulsewidth [15]),
        .datad(\wb_interface|p2p [15]),
        .cin(gnd),
        .combout(\wb_interface|wb_dat_rdbk[15]~24_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|wb_dat_rdbk[15]~24 .lut_mask = 16'h5410;
defparam \wb_interface|wb_dat_rdbk[15]~24 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X27_Y3_N30
cycloneiv_lcell_comb \wb_interface|wb_dat_rdbk[16]~25 (
// Equation(s):
// \wb_interface|wb_dat_rdbk[16]~25_combout  = (!\wb_interface|Equal1~0_combout  & ((\wb_interface|Equal2~1_combout  & ((\wb_interface|p2p [16]))) # (!\wb_interface|Equal2~1_combout  & (\wb_interface|pulsewidth [16]))))

        .dataa(\wb_interface|Equal1~0_combout ),
        .datab(\wb_interface|pulsewidth [16]),
        .datac(\wb_interface|p2p [16]),
        .datad(\wb_interface|Equal2~1_combout ),
        .cin(gnd),
        .combout(\wb_interface|wb_dat_rdbk[16]~25_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|wb_dat_rdbk[16]~25 .lut_mask = 16'h5044;
defparam \wb_interface|wb_dat_rdbk[16]~25 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X27_Y3_N0
cycloneiv_lcell_comb \wb_interface|wb_dat_rdbk[17]~26 (
// Equation(s):
// \wb_interface|wb_dat_rdbk[17]~26_combout  = (!\wb_interface|Equal1~0_combout  & ((\wb_interface|Equal2~1_combout  & ((\wb_interface|p2p [17]))) # (!\wb_interface|Equal2~1_combout  & (\wb_interface|pulsewidth [17]))))

        .dataa(\wb_interface|Equal1~0_combout ),
        .datab(\wb_interface|Equal2~1_combout ),
        .datac(\wb_interface|pulsewidth [17]),
        .datad(\wb_interface|p2p [17]),
        .cin(gnd),
        .combout(\wb_interface|wb_dat_rdbk[17]~26_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|wb_dat_rdbk[17]~26 .lut_mask = 16'h5410;
defparam \wb_interface|wb_dat_rdbk[17]~26 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X25_Y3_N18
cycloneiv_lcell_comb \wb_interface|wb_dat_rdbk[18]~27 (
// Equation(s):
// \wb_interface|wb_dat_rdbk[18]~27_combout  = (!\wb_interface|Equal1~0_combout  & ((\wb_interface|Equal2~1_combout  & (\wb_interface|p2p [18])) # (!\wb_interface|Equal2~1_combout  & ((\wb_interface|pulsewidth [18])))))

        .dataa(\wb_interface|Equal1~0_combout ),
        .datab(\wb_interface|Equal2~1_combout ),
        .datac(\wb_interface|p2p [18]),
        .datad(\wb_interface|pulsewidth [18]),
        .cin(gnd),
        .combout(\wb_interface|wb_dat_rdbk[18]~27_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|wb_dat_rdbk[18]~27 .lut_mask = 16'h5140;
defparam \wb_interface|wb_dat_rdbk[18]~27 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X25_Y3_N4
cycloneiv_lcell_comb \wb_interface|wb_dat_rdbk[19]~28 (
// Equation(s):
// \wb_interface|wb_dat_rdbk[19]~28_combout  = (!\wb_interface|Equal1~0_combout  & ((\wb_interface|Equal2~1_combout  & (\wb_interface|p2p [19])) # (!\wb_interface|Equal2~1_combout  & ((\wb_interface|pulsewidth [19])))))

        .dataa(\wb_interface|p2p [19]),
        .datab(\wb_interface|Equal1~0_combout ),
        .datac(\wb_interface|pulsewidth [19]),
        .datad(\wb_interface|Equal2~1_combout ),
        .cin(gnd),
        .combout(\wb_interface|wb_dat_rdbk[19]~28_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|wb_dat_rdbk[19]~28 .lut_mask = 16'h2230;
defparam \wb_interface|wb_dat_rdbk[19]~28 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X25_Y3_N22
cycloneiv_lcell_comb \wb_interface|wb_dat_rdbk[20]~29 (
// Equation(s):
// \wb_interface|wb_dat_rdbk[20]~29_combout  = (!\wb_interface|Equal1~0_combout  & ((\wb_interface|Equal2~1_combout  & ((\wb_interface|p2p [20]))) # (!\wb_interface|Equal2~1_combout  & (\wb_interface|pulsewidth [20]))))

        .dataa(\wb_interface|Equal1~0_combout ),
        .datab(\wb_interface|pulsewidth [20]),
        .datac(\wb_interface|p2p [20]),
        .datad(\wb_interface|Equal2~1_combout ),
        .cin(gnd),
        .combout(\wb_interface|wb_dat_rdbk[20]~29_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|wb_dat_rdbk[20]~29 .lut_mask = 16'h5044;
defparam \wb_interface|wb_dat_rdbk[20]~29 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X25_Y3_N8
cycloneiv_lcell_comb \wb_interface|wb_dat_rdbk[21]~30 (
// Equation(s):
// \wb_interface|wb_dat_rdbk[21]~30_combout  = (!\wb_interface|Equal1~0_combout  & ((\wb_interface|Equal2~1_combout  & ((\wb_interface|p2p [21]))) # (!\wb_interface|Equal2~1_combout  & (\wb_interface|pulsewidth [21]))))

        .dataa(\wb_interface|Equal1~0_combout ),
        .datab(\wb_interface|Equal2~1_combout ),
        .datac(\wb_interface|pulsewidth [21]),
        .datad(\wb_interface|p2p [21]),
        .cin(gnd),
        .combout(\wb_interface|wb_dat_rdbk[21]~30_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|wb_dat_rdbk[21]~30 .lut_mask = 16'h5410;
defparam \wb_interface|wb_dat_rdbk[21]~30 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X24_Y3_N26
cycloneiv_lcell_comb \wb_interface|wb_dat_rdbk[22]~31 (
// Equation(s):
// \wb_interface|wb_dat_rdbk[22]~31_combout  = (!\wb_interface|Equal1~0_combout  & ((\wb_interface|Equal2~1_combout  & ((\wb_interface|p2p [22]))) # (!\wb_interface|Equal2~1_combout  & (\wb_interface|pulsewidth [22]))))

        .dataa(\wb_interface|pulsewidth [22]),
        .datab(\wb_interface|p2p [22]),
        .datac(\wb_interface|Equal1~0_combout ),
        .datad(\wb_interface|Equal2~1_combout ),
        .cin(gnd),
        .combout(\wb_interface|wb_dat_rdbk[22]~31_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|wb_dat_rdbk[22]~31 .lut_mask = 16'h0C0A;
defparam \wb_interface|wb_dat_rdbk[22]~31 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X25_Y3_N24
cycloneiv_lcell_comb \wb_interface|wb_dat_rdbk[23]~32 (
// Equation(s):
// \wb_interface|wb_dat_rdbk[23]~32_combout  = (!\wb_interface|Equal1~0_combout  & ((\wb_interface|Equal2~1_combout  & (\wb_interface|p2p [23])) # (!\wb_interface|Equal2~1_combout  & ((\wb_interface|pulsewidth [23])))))

        .dataa(\wb_interface|p2p [23]),
        .datab(\wb_interface|Equal1~0_combout ),
        .datac(\wb_interface|pulsewidth [23]),
        .datad(\wb_interface|Equal2~1_combout ),
        .cin(gnd),
        .combout(\wb_interface|wb_dat_rdbk[23]~32_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|wb_dat_rdbk[23]~32 .lut_mask = 16'h2230;
defparam \wb_interface|wb_dat_rdbk[23]~32 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X24_Y3_N22
cycloneiv_lcell_comb \wb_interface|wb_dat_rdbk[24]~33 (
// Equation(s):
// \wb_interface|wb_dat_rdbk[24]~33_combout  = (!\wb_interface|Equal1~0_combout  & ((\wb_interface|Equal2~1_combout  & ((\wb_interface|p2p [24]))) # (!\wb_interface|Equal2~1_combout  & (\wb_interface|pulsewidth [24]))))

        .dataa(\wb_interface|Equal1~0_combout ),
        .datab(\wb_interface|pulsewidth [24]),
        .datac(\wb_interface|p2p [24]),
        .datad(\wb_interface|Equal2~1_combout ),
        .cin(gnd),
        .combout(\wb_interface|wb_dat_rdbk[24]~33_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|wb_dat_rdbk[24]~33 .lut_mask = 16'h5044;
defparam \wb_interface|wb_dat_rdbk[24]~33 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X25_Y3_N12
cycloneiv_lcell_comb \wb_interface|wb_dat_rdbk[25]~34 (
// Equation(s):
// \wb_interface|wb_dat_rdbk[25]~34_combout  = (!\wb_interface|Equal1~0_combout  & ((\wb_interface|Equal2~1_combout  & (\wb_interface|p2p [25])) # (!\wb_interface|Equal2~1_combout  & ((\wb_interface|pulsewidth [25])))))

        .dataa(\wb_interface|p2p [25]),
        .datab(\wb_interface|Equal1~0_combout ),
        .datac(\wb_interface|pulsewidth [25]),
        .datad(\wb_interface|Equal2~1_combout ),
        .cin(gnd),
        .combout(\wb_interface|wb_dat_rdbk[25]~34_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|wb_dat_rdbk[25]~34 .lut_mask = 16'h2230;
defparam \wb_interface|wb_dat_rdbk[25]~34 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X29_Y3_N14
cycloneiv_lcell_comb \wb_interface|wb_dat_rdbk[26]~35 (
// Equation(s):
// \wb_interface|wb_dat_rdbk[26]~35_combout  = (!\wb_interface|Equal1~0_combout  & ((\wb_interface|Equal2~1_combout  & ((\wb_interface|p2p [26]))) # (!\wb_interface|Equal2~1_combout  & (\wb_interface|pulsewidth [26]))))

        .dataa(\wb_interface|Equal1~0_combout ),
        .datab(\wb_interface|pulsewidth [26]),
        .datac(\wb_interface|p2p [26]),
        .datad(\wb_interface|Equal2~1_combout ),
        .cin(gnd),
        .combout(\wb_interface|wb_dat_rdbk[26]~35_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|wb_dat_rdbk[26]~35 .lut_mask = 16'h5044;
defparam \wb_interface|wb_dat_rdbk[26]~35 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X29_Y3_N16
cycloneiv_lcell_comb \wb_interface|wb_dat_rdbk[27]~36 (
// Equation(s):
// \wb_interface|wb_dat_rdbk[27]~36_combout  = (!\wb_interface|Equal1~0_combout  & ((\wb_interface|Equal2~1_combout  & (\wb_interface|p2p [27])) # (!\wb_interface|Equal2~1_combout  & ((\wb_interface|pulsewidth [27])))))

        .dataa(\wb_interface|Equal1~0_combout ),
        .datab(\wb_interface|p2p [27]),
        .datac(\wb_interface|pulsewidth [27]),
        .datad(\wb_interface|Equal2~1_combout ),
        .cin(gnd),
        .combout(\wb_interface|wb_dat_rdbk[27]~36_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|wb_dat_rdbk[27]~36 .lut_mask = 16'h4450;
defparam \wb_interface|wb_dat_rdbk[27]~36 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X29_Y3_N22
cycloneiv_lcell_comb \wb_interface|wb_dat_rdbk[28]~37 (
// Equation(s):
// \wb_interface|wb_dat_rdbk[28]~37_combout  = (!\wb_interface|Equal1~0_combout  & ((\wb_interface|Equal2~1_combout  & ((\wb_interface|p2p [28]))) # (!\wb_interface|Equal2~1_combout  & (\wb_interface|pulsewidth [28]))))

        .dataa(\wb_interface|Equal1~0_combout ),
        .datab(\wb_interface|pulsewidth [28]),
        .datac(\wb_interface|p2p [28]),
        .datad(\wb_interface|Equal2~1_combout ),
        .cin(gnd),
        .combout(\wb_interface|wb_dat_rdbk[28]~37_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|wb_dat_rdbk[28]~37 .lut_mask = 16'h5044;
defparam \wb_interface|wb_dat_rdbk[28]~37 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X29_Y3_N6
cycloneiv_lcell_comb \wb_interface|wb_dat_rdbk[29]~38 (
// Equation(s):
// \wb_interface|wb_dat_rdbk[29]~38_combout  = (!\wb_interface|Equal1~0_combout  & ((\wb_interface|Equal2~1_combout  & ((\wb_interface|p2p [29]))) # (!\wb_interface|Equal2~1_combout  & (\wb_interface|pulsewidth [29]))))

        .dataa(\wb_interface|Equal1~0_combout ),
        .datab(\wb_interface|Equal2~1_combout ),
        .datac(\wb_interface|pulsewidth [29]),
        .datad(\wb_interface|p2p [29]),
        .cin(gnd),
        .combout(\wb_interface|wb_dat_rdbk[29]~38_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|wb_dat_rdbk[29]~38 .lut_mask = 16'h5410;
defparam \wb_interface|wb_dat_rdbk[29]~38 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X27_Y4_N22
cycloneiv_lcell_comb \wb_interface|wb_dat_rdbk[30]~39 (
// Equation(s):
// \wb_interface|wb_dat_rdbk[30]~39_combout  = (!\wb_interface|Equal1~0_combout  & ((\wb_interface|Equal2~1_combout  & (\wb_interface|p2p [30])) # (!\wb_interface|Equal2~1_combout  & ((\wb_interface|pulsewidth [30])))))

        .dataa(\wb_interface|Equal2~1_combout ),
        .datab(\wb_interface|Equal1~0_combout ),
        .datac(\wb_interface|p2p [30]),
        .datad(\wb_interface|pulsewidth [30]),
        .cin(gnd),
        .combout(\wb_interface|wb_dat_rdbk[30]~39_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|wb_dat_rdbk[30]~39 .lut_mask = 16'h3120;
defparam \wb_interface|wb_dat_rdbk[30]~39 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X27_Y4_N28
cycloneiv_lcell_comb \wb_interface|wb_dat_rdbk[31]~40 (
// Equation(s):
// \wb_interface|wb_dat_rdbk[31]~40_combout  = (!\wb_interface|Equal1~0_combout  & ((\wb_interface|Equal2~1_combout  & (\wb_interface|p2p [31])) # (!\wb_interface|Equal2~1_combout  & ((\wb_interface|pulsewidth [31])))))

        .dataa(\wb_interface|p2p [31]),
        .datab(\wb_interface|Equal1~0_combout ),
        .datac(\wb_interface|pulsewidth [31]),
        .datad(\wb_interface|Equal2~1_combout ),
        .cin(gnd),
        .combout(\wb_interface|wb_dat_rdbk[31]~40_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|wb_dat_rdbk[31]~40 .lut_mask = 16'h2230;
defparam \wb_interface|wb_dat_rdbk[31]~40 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X27_Y1_N30
cycloneiv_lcell_comb \comb~0 (
// Equation(s):
// \comb~0_combout  = (\wb_rst_i~input_o ) # (\wb_interface|size [8])

        .dataa(gnd),
        .datab(gnd),
        .datac(\wb_rst_i~input_o ),
        .datad(\wb_interface|size [8]),
        .cin(gnd),
        .combout(\comb~0_combout ),
        .cout());
// synopsys translate_off
defparam \comb~0 .lut_mask = 16'hFFF0;
defparam \comb~0 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: CLKCTRL_G15
cycloneiv_clkctrl \comb~0clkctrl (
        .ena(vcc),
        .inclk({vcc,vcc,vcc,\comb~0_combout }),
        .clkselect(2'b00),
        .devclrn(devclrn),
        .devpor(devpor),
        .outclk(\comb~0clkctrl_outclk ));
// synopsys translate_off
defparam \comb~0clkctrl .clock_type = "global clock";
defparam \comb~0clkctrl .ena_register_mode = "none";
// synopsys translate_on

// Location: LCCOMB_X32_Y3_N28
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp5|addr_wr[1]~1 (
// Equation(s):
// \datafifowrite|custom_fifo_dp5|addr_wr[1]~1_combout  = !\datafifowrite|custom_fifo_dp5|addr_wr [0]

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\datafifowrite|custom_fifo_dp5|addr_wr [0]),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp5|addr_wr[1]~1_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|addr_wr[1]~1 .lut_mask = 16'h00FF;
defparam \datafifowrite|custom_fifo_dp5|addr_wr[1]~1 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X31_Y3_N4
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp5|Equal0~1 (
// Equation(s):
// \datafifowrite|custom_fifo_dp5|Equal0~1_combout  = (\datafifowrite|custom_fifo_dp5|Equal0~0_combout  & (\datafifowrite|custom_fifo_dp5|addr_wr [2] $ (!\datafifowrite|custom_fifo_dp5|addr_rd [2])))

        .dataa(\datafifowrite|custom_fifo_dp5|addr_wr [2]),
        .datab(gnd),
        .datac(\datafifowrite|custom_fifo_dp5|addr_rd [2]),
        .datad(\datafifowrite|custom_fifo_dp5|Equal0~0_combout ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp5|Equal0~1_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|Equal0~1 .lut_mask = 16'hA500;
defparam \datafifowrite|custom_fifo_dp5|Equal0~1 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X32_Y3_N24
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp5|full~0 (
// Equation(s):
// \datafifowrite|custom_fifo_dp5|full~0_combout  = (\datafifowrite|custom_fifo_dp5|addr_rd [1] & (((\datafifowrite|custom_fifo_dp5|addr_wr [2] & !\datafifowrite|custom_fifo_dp5|addr_rd [0])) # (!\datafifowrite|custom_fifo_dp5|addr_wr [0]))) # 
// (!\datafifowrite|custom_fifo_dp5|addr_rd [1] & (((\datafifowrite|custom_fifo_dp5|addr_wr [2] & !\datafifowrite|custom_fifo_dp5|addr_rd [0]))))

        .dataa(\datafifowrite|custom_fifo_dp5|addr_rd [1]),
        .datab(\datafifowrite|custom_fifo_dp5|addr_wr [0]),
        .datac(\datafifowrite|custom_fifo_dp5|addr_wr [2]),
        .datad(\datafifowrite|custom_fifo_dp5|addr_rd [0]),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp5|full~0_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|full~0 .lut_mask = 16'h22F2;
defparam \datafifowrite|custom_fifo_dp5|full~0 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X31_Y3_N28
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp5|full~1 (
// Equation(s):
// \datafifowrite|custom_fifo_dp5|full~1_combout  = (!\datafifowrite|custom_fifo_dp5|Equal0~1_combout  & ((\datafifowrite|custom_fifo_dp5|full~0_combout ) # ((\datafifowrite|custom_fifo_dp5|addr_rd [2] & \datafifowrite|custom_fifo_dp5|addr_wr [1]))))

        .dataa(\datafifowrite|custom_fifo_dp5|addr_rd [2]),
        .datab(\datafifowrite|custom_fifo_dp5|addr_wr [1]),
        .datac(\datafifowrite|custom_fifo_dp5|Equal0~1_combout ),
        .datad(\datafifowrite|custom_fifo_dp5|full~0_combout ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp5|full~1_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|full~1 .lut_mask = 16'h0F08;
defparam \datafifowrite|custom_fifo_dp5|full~1 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X31_Y3_N29
dffeas full_dly(
        .clk(\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp5|full~1_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\full_dly~q ),
        .prn(vcc));
// synopsys translate_off
defparam full_dly.is_wysiwyg = "true";
defparam full_dly.power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X31_Y3_N14
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp5|always1~0 (
// Equation(s):
// \datafifowrite|custom_fifo_dp5|always1~0_combout  = (!\wb_adr_i[1]~input_o  & (!\lock_cfg~q  & \wb_interface|rty_int~1_combout ))

        .dataa(\wb_adr_i[1]~input_o ),
        .datab(\lock_cfg~q ),
        .datac(gnd),
        .datad(\wb_interface|rty_int~1_combout ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp5|always1~0_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|always1~0 .lut_mask = 16'h1100;
defparam \datafifowrite|custom_fifo_dp5|always1~0 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X31_Y3_N2
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp5|always1~1 (
// Equation(s):
// \datafifowrite|custom_fifo_dp5|always1~1_combout  = (!\wb_adr_i[0]~input_o  & (!\full_dly~q  & (\datafifowrite|custom_fifo_dp5|always1~0_combout  & !\datafifowrite|custom_fifo_dp5|full~1_combout )))

        .dataa(\wb_adr_i[0]~input_o ),
        .datab(\full_dly~q ),
        .datac(\datafifowrite|custom_fifo_dp5|always1~0_combout ),
        .datad(\datafifowrite|custom_fifo_dp5|full~1_combout ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp5|always1~1_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|always1~1 .lut_mask = 16'h0010;
defparam \datafifowrite|custom_fifo_dp5|always1~1 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X32_Y3_N29
dffeas \datafifowrite|custom_fifo_dp5|addr_wr[1] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp5|addr_wr[1]~1_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\datafifowrite|custom_fifo_dp5|always1~1_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp5|addr_wr [1]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|addr_wr[1] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp5|addr_wr[1] .power_up = "low";
// synopsys translate_on

// Location: FF_X32_Y3_N25
dffeas \datafifowrite|custom_fifo_dp5|addr_wr[2] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\datafifowrite|custom_fifo_dp5|addr_wr [1]),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\datafifowrite|custom_fifo_dp5|always1~1_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp5|addr_wr [2]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|addr_wr[2] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp5|addr_wr[2] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X32_Y3_N30
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp5|addr_wr[0]~0 (
// Equation(s):
// \datafifowrite|custom_fifo_dp5|addr_wr[0]~0_combout  = !\datafifowrite|custom_fifo_dp5|addr_wr [2]

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\datafifowrite|custom_fifo_dp5|addr_wr [2]),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp5|addr_wr[0]~0_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|addr_wr[0]~0 .lut_mask = 16'h00FF;
defparam \datafifowrite|custom_fifo_dp5|addr_wr[0]~0 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X32_Y3_N31
dffeas \datafifowrite|custom_fifo_dp5|addr_wr[0] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp5|addr_wr[0]~0_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\datafifowrite|custom_fifo_dp5|always1~1_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp5|addr_wr [0]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|addr_wr[0] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp5|addr_wr[0] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X31_Y3_N18
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp5|Equal0~0 (
// Equation(s):
// \datafifowrite|custom_fifo_dp5|Equal0~0_combout  = (\datafifowrite|custom_fifo_dp5|addr_rd [0] & (\datafifowrite|custom_fifo_dp5|addr_wr [0] & (\datafifowrite|custom_fifo_dp5|addr_rd [1] $ (!\datafifowrite|custom_fifo_dp5|addr_wr [1])))) # 
// (!\datafifowrite|custom_fifo_dp5|addr_rd [0] & (!\datafifowrite|custom_fifo_dp5|addr_wr [0] & (\datafifowrite|custom_fifo_dp5|addr_rd [1] $ (!\datafifowrite|custom_fifo_dp5|addr_wr [1]))))

        .dataa(\datafifowrite|custom_fifo_dp5|addr_rd [0]),
        .datab(\datafifowrite|custom_fifo_dp5|addr_rd [1]),
        .datac(\datafifowrite|custom_fifo_dp5|addr_wr [0]),
        .datad(\datafifowrite|custom_fifo_dp5|addr_wr [1]),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp5|Equal0~0_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|Equal0~0 .lut_mask = 16'h8421;
defparam \datafifowrite|custom_fifo_dp5|Equal0~0 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X31_Y3_N12
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp5|always2~0 (
// Equation(s):
// \datafifowrite|custom_fifo_dp5|always2~0_combout  = (\state.001~q  & ((\datafifowrite|custom_fifo_dp5|addr_rd [2] $ (\datafifowrite|custom_fifo_dp5|addr_wr [2])) # (!\datafifowrite|custom_fifo_dp5|Equal0~0_combout )))

        .dataa(\datafifowrite|custom_fifo_dp5|addr_rd [2]),
        .datab(\datafifowrite|custom_fifo_dp5|Equal0~0_combout ),
        .datac(\datafifowrite|custom_fifo_dp5|addr_wr [2]),
        .datad(\state.001~q ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp5|always2~0_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|always2~0 .lut_mask = 16'h7B00;
defparam \datafifowrite|custom_fifo_dp5|always2~0 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X31_Y3_N5
dffeas \datafifowrite|custom_fifo_dp5|addr_rd[2] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\datafifowrite|custom_fifo_dp5|addr_rd [1]),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\datafifowrite|custom_fifo_dp5|always2~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp5|addr_rd [2]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|addr_rd[2] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp5|addr_rd[2] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X30_Y3_N16
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp5|addr_rd[0]~1 (
// Equation(s):
// \datafifowrite|custom_fifo_dp5|addr_rd[0]~1_combout  = !\datafifowrite|custom_fifo_dp5|addr_rd [2]

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\datafifowrite|custom_fifo_dp5|addr_rd [2]),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp5|addr_rd[0]~1_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|addr_rd[0]~1 .lut_mask = 16'h00FF;
defparam \datafifowrite|custom_fifo_dp5|addr_rd[0]~1 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X31_Y3_N15
dffeas \datafifowrite|custom_fifo_dp5|addr_rd[0] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\datafifowrite|custom_fifo_dp5|addr_rd[0]~1_combout ),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\datafifowrite|custom_fifo_dp5|always2~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp5|addr_rd [0]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|addr_rd[0] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp5|addr_rd[0] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X31_Y3_N16
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp5|addr_rd[1]~0 (
// Equation(s):
// \datafifowrite|custom_fifo_dp5|addr_rd[1]~0_combout  = !\datafifowrite|custom_fifo_dp5|addr_rd [0]

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\datafifowrite|custom_fifo_dp5|addr_rd [0]),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp5|addr_rd[1]~0_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|addr_rd[1]~0 .lut_mask = 16'h00FF;
defparam \datafifowrite|custom_fifo_dp5|addr_rd[1]~0 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X31_Y3_N17
dffeas \datafifowrite|custom_fifo_dp5|addr_rd[1] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp5|addr_rd[1]~0_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\datafifowrite|custom_fifo_dp5|always2~0_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp5|addr_rd [1]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|addr_rd[1] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp5|addr_rd[1] .power_up = "low";
// synopsys translate_on

// Location: FF_X32_Y4_N15
dffeas \datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[5] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[29]~input_o ),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [2]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg [5]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[5] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[5] .power_up = "low";
// synopsys translate_on

// Location: FF_X32_Y4_N29
dffeas \datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[5] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[29]~input_o ),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [1]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg [5]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[5] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[5] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X31_Y4_N14
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp5|mem_byte_out[5]~2 (
// Equation(s):
// \datafifowrite|custom_fifo_dp5|mem_byte_out[5]~2_combout  = (\datafifowrite|custom_fifo_dp5|addr_rd [1] & ((\datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg [5]))) # (!\datafifowrite|custom_fifo_dp5|addr_rd [1] & 
// (\datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg [5]))

        .dataa(\datafifowrite|custom_fifo_dp5|addr_rd [1]),
        .datab(\datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg [5]),
        .datac(gnd),
        .datad(\datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg [5]),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp5|mem_byte_out[5]~2_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|mem_byte_out[5]~2 .lut_mask = 16'hEE44;
defparam \datafifowrite|custom_fifo_dp5|mem_byte_out[5]~2 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X29_Y4_N10
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[5]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[5]~feeder_combout  = \wb_dat_i[29]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[29]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[5]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[5]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[5]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X29_Y4_N11
dffeas \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[5] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[5]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(!\datafifowrite|custom_fifo_dp5|addr_wr [0]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg [5]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[5] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[5] .power_up = "low";
// synopsys translate_on

// Location: FF_X31_Y4_N15
dffeas \datafifowrite|custom_fifo_dp5|fifo_out[5] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp5|mem_byte_out[5]~2_combout ),
        .asdata(\datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg [5]),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(!\datafifowrite|custom_fifo_dp5|addr_rd [0]),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp5|fifo_out [5]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|fifo_out[5] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp5|fifo_out[5] .power_up = "low";
// synopsys translate_on

// Location: FF_X30_Y3_N27
dffeas \datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[4] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[28]~input_o ),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [2]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg [4]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[4] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[4] .power_up = "low";
// synopsys translate_on

// Location: FF_X30_Y3_N21
dffeas \datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[4] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[28]~input_o ),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [1]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg [4]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[4] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[4] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X30_Y4_N30
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp5|mem_byte_out[4]~3 (
// Equation(s):
// \datafifowrite|custom_fifo_dp5|mem_byte_out[4]~3_combout  = (\datafifowrite|custom_fifo_dp5|addr_rd [1] & ((\datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg [4]))) # (!\datafifowrite|custom_fifo_dp5|addr_rd [1] & 
// (\datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg [4]))

        .dataa(\datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg [4]),
        .datab(\datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg [4]),
        .datac(gnd),
        .datad(\datafifowrite|custom_fifo_dp5|addr_rd [1]),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp5|mem_byte_out[4]~3_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|mem_byte_out[4]~3 .lut_mask = 16'hCCAA;
defparam \datafifowrite|custom_fifo_dp5|mem_byte_out[4]~3 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X29_Y4_N16
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[4]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[4]~feeder_combout  = \wb_dat_i[28]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[28]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[4]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[4]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[4]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X29_Y4_N17
dffeas \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[4] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[4]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(!\datafifowrite|custom_fifo_dp5|addr_wr [0]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg [4]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[4] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[4] .power_up = "low";
// synopsys translate_on

// Location: FF_X30_Y4_N31
dffeas \datafifowrite|custom_fifo_dp5|fifo_out[4] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp5|mem_byte_out[4]~3_combout ),
        .asdata(\datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg [4]),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(!\datafifowrite|custom_fifo_dp5|addr_rd [0]),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp5|fifo_out [4]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|fifo_out[4] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp5|fifo_out[4] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X30_Y3_N24
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[1]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[1]~feeder_combout  = \wb_dat_i[25]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[25]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[1]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[1]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[1]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X30_Y3_N25
dffeas \datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[1] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[1]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [2]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg [1]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[1] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[1] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X30_Y3_N2
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[1]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[1]~feeder_combout  = \wb_dat_i[25]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[25]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[1]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[1]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[1]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X30_Y3_N3
dffeas \datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[1] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[1]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [1]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg [1]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[1] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[1] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X30_Y4_N10
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp5|mem_byte_out[1]~6 (
// Equation(s):
// \datafifowrite|custom_fifo_dp5|mem_byte_out[1]~6_combout  = (\datafifowrite|custom_fifo_dp5|addr_rd [1] & ((\datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg [1]))) # (!\datafifowrite|custom_fifo_dp5|addr_rd [1] & 
// (\datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg [1]))

        .dataa(\datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg [1]),
        .datab(\datafifowrite|custom_fifo_dp5|addr_rd [1]),
        .datac(gnd),
        .datad(\datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg [1]),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp5|mem_byte_out[1]~6_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|mem_byte_out[1]~6 .lut_mask = 16'hEE22;
defparam \datafifowrite|custom_fifo_dp5|mem_byte_out[1]~6 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X29_Y4_N6
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[1]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[1]~feeder_combout  = \wb_dat_i[25]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[25]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[1]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[1]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[1]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X29_Y4_N7
dffeas \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[1] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[1]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(!\datafifowrite|custom_fifo_dp5|addr_wr [0]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg [1]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[1] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[1] .power_up = "low";
// synopsys translate_on

// Location: FF_X30_Y4_N11
dffeas \datafifowrite|custom_fifo_dp5|fifo_out[1] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp5|mem_byte_out[1]~6_combout ),
        .asdata(\datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg [1]),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(!\datafifowrite|custom_fifo_dp5|addr_rd [0]),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp5|fifo_out [1]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|fifo_out[1] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp5|fifo_out[1] .power_up = "low";
// synopsys translate_on

// Location: FF_X31_Y5_N1
dffeas \datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg[3] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[19]~input_o ),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [2]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg [3]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg[3] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg[3] .power_up = "low";
// synopsys translate_on

// Location: FF_X31_Y5_N27
dffeas \datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg[3] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[19]~input_o ),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [1]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg [3]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg[3] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg[3] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X30_Y5_N4
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp6|mem_byte_out[3]~4 (
// Equation(s):
// \datafifowrite|custom_fifo_dp6|mem_byte_out[3]~4_combout  = (\datafifowrite|custom_fifo_dp5|addr_rd [1] & ((\datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg [3]))) # (!\datafifowrite|custom_fifo_dp5|addr_rd [1] & 
// (\datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg [3]))

        .dataa(\datafifowrite|custom_fifo_dp5|addr_rd [1]),
        .datab(\datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg [3]),
        .datac(gnd),
        .datad(\datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg [3]),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp6|mem_byte_out[3]~4_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|mem_byte_out[3]~4 .lut_mask = 16'hEE44;
defparam \datafifowrite|custom_fifo_dp6|mem_byte_out[3]~4 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X29_Y5_N6
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[3]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[3]~feeder_combout  = \wb_dat_i[19]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(\wb_dat_i[19]~input_o ),
        .datad(gnd),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[3]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[3]~feeder .lut_mask = 16'hF0F0;
defparam \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[3]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X29_Y5_N7
dffeas \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[3] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[3]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(!\datafifowrite|custom_fifo_dp5|addr_wr [0]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg [3]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[3] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[3] .power_up = "low";
// synopsys translate_on

// Location: FF_X30_Y5_N5
dffeas \datafifowrite|custom_fifo_dp6|fifo_out[3] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp6|mem_byte_out[3]~4_combout ),
        .asdata(\datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg [3]),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(!\datafifowrite|custom_fifo_dp5|addr_rd [0]),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp6|fifo_out [3]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|fifo_out[3] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp6|fifo_out[3] .power_up = "low";
// synopsys translate_on

// Location: FF_X32_Y4_N31
dffeas \datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg[0] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[16]~input_o ),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [2]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg [0]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg[0] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg[0] .power_up = "low";
// synopsys translate_on

// Location: FF_X32_Y4_N17
dffeas \datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg[0] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[16]~input_o ),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [1]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg [0]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg[0] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg[0] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X31_Y4_N12
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp6|mem_byte_out[0]~7 (
// Equation(s):
// \datafifowrite|custom_fifo_dp6|mem_byte_out[0]~7_combout  = (\datafifowrite|custom_fifo_dp5|addr_rd [1] & ((\datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg [0]))) # (!\datafifowrite|custom_fifo_dp5|addr_rd [1] & 
// (\datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg [0]))

        .dataa(\datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg [0]),
        .datab(\datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg [0]),
        .datac(gnd),
        .datad(\datafifowrite|custom_fifo_dp5|addr_rd [1]),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp6|mem_byte_out[0]~7_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|mem_byte_out[0]~7 .lut_mask = 16'hCCAA;
defparam \datafifowrite|custom_fifo_dp6|mem_byte_out[0]~7 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X34_Y4_N18
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[0]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[0]~feeder_combout  = \wb_dat_i[16]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(\wb_dat_i[16]~input_o ),
        .datad(gnd),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[0]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[0]~feeder .lut_mask = 16'hF0F0;
defparam \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[0]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X34_Y4_N19
dffeas \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[0] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[0]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(!\datafifowrite|custom_fifo_dp5|addr_wr [0]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg [0]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[0] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[0] .power_up = "low";
// synopsys translate_on

// Location: FF_X31_Y4_N13
dffeas \datafifowrite|custom_fifo_dp6|fifo_out[0] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp6|mem_byte_out[0]~7_combout ),
        .asdata(\datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg [0]),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(!\datafifowrite|custom_fifo_dp5|addr_rd [0]),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp6|fifo_out [0]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|fifo_out[0] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp6|fifo_out[0] .power_up = "low";
// synopsys translate_on

// Location: FF_X35_Y5_N13
dffeas \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[2] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[10]~input_o ),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [1]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg [2]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[2] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[2] .power_up = "low";
// synopsys translate_on

// Location: FF_X35_Y5_N23
dffeas \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[2] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[10]~input_o ),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [2]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg [2]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[2] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[2] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X34_Y5_N26
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp7|mem_byte_out[2]~5 (
// Equation(s):
// \datafifowrite|custom_fifo_dp7|mem_byte_out[2]~5_combout  = (\datafifowrite|custom_fifo_dp5|addr_rd [1] & (\datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg [2])) # (!\datafifowrite|custom_fifo_dp5|addr_rd [1] & 
// ((\datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg [2])))

        .dataa(\datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg [2]),
        .datab(\datafifowrite|custom_fifo_dp5|addr_rd [1]),
        .datac(gnd),
        .datad(\datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg [2]),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp7|mem_byte_out[2]~5_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem_byte_out[2]~5 .lut_mask = 16'hBB88;
defparam \datafifowrite|custom_fifo_dp7|mem_byte_out[2]~5 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X32_Y5_N22
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[2]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[2]~feeder_combout  = \wb_dat_i[10]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[10]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[2]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[2]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[2]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X32_Y5_N23
dffeas \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[2] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[2]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(!\datafifowrite|custom_fifo_dp5|addr_wr [0]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg [2]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[2] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[2] .power_up = "low";
// synopsys translate_on

// Location: FF_X34_Y5_N27
dffeas \datafifowrite|custom_fifo_dp7|fifo_out[2] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp7|mem_byte_out[2]~5_combout ),
        .asdata(\datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg [2]),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(!\datafifowrite|custom_fifo_dp5|addr_rd [0]),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp7|fifo_out [2]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|fifo_out[2] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp7|fifo_out[2] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X35_Y5_N6
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[0]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[0]~feeder_combout  = \wb_dat_i[8]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[8]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[0]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[0]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[0]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X35_Y5_N7
dffeas \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[0] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[0]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [2]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg [0]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[0] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[0] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X35_Y5_N28
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[0]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[0]~feeder_combout  = \wb_dat_i[8]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[8]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[0]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[0]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[0]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X35_Y5_N29
dffeas \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[0] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[0]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [1]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg [0]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[0] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[0] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X34_Y5_N14
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp7|mem_byte_out[0]~7 (
// Equation(s):
// \datafifowrite|custom_fifo_dp7|mem_byte_out[0]~7_combout  = (\datafifowrite|custom_fifo_dp5|addr_rd [1] & ((\datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg [0]))) # (!\datafifowrite|custom_fifo_dp5|addr_rd [1] & 
// (\datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg [0]))

        .dataa(\datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg [0]),
        .datab(\datafifowrite|custom_fifo_dp5|addr_rd [1]),
        .datac(gnd),
        .datad(\datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg [0]),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp7|mem_byte_out[0]~7_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem_byte_out[0]~7 .lut_mask = 16'hEE22;
defparam \datafifowrite|custom_fifo_dp7|mem_byte_out[0]~7 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X32_Y5_N18
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[0]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[0]~feeder_combout  = \wb_dat_i[8]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[8]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[0]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[0]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[0]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X32_Y5_N19
dffeas \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[0] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[0]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(!\datafifowrite|custom_fifo_dp5|addr_wr [0]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg [0]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[0] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[0] .power_up = "low";
// synopsys translate_on

// Location: FF_X34_Y5_N15
dffeas \datafifowrite|custom_fifo_dp7|fifo_out[0] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp7|mem_byte_out[0]~7_combout ),
        .asdata(\datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg [0]),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(!\datafifowrite|custom_fifo_dp5|addr_rd [0]),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp7|fifo_out [0]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|fifo_out[0] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp7|fifo_out[0] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X32_Y3_N26
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[5]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[5]~feeder_combout  = \wb_dat_i[5]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[5]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[5]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[5]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[5]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X32_Y3_N27
dffeas \datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[5] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[5]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [2]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg [5]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[5] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[5] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X29_Y4_N18
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[5]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[5]~feeder_combout  = \wb_dat_i[5]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[5]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[5]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[5]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[5]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X29_Y4_N19
dffeas \datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[5] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[5]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [1]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg [5]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[5] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[5] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X30_Y5_N10
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp8|mem_byte_out[5]~2 (
// Equation(s):
// \datafifowrite|custom_fifo_dp8|mem_byte_out[5]~2_combout  = (\datafifowrite|custom_fifo_dp5|addr_rd [1] & ((\datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg [5]))) # (!\datafifowrite|custom_fifo_dp5|addr_rd [1] & 
// (\datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg [5]))

        .dataa(\datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg [5]),
        .datab(\datafifowrite|custom_fifo_dp5|addr_rd [1]),
        .datac(gnd),
        .datad(\datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg [5]),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp8|mem_byte_out[5]~2_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem_byte_out[5]~2 .lut_mask = 16'hEE22;
defparam \datafifowrite|custom_fifo_dp8|mem_byte_out[5]~2 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X29_Y5_N4
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[5]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[5]~feeder_combout  = \wb_dat_i[5]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(\wb_dat_i[5]~input_o ),
        .datad(gnd),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[5]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[5]~feeder .lut_mask = 16'hF0F0;
defparam \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[5]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X29_Y5_N5
dffeas \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[5] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[5]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(!\datafifowrite|custom_fifo_dp5|addr_wr [0]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg [5]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[5] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[5] .power_up = "low";
// synopsys translate_on

// Location: FF_X30_Y5_N11
dffeas \datafifowrite|custom_fifo_dp8|fifo_out[5] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp8|mem_byte_out[5]~2_combout ),
        .asdata(\datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg [5]),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(!\datafifowrite|custom_fifo_dp5|addr_rd [0]),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp8|fifo_out [5]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|fifo_out[5] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp8|fifo_out[5] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X29_Y5_N12
cycloneiv_lcell_comb \word_out~31 (
// Equation(s):
// \word_out~31_combout  = (word_out[0] & !\state.110~q )

        .dataa(gnd),
        .datab(gnd),
        .datac(word_out[0]),
        .datad(\state.110~q ),
        .cin(gnd),
        .combout(\word_out~31_combout ),
        .cout());
// synopsys translate_off
defparam \word_out~31 .lut_mask = 16'h00F0;
defparam \word_out~31 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X31_Y5_N2
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[0]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[0]~feeder_combout  = \wb_dat_i[0]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[0]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[0]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[0]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[0]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X31_Y5_N3
dffeas \datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[0] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[0]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [2]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg [0]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[0] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[0] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X31_Y5_N16
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[0]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[0]~feeder_combout  = \wb_dat_i[0]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[0]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[0]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[0]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[0]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X31_Y5_N17
dffeas \datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[0] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[0]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [1]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg [0]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[0] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[0] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X30_Y5_N0
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp8|mem_byte_out[0]~7 (
// Equation(s):
// \datafifowrite|custom_fifo_dp8|mem_byte_out[0]~7_combout  = (\datafifowrite|custom_fifo_dp5|addr_rd [1] & ((\datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg [0]))) # (!\datafifowrite|custom_fifo_dp5|addr_rd [1] & 
// (\datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg [0]))

        .dataa(\datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg [0]),
        .datab(\datafifowrite|custom_fifo_dp5|addr_rd [1]),
        .datac(gnd),
        .datad(\datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg [0]),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp8|mem_byte_out[0]~7_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem_byte_out[0]~7 .lut_mask = 16'hEE22;
defparam \datafifowrite|custom_fifo_dp8|mem_byte_out[0]~7 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X29_Y5_N14
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[0]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[0]~feeder_combout  = \wb_dat_i[0]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(\wb_dat_i[0]~input_o ),
        .datad(gnd),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[0]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[0]~feeder .lut_mask = 16'hF0F0;
defparam \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[0]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X29_Y5_N15
dffeas \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[0] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[0]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(!\datafifowrite|custom_fifo_dp5|addr_wr [0]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg [0]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[0] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[0] .power_up = "low";
// synopsys translate_on

// Location: FF_X30_Y5_N1
dffeas \datafifowrite|custom_fifo_dp8|fifo_out[0] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp8|mem_byte_out[0]~7_combout ),
        .asdata(\datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg [0]),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(!\datafifowrite|custom_fifo_dp5|addr_rd [0]),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp8|fifo_out [0]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|fifo_out[0] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp8|fifo_out[0] .power_up = "low";
// synopsys translate_on

// Location: FF_X29_Y5_N13
dffeas \word_out[0] (
        .clk(\wb_clk_i~inputclkctrl_outclk ),
        .d(\word_out~31_combout ),
        .asdata(\datafifowrite|custom_fifo_dp8|fifo_out [0]),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(\state.001~q ),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(word_out[0]),
        .prn(vcc));
// synopsys translate_off
defparam \word_out[0] .is_wysiwyg = "true";
defparam \word_out[0] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X29_Y4_N24
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[1]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[1]~feeder_combout  = \wb_dat_i[1]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[1]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[1]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[1]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[1]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X29_Y4_N25
dffeas \datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[1] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[1]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [1]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg [1]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[1] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[1] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X31_Y5_N18
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[1]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[1]~feeder_combout  = \wb_dat_i[1]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[1]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[1]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[1]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[1]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X31_Y5_N19
dffeas \datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[1] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[1]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [2]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg [1]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[1] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[1] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X30_Y5_N2
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp8|mem_byte_out[1]~6 (
// Equation(s):
// \datafifowrite|custom_fifo_dp8|mem_byte_out[1]~6_combout  = (\datafifowrite|custom_fifo_dp5|addr_rd [1] & (\datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg [1])) # (!\datafifowrite|custom_fifo_dp5|addr_rd [1] & 
// ((\datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg [1])))

        .dataa(\datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg [1]),
        .datab(\datafifowrite|custom_fifo_dp5|addr_rd [1]),
        .datac(gnd),
        .datad(\datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg [1]),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp8|mem_byte_out[1]~6_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem_byte_out[1]~6 .lut_mask = 16'hBB88;
defparam \datafifowrite|custom_fifo_dp8|mem_byte_out[1]~6 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X29_Y5_N24
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[1]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[1]~feeder_combout  = \wb_dat_i[1]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[1]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[1]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[1]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[1]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X29_Y5_N25
dffeas \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[1] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[1]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(!\datafifowrite|custom_fifo_dp5|addr_wr [0]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg [1]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[1] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[1] .power_up = "low";
// synopsys translate_on

// Location: FF_X30_Y5_N3
dffeas \datafifowrite|custom_fifo_dp8|fifo_out[1] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp8|mem_byte_out[1]~6_combout ),
        .asdata(\datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg [1]),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(!\datafifowrite|custom_fifo_dp5|addr_rd [0]),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp8|fifo_out [1]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|fifo_out[1] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp8|fifo_out[1] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X30_Y5_N22
cycloneiv_lcell_comb \word_out~30 (
// Equation(s):
// \word_out~30_combout  = (\state.001~q  & ((\datafifowrite|custom_fifo_dp8|fifo_out [1]))) # (!\state.001~q  & (word_out[0]))

        .dataa(word_out[0]),
        .datab(\state.001~q ),
        .datac(gnd),
        .datad(\datafifowrite|custom_fifo_dp8|fifo_out [1]),
        .cin(gnd),
        .combout(\word_out~30_combout ),
        .cout());
// synopsys translate_off
defparam \word_out~30 .lut_mask = 16'hEE22;
defparam \word_out~30 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X30_Y5_N23
dffeas \word_out[1] (
        .clk(\wb_clk_i~inputclkctrl_outclk ),
        .d(\word_out~30_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\bitCountReg[3]~7_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(word_out[1]),
        .prn(vcc));
// synopsys translate_off
defparam \word_out[1] .is_wysiwyg = "true";
defparam \word_out[1] .power_up = "low";
// synopsys translate_on

// Location: FF_X31_Y5_N5
dffeas \datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[2] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[2]~input_o ),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [2]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg [2]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[2] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[2] .power_up = "low";
// synopsys translate_on

// Location: FF_X31_Y5_N11
dffeas \datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[2] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[2]~input_o ),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [1]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg [2]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[2] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[2] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X30_Y5_N16
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp8|mem_byte_out[2]~5 (
// Equation(s):
// \datafifowrite|custom_fifo_dp8|mem_byte_out[2]~5_combout  = (\datafifowrite|custom_fifo_dp5|addr_rd [1] & ((\datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg [2]))) # (!\datafifowrite|custom_fifo_dp5|addr_rd [1] & 
// (\datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg [2]))

        .dataa(\datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg [2]),
        .datab(\datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg [2]),
        .datac(gnd),
        .datad(\datafifowrite|custom_fifo_dp5|addr_rd [1]),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp8|mem_byte_out[2]~5_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem_byte_out[2]~5 .lut_mask = 16'hCCAA;
defparam \datafifowrite|custom_fifo_dp8|mem_byte_out[2]~5 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X29_Y5_N26
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[2]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[2]~feeder_combout  = \wb_dat_i[2]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[2]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[2]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[2]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[2]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X29_Y5_N27
dffeas \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[2] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[2]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(!\datafifowrite|custom_fifo_dp5|addr_wr [0]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg [2]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[2] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[2] .power_up = "low";
// synopsys translate_on

// Location: FF_X30_Y5_N17
dffeas \datafifowrite|custom_fifo_dp8|fifo_out[2] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp8|mem_byte_out[2]~5_combout ),
        .asdata(\datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg [2]),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(!\datafifowrite|custom_fifo_dp5|addr_rd [0]),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp8|fifo_out [2]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|fifo_out[2] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp8|fifo_out[2] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X30_Y5_N8
cycloneiv_lcell_comb \word_out~29 (
// Equation(s):
// \word_out~29_combout  = (\state.001~q  & ((\datafifowrite|custom_fifo_dp8|fifo_out [2]))) # (!\state.001~q  & (word_out[1]))

        .dataa(gnd),
        .datab(\state.001~q ),
        .datac(word_out[1]),
        .datad(\datafifowrite|custom_fifo_dp8|fifo_out [2]),
        .cin(gnd),
        .combout(\word_out~29_combout ),
        .cout());
// synopsys translate_off
defparam \word_out~29 .lut_mask = 16'hFC30;
defparam \word_out~29 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X30_Y5_N9
dffeas \word_out[2] (
        .clk(\wb_clk_i~inputclkctrl_outclk ),
        .d(\word_out~29_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\bitCountReg[3]~7_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(word_out[2]),
        .prn(vcc));
// synopsys translate_off
defparam \word_out[2] .is_wysiwyg = "true";
defparam \word_out[2] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X31_Y5_N6
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[3]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[3]~feeder_combout  = \wb_dat_i[3]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[3]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[3]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[3]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[3]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X31_Y5_N7
dffeas \datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[3] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[3]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [1]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg [3]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[3] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[3] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X31_Y5_N28
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[3]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[3]~feeder_combout  = \wb_dat_i[3]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[3]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[3]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[3]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[3]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X31_Y5_N29
dffeas \datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[3] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[3]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [2]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg [3]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[3] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[3] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X30_Y5_N6
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp8|mem_byte_out[3]~4 (
// Equation(s):
// \datafifowrite|custom_fifo_dp8|mem_byte_out[3]~4_combout  = (\datafifowrite|custom_fifo_dp5|addr_rd [1] & (\datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg [3])) # (!\datafifowrite|custom_fifo_dp5|addr_rd [1] & 
// ((\datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg [3])))

        .dataa(\datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg [3]),
        .datab(\datafifowrite|custom_fifo_dp5|addr_rd [1]),
        .datac(gnd),
        .datad(\datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg [3]),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp8|mem_byte_out[3]~4_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem_byte_out[3]~4 .lut_mask = 16'hBB88;
defparam \datafifowrite|custom_fifo_dp8|mem_byte_out[3]~4 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X29_Y5_N0
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[3]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[3]~feeder_combout  = \wb_dat_i[3]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(\wb_dat_i[3]~input_o ),
        .datad(gnd),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[3]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[3]~feeder .lut_mask = 16'hF0F0;
defparam \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[3]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X29_Y5_N1
dffeas \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[3] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[3]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(!\datafifowrite|custom_fifo_dp5|addr_wr [0]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg [3]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[3] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[3] .power_up = "low";
// synopsys translate_on

// Location: FF_X30_Y5_N7
dffeas \datafifowrite|custom_fifo_dp8|fifo_out[3] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp8|mem_byte_out[3]~4_combout ),
        .asdata(\datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg [3]),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(!\datafifowrite|custom_fifo_dp5|addr_rd [0]),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp8|fifo_out [3]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|fifo_out[3] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp8|fifo_out[3] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X30_Y5_N26
cycloneiv_lcell_comb \word_out~28 (
// Equation(s):
// \word_out~28_combout  = (\state.001~q  & ((\datafifowrite|custom_fifo_dp8|fifo_out [3]))) # (!\state.001~q  & (word_out[2]))

        .dataa(gnd),
        .datab(\state.001~q ),
        .datac(word_out[2]),
        .datad(\datafifowrite|custom_fifo_dp8|fifo_out [3]),
        .cin(gnd),
        .combout(\word_out~28_combout ),
        .cout());
// synopsys translate_off
defparam \word_out~28 .lut_mask = 16'hFC30;
defparam \word_out~28 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X30_Y5_N27
dffeas \word_out[3] (
        .clk(\wb_clk_i~inputclkctrl_outclk ),
        .d(\word_out~28_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\bitCountReg[3]~7_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(word_out[3]),
        .prn(vcc));
// synopsys translate_off
defparam \word_out[3] .is_wysiwyg = "true";
defparam \word_out[3] .power_up = "low";
// synopsys translate_on

// Location: FF_X31_Y5_N23
dffeas \datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[4] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[4]~input_o ),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [1]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg [4]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[4] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[4] .power_up = "low";
// synopsys translate_on

// Location: FF_X31_Y5_N13
dffeas \datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[4] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[4]~input_o ),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [2]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg [4]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[4] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[4] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X30_Y5_N24
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp8|mem_byte_out[4]~3 (
// Equation(s):
// \datafifowrite|custom_fifo_dp8|mem_byte_out[4]~3_combout  = (\datafifowrite|custom_fifo_dp5|addr_rd [1] & (\datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg [4])) # (!\datafifowrite|custom_fifo_dp5|addr_rd [1] & 
// ((\datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg [4])))

        .dataa(\datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg [4]),
        .datab(\datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg [4]),
        .datac(gnd),
        .datad(\datafifowrite|custom_fifo_dp5|addr_rd [1]),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp8|mem_byte_out[4]~3_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem_byte_out[4]~3 .lut_mask = 16'hAACC;
defparam \datafifowrite|custom_fifo_dp8|mem_byte_out[4]~3 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X29_Y5_N18
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[4]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[4]~feeder_combout  = \wb_dat_i[4]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[4]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[4]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[4]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[4]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X29_Y5_N19
dffeas \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[4] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[4]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(!\datafifowrite|custom_fifo_dp5|addr_wr [0]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg [4]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[4] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[4] .power_up = "low";
// synopsys translate_on

// Location: FF_X30_Y5_N25
dffeas \datafifowrite|custom_fifo_dp8|fifo_out[4] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp8|mem_byte_out[4]~3_combout ),
        .asdata(\datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg [4]),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(!\datafifowrite|custom_fifo_dp5|addr_rd [0]),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp8|fifo_out [4]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|fifo_out[4] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp8|fifo_out[4] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X30_Y5_N28
cycloneiv_lcell_comb \word_out~27 (
// Equation(s):
// \word_out~27_combout  = (\state.001~q  & ((\datafifowrite|custom_fifo_dp8|fifo_out [4]))) # (!\state.001~q  & (word_out[3]))

        .dataa(gnd),
        .datab(\state.001~q ),
        .datac(word_out[3]),
        .datad(\datafifowrite|custom_fifo_dp8|fifo_out [4]),
        .cin(gnd),
        .combout(\word_out~27_combout ),
        .cout());
// synopsys translate_off
defparam \word_out~27 .lut_mask = 16'hFC30;
defparam \word_out~27 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X30_Y5_N29
dffeas \word_out[4] (
        .clk(\wb_clk_i~inputclkctrl_outclk ),
        .d(\word_out~27_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\bitCountReg[3]~7_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(word_out[4]),
        .prn(vcc));
// synopsys translate_off
defparam \word_out[4] .is_wysiwyg = "true";
defparam \word_out[4] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X30_Y5_N14
cycloneiv_lcell_comb \word_out~26 (
// Equation(s):
// \word_out~26_combout  = (\state.001~q  & (\datafifowrite|custom_fifo_dp8|fifo_out [5])) # (!\state.001~q  & ((word_out[4])))

        .dataa(\datafifowrite|custom_fifo_dp8|fifo_out [5]),
        .datab(\state.001~q ),
        .datac(gnd),
        .datad(word_out[4]),
        .cin(gnd),
        .combout(\word_out~26_combout ),
        .cout());
// synopsys translate_off
defparam \word_out~26 .lut_mask = 16'hBB88;
defparam \word_out~26 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X30_Y5_N15
dffeas \word_out[5] (
        .clk(\wb_clk_i~inputclkctrl_outclk ),
        .d(\word_out~26_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\bitCountReg[3]~7_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(word_out[5]),
        .prn(vcc));
// synopsys translate_off
defparam \word_out[5] .is_wysiwyg = "true";
defparam \word_out[5] .power_up = "low";
// synopsys translate_on

// Location: FF_X31_Y5_N31
dffeas \datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[6] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[6]~input_o ),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [1]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg [6]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[6] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[6] .power_up = "low";
// synopsys translate_on

// Location: FF_X31_Y5_N9
dffeas \datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[6] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[6]~input_o ),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [2]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg [6]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[6] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[6] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X30_Y5_N20
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp8|mem_byte_out[6]~1 (
// Equation(s):
// \datafifowrite|custom_fifo_dp8|mem_byte_out[6]~1_combout  = (\datafifowrite|custom_fifo_dp5|addr_rd [1] & (\datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg [6])) # (!\datafifowrite|custom_fifo_dp5|addr_rd [1] & 
// ((\datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg [6])))

        .dataa(\datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg [6]),
        .datab(\datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg [6]),
        .datac(gnd),
        .datad(\datafifowrite|custom_fifo_dp5|addr_rd [1]),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp8|mem_byte_out[6]~1_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem_byte_out[6]~1 .lut_mask = 16'hAACC;
defparam \datafifowrite|custom_fifo_dp8|mem_byte_out[6]~1 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X29_Y5_N10
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[6]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[6]~feeder_combout  = \wb_dat_i[6]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[6]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[6]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[6]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[6]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X29_Y5_N11
dffeas \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[6] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[6]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(!\datafifowrite|custom_fifo_dp5|addr_wr [0]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg [6]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[6] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[6] .power_up = "low";
// synopsys translate_on

// Location: FF_X30_Y5_N21
dffeas \datafifowrite|custom_fifo_dp8|fifo_out[6] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp8|mem_byte_out[6]~1_combout ),
        .asdata(\datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg [6]),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(!\datafifowrite|custom_fifo_dp5|addr_rd [0]),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp8|fifo_out [6]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|fifo_out[6] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp8|fifo_out[6] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X30_Y5_N12
cycloneiv_lcell_comb \word_out~25 (
// Equation(s):
// \word_out~25_combout  = (\state.001~q  & ((\datafifowrite|custom_fifo_dp8|fifo_out [6]))) # (!\state.001~q  & (word_out[5]))

        .dataa(gnd),
        .datab(\state.001~q ),
        .datac(word_out[5]),
        .datad(\datafifowrite|custom_fifo_dp8|fifo_out [6]),
        .cin(gnd),
        .combout(\word_out~25_combout ),
        .cout());
// synopsys translate_off
defparam \word_out~25 .lut_mask = 16'hFC30;
defparam \word_out~25 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X30_Y5_N13
dffeas \word_out[6] (
        .clk(\wb_clk_i~inputclkctrl_outclk ),
        .d(\word_out~25_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\bitCountReg[3]~7_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(word_out[6]),
        .prn(vcc));
// synopsys translate_off
defparam \word_out[6] .is_wysiwyg = "true";
defparam \word_out[6] .power_up = "low";
// synopsys translate_on

// Location: FF_X31_Y5_N15
dffeas \datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[7] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[7]~input_o ),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [1]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg [7]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[7] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg[7] .power_up = "low";
// synopsys translate_on

// Location: FF_X31_Y5_N25
dffeas \datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[7] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[7]~input_o ),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [2]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg [7]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[7] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg[7] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X30_Y5_N18
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp8|mem_byte_out[7]~0 (
// Equation(s):
// \datafifowrite|custom_fifo_dp8|mem_byte_out[7]~0_combout  = (\datafifowrite|custom_fifo_dp5|addr_rd [1] & (\datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg [7])) # (!\datafifowrite|custom_fifo_dp5|addr_rd [1] & 
// ((\datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg [7])))

        .dataa(\datafifowrite|custom_fifo_dp8|mem[1].mem_byte|byte_reg [7]),
        .datab(\datafifowrite|custom_fifo_dp5|addr_rd [1]),
        .datac(gnd),
        .datad(\datafifowrite|custom_fifo_dp8|mem[2].mem_byte|byte_reg [7]),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp8|mem_byte_out[7]~0_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem_byte_out[7]~0 .lut_mask = 16'hBB88;
defparam \datafifowrite|custom_fifo_dp8|mem_byte_out[7]~0 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X29_Y5_N16
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[7]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[7]~feeder_combout  = \wb_dat_i[7]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(\wb_dat_i[7]~input_o ),
        .datad(gnd),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[7]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[7]~feeder .lut_mask = 16'hF0F0;
defparam \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[7]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X29_Y5_N17
dffeas \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[7] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[7]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(!\datafifowrite|custom_fifo_dp5|addr_wr [0]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg [7]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[7] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg[7] .power_up = "low";
// synopsys translate_on

// Location: FF_X30_Y5_N19
dffeas \datafifowrite|custom_fifo_dp8|fifo_out[7] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp8|mem_byte_out[7]~0_combout ),
        .asdata(\datafifowrite|custom_fifo_dp8|mem[0].mem_byte|byte_reg [7]),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(!\datafifowrite|custom_fifo_dp5|addr_rd [0]),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp8|fifo_out [7]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp8|fifo_out[7] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp8|fifo_out[7] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X30_Y5_N30
cycloneiv_lcell_comb \word_out~24 (
// Equation(s):
// \word_out~24_combout  = (\state.001~q  & ((\datafifowrite|custom_fifo_dp8|fifo_out [7]))) # (!\state.001~q  & (word_out[6]))

        .dataa(word_out[6]),
        .datab(\state.001~q ),
        .datac(gnd),
        .datad(\datafifowrite|custom_fifo_dp8|fifo_out [7]),
        .cin(gnd),
        .combout(\word_out~24_combout ),
        .cout());
// synopsys translate_off
defparam \word_out~24 .lut_mask = 16'hEE22;
defparam \word_out~24 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X30_Y5_N31
dffeas \word_out[7] (
        .clk(\wb_clk_i~inputclkctrl_outclk ),
        .d(\word_out~24_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\bitCountReg[3]~7_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(word_out[7]),
        .prn(vcc));
// synopsys translate_off
defparam \word_out[7] .is_wysiwyg = "true";
defparam \word_out[7] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X34_Y5_N10
cycloneiv_lcell_comb \word_out~23 (
// Equation(s):
// \word_out~23_combout  = (\state.001~q  & (\datafifowrite|custom_fifo_dp7|fifo_out [0])) # (!\state.001~q  & ((word_out[7])))

        .dataa(gnd),
        .datab(\state.001~q ),
        .datac(\datafifowrite|custom_fifo_dp7|fifo_out [0]),
        .datad(word_out[7]),
        .cin(gnd),
        .combout(\word_out~23_combout ),
        .cout());
// synopsys translate_off
defparam \word_out~23 .lut_mask = 16'hF3C0;
defparam \word_out~23 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X34_Y5_N11
dffeas \word_out[8] (
        .clk(\wb_clk_i~inputclkctrl_outclk ),
        .d(\word_out~23_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\bitCountReg[3]~7_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(word_out[8]),
        .prn(vcc));
// synopsys translate_off
defparam \word_out[8] .is_wysiwyg = "true";
defparam \word_out[8] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X35_Y5_N30
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[1]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[1]~feeder_combout  = \wb_dat_i[9]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[9]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[1]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[1]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[1]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X35_Y5_N31
dffeas \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[1] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[1]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [2]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg [1]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[1] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[1] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X35_Y5_N16
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[1]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[1]~feeder_combout  = \wb_dat_i[9]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[9]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[1]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[1]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[1]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X35_Y5_N17
dffeas \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[1] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[1]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [1]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg [1]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[1] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[1] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X34_Y5_N0
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp7|mem_byte_out[1]~6 (
// Equation(s):
// \datafifowrite|custom_fifo_dp7|mem_byte_out[1]~6_combout  = (\datafifowrite|custom_fifo_dp5|addr_rd [1] & ((\datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg [1]))) # (!\datafifowrite|custom_fifo_dp5|addr_rd [1] & 
// (\datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg [1]))

        .dataa(\datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg [1]),
        .datab(\datafifowrite|custom_fifo_dp5|addr_rd [1]),
        .datac(gnd),
        .datad(\datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg [1]),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp7|mem_byte_out[1]~6_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem_byte_out[1]~6 .lut_mask = 16'hEE22;
defparam \datafifowrite|custom_fifo_dp7|mem_byte_out[1]~6 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X32_Y5_N21
dffeas \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[1] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[9]~input_o ),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(!\datafifowrite|custom_fifo_dp5|addr_wr [0]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg [1]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[1] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[1] .power_up = "low";
// synopsys translate_on

// Location: FF_X34_Y5_N1
dffeas \datafifowrite|custom_fifo_dp7|fifo_out[1] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp7|mem_byte_out[1]~6_combout ),
        .asdata(\datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg [1]),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(!\datafifowrite|custom_fifo_dp5|addr_rd [0]),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp7|fifo_out [1]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|fifo_out[1] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp7|fifo_out[1] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X34_Y5_N20
cycloneiv_lcell_comb \word_out~22 (
// Equation(s):
// \word_out~22_combout  = (\state.001~q  & ((\datafifowrite|custom_fifo_dp7|fifo_out [1]))) # (!\state.001~q  & (word_out[8]))

        .dataa(word_out[8]),
        .datab(\state.001~q ),
        .datac(gnd),
        .datad(\datafifowrite|custom_fifo_dp7|fifo_out [1]),
        .cin(gnd),
        .combout(\word_out~22_combout ),
        .cout());
// synopsys translate_off
defparam \word_out~22 .lut_mask = 16'hEE22;
defparam \word_out~22 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X34_Y5_N21
dffeas \word_out[9] (
        .clk(\wb_clk_i~inputclkctrl_outclk ),
        .d(\word_out~22_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\bitCountReg[3]~7_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(word_out[9]),
        .prn(vcc));
// synopsys translate_off
defparam \word_out[9] .is_wysiwyg = "true";
defparam \word_out[9] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X34_Y5_N6
cycloneiv_lcell_comb \word_out~21 (
// Equation(s):
// \word_out~21_combout  = (\state.001~q  & (\datafifowrite|custom_fifo_dp7|fifo_out [2])) # (!\state.001~q  & ((word_out[9])))

        .dataa(\datafifowrite|custom_fifo_dp7|fifo_out [2]),
        .datab(word_out[9]),
        .datac(gnd),
        .datad(\state.001~q ),
        .cin(gnd),
        .combout(\word_out~21_combout ),
        .cout());
// synopsys translate_off
defparam \word_out~21 .lut_mask = 16'hAACC;
defparam \word_out~21 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X34_Y5_N7
dffeas \word_out[10] (
        .clk(\wb_clk_i~inputclkctrl_outclk ),
        .d(\word_out~21_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\bitCountReg[3]~7_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(word_out[10]),
        .prn(vcc));
// synopsys translate_off
defparam \word_out[10] .is_wysiwyg = "true";
defparam \word_out[10] .power_up = "low";
// synopsys translate_on

// Location: FF_X35_Y5_N21
dffeas \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[3] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[11]~input_o ),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [1]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg [3]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[3] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[3] .power_up = "low";
// synopsys translate_on

// Location: FF_X35_Y5_N11
dffeas \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[3] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[11]~input_o ),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [2]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg [3]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[3] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[3] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X34_Y5_N16
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp7|mem_byte_out[3]~4 (
// Equation(s):
// \datafifowrite|custom_fifo_dp7|mem_byte_out[3]~4_combout  = (\datafifowrite|custom_fifo_dp5|addr_rd [1] & (\datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg [3])) # (!\datafifowrite|custom_fifo_dp5|addr_rd [1] & 
// ((\datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg [3])))

        .dataa(\datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg [3]),
        .datab(\datafifowrite|custom_fifo_dp5|addr_rd [1]),
        .datac(gnd),
        .datad(\datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg [3]),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp7|mem_byte_out[3]~4_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem_byte_out[3]~4 .lut_mask = 16'hBB88;
defparam \datafifowrite|custom_fifo_dp7|mem_byte_out[3]~4 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X32_Y5_N8
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[3]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[3]~feeder_combout  = \wb_dat_i[11]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[11]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[3]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[3]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[3]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X32_Y5_N9
dffeas \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[3] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[3]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(!\datafifowrite|custom_fifo_dp5|addr_wr [0]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg [3]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[3] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[3] .power_up = "low";
// synopsys translate_on

// Location: FF_X34_Y5_N17
dffeas \datafifowrite|custom_fifo_dp7|fifo_out[3] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp7|mem_byte_out[3]~4_combout ),
        .asdata(\datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg [3]),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(!\datafifowrite|custom_fifo_dp5|addr_rd [0]),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp7|fifo_out [3]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|fifo_out[3] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp7|fifo_out[3] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X34_Y5_N8
cycloneiv_lcell_comb \word_out~20 (
// Equation(s):
// \word_out~20_combout  = (\state.001~q  & ((\datafifowrite|custom_fifo_dp7|fifo_out [3]))) # (!\state.001~q  & (word_out[10]))

        .dataa(word_out[10]),
        .datab(\state.001~q ),
        .datac(gnd),
        .datad(\datafifowrite|custom_fifo_dp7|fifo_out [3]),
        .cin(gnd),
        .combout(\word_out~20_combout ),
        .cout());
// synopsys translate_off
defparam \word_out~20 .lut_mask = 16'hEE22;
defparam \word_out~20 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X34_Y5_N9
dffeas \word_out[11] (
        .clk(\wb_clk_i~inputclkctrl_outclk ),
        .d(\word_out~20_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\bitCountReg[3]~7_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(word_out[11]),
        .prn(vcc));
// synopsys translate_off
defparam \word_out[11] .is_wysiwyg = "true";
defparam \word_out[11] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X35_Y5_N8
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[4]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[4]~feeder_combout  = \wb_dat_i[12]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[12]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[4]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[4]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[4]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X35_Y5_N9
dffeas \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[4] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[4]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [1]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg [4]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[4] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[4] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X35_Y5_N26
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[4]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[4]~feeder_combout  = \wb_dat_i[12]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[12]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[4]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[4]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[4]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X35_Y5_N27
dffeas \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[4] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[4]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [2]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg [4]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[4] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[4] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X34_Y5_N18
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp7|mem_byte_out[4]~3 (
// Equation(s):
// \datafifowrite|custom_fifo_dp7|mem_byte_out[4]~3_combout  = (\datafifowrite|custom_fifo_dp5|addr_rd [1] & (\datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg [4])) # (!\datafifowrite|custom_fifo_dp5|addr_rd [1] & 
// ((\datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg [4])))

        .dataa(\datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg [4]),
        .datab(\datafifowrite|custom_fifo_dp5|addr_rd [1]),
        .datac(gnd),
        .datad(\datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg [4]),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp7|mem_byte_out[4]~3_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem_byte_out[4]~3 .lut_mask = 16'hBB88;
defparam \datafifowrite|custom_fifo_dp7|mem_byte_out[4]~3 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X32_Y5_N30
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[4]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[4]~feeder_combout  = \wb_dat_i[12]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[12]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[4]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[4]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[4]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X32_Y5_N31
dffeas \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[4] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[4]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(!\datafifowrite|custom_fifo_dp5|addr_wr [0]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg [4]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[4] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[4] .power_up = "low";
// synopsys translate_on

// Location: FF_X34_Y5_N19
dffeas \datafifowrite|custom_fifo_dp7|fifo_out[4] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp7|mem_byte_out[4]~3_combout ),
        .asdata(\datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg [4]),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(!\datafifowrite|custom_fifo_dp5|addr_rd [0]),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp7|fifo_out [4]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|fifo_out[4] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp7|fifo_out[4] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X34_Y5_N22
cycloneiv_lcell_comb \word_out~19 (
// Equation(s):
// \word_out~19_combout  = (\state.001~q  & ((\datafifowrite|custom_fifo_dp7|fifo_out [4]))) # (!\state.001~q  & (word_out[11]))

        .dataa(gnd),
        .datab(\state.001~q ),
        .datac(word_out[11]),
        .datad(\datafifowrite|custom_fifo_dp7|fifo_out [4]),
        .cin(gnd),
        .combout(\word_out~19_combout ),
        .cout());
// synopsys translate_off
defparam \word_out~19 .lut_mask = 16'hFC30;
defparam \word_out~19 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X34_Y5_N23
dffeas \word_out[12] (
        .clk(\wb_clk_i~inputclkctrl_outclk ),
        .d(\word_out~19_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\bitCountReg[3]~7_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(word_out[12]),
        .prn(vcc));
// synopsys translate_off
defparam \word_out[12] .is_wysiwyg = "true";
defparam \word_out[12] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X35_Y5_N14
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[5]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[5]~feeder_combout  = \wb_dat_i[13]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[13]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[5]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[5]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[5]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X35_Y5_N15
dffeas \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[5] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[5]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [2]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg [5]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[5] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[5] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X35_Y5_N24
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[5]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[5]~feeder_combout  = \wb_dat_i[13]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[13]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[5]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[5]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[5]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X35_Y5_N25
dffeas \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[5] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[5]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [1]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg [5]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[5] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[5] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X34_Y5_N4
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp7|mem_byte_out[5]~2 (
// Equation(s):
// \datafifowrite|custom_fifo_dp7|mem_byte_out[5]~2_combout  = (\datafifowrite|custom_fifo_dp5|addr_rd [1] & ((\datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg [5]))) # (!\datafifowrite|custom_fifo_dp5|addr_rd [1] & 
// (\datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg [5]))

        .dataa(\datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg [5]),
        .datab(\datafifowrite|custom_fifo_dp5|addr_rd [1]),
        .datac(gnd),
        .datad(\datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg [5]),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp7|mem_byte_out[5]~2_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem_byte_out[5]~2 .lut_mask = 16'hEE22;
defparam \datafifowrite|custom_fifo_dp7|mem_byte_out[5]~2 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X32_Y5_N13
dffeas \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[5] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[13]~input_o ),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(!\datafifowrite|custom_fifo_dp5|addr_wr [0]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg [5]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[5] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[5] .power_up = "low";
// synopsys translate_on

// Location: FF_X34_Y5_N5
dffeas \datafifowrite|custom_fifo_dp7|fifo_out[5] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp7|mem_byte_out[5]~2_combout ),
        .asdata(\datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg [5]),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(!\datafifowrite|custom_fifo_dp5|addr_rd [0]),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp7|fifo_out [5]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|fifo_out[5] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp7|fifo_out[5] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X34_Y5_N12
cycloneiv_lcell_comb \word_out~18 (
// Equation(s):
// \word_out~18_combout  = (\state.001~q  & ((\datafifowrite|custom_fifo_dp7|fifo_out [5]))) # (!\state.001~q  & (word_out[12]))

        .dataa(word_out[12]),
        .datab(\datafifowrite|custom_fifo_dp7|fifo_out [5]),
        .datac(gnd),
        .datad(\state.001~q ),
        .cin(gnd),
        .combout(\word_out~18_combout ),
        .cout());
// synopsys translate_off
defparam \word_out~18 .lut_mask = 16'hCCAA;
defparam \word_out~18 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X34_Y5_N13
dffeas \word_out[13] (
        .clk(\wb_clk_i~inputclkctrl_outclk ),
        .d(\word_out~18_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\bitCountReg[3]~7_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(word_out[13]),
        .prn(vcc));
// synopsys translate_off
defparam \word_out[13] .is_wysiwyg = "true";
defparam \word_out[13] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X35_Y5_N0
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[6]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[6]~feeder_combout  = \wb_dat_i[14]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[14]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[6]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[6]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[6]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X35_Y5_N1
dffeas \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[6] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[6]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [1]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg [6]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[6] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[6] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X35_Y5_N18
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[6]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[6]~feeder_combout  = \wb_dat_i[14]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[14]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[6]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[6]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[6]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X35_Y5_N19
dffeas \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[6] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[6]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [2]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg [6]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[6] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[6] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X34_Y5_N2
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp7|mem_byte_out[6]~1 (
// Equation(s):
// \datafifowrite|custom_fifo_dp7|mem_byte_out[6]~1_combout  = (\datafifowrite|custom_fifo_dp5|addr_rd [1] & (\datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg [6])) # (!\datafifowrite|custom_fifo_dp5|addr_rd [1] & 
// ((\datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg [6])))

        .dataa(\datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg [6]),
        .datab(\datafifowrite|custom_fifo_dp5|addr_rd [1]),
        .datac(gnd),
        .datad(\datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg [6]),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp7|mem_byte_out[6]~1_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem_byte_out[6]~1 .lut_mask = 16'hBB88;
defparam \datafifowrite|custom_fifo_dp7|mem_byte_out[6]~1 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X32_Y5_N6
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[6]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[6]~feeder_combout  = \wb_dat_i[14]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[14]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[6]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[6]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[6]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X32_Y5_N7
dffeas \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[6] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[6]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(!\datafifowrite|custom_fifo_dp5|addr_wr [0]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg [6]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[6] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[6] .power_up = "low";
// synopsys translate_on

// Location: FF_X34_Y5_N3
dffeas \datafifowrite|custom_fifo_dp7|fifo_out[6] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp7|mem_byte_out[6]~1_combout ),
        .asdata(\datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg [6]),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(!\datafifowrite|custom_fifo_dp5|addr_rd [0]),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp7|fifo_out [6]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|fifo_out[6] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp7|fifo_out[6] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X34_Y5_N30
cycloneiv_lcell_comb \word_out~17 (
// Equation(s):
// \word_out~17_combout  = (\state.001~q  & ((\datafifowrite|custom_fifo_dp7|fifo_out [6]))) # (!\state.001~q  & (word_out[13]))

        .dataa(word_out[13]),
        .datab(\state.001~q ),
        .datac(gnd),
        .datad(\datafifowrite|custom_fifo_dp7|fifo_out [6]),
        .cin(gnd),
        .combout(\word_out~17_combout ),
        .cout());
// synopsys translate_off
defparam \word_out~17 .lut_mask = 16'hEE22;
defparam \word_out~17 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X34_Y5_N31
dffeas \word_out[14] (
        .clk(\wb_clk_i~inputclkctrl_outclk ),
        .d(\word_out~17_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\bitCountReg[3]~7_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(word_out[14]),
        .prn(vcc));
// synopsys translate_off
defparam \word_out[14] .is_wysiwyg = "true";
defparam \word_out[14] .power_up = "low";
// synopsys translate_on

// Location: FF_X35_Y5_N3
dffeas \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[7] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[15]~input_o ),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [2]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg [7]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[7] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg[7] .power_up = "low";
// synopsys translate_on

// Location: FF_X35_Y5_N5
dffeas \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[7] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[15]~input_o ),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [1]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg [7]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[7] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg[7] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X34_Y5_N28
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp7|mem_byte_out[7]~0 (
// Equation(s):
// \datafifowrite|custom_fifo_dp7|mem_byte_out[7]~0_combout  = (\datafifowrite|custom_fifo_dp5|addr_rd [1] & ((\datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg [7]))) # (!\datafifowrite|custom_fifo_dp5|addr_rd [1] & 
// (\datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg [7]))

        .dataa(\datafifowrite|custom_fifo_dp7|mem[2].mem_byte|byte_reg [7]),
        .datab(\datafifowrite|custom_fifo_dp5|addr_rd [1]),
        .datac(gnd),
        .datad(\datafifowrite|custom_fifo_dp7|mem[1].mem_byte|byte_reg [7]),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp7|mem_byte_out[7]~0_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem_byte_out[7]~0 .lut_mask = 16'hEE22;
defparam \datafifowrite|custom_fifo_dp7|mem_byte_out[7]~0 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X32_Y5_N0
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[7]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[7]~feeder_combout  = \wb_dat_i[15]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[15]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[7]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[7]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[7]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X32_Y5_N1
dffeas \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[7] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[7]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(!\datafifowrite|custom_fifo_dp5|addr_wr [0]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg [7]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[7] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg[7] .power_up = "low";
// synopsys translate_on

// Location: FF_X34_Y5_N29
dffeas \datafifowrite|custom_fifo_dp7|fifo_out[7] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp7|mem_byte_out[7]~0_combout ),
        .asdata(\datafifowrite|custom_fifo_dp7|mem[0].mem_byte|byte_reg [7]),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(!\datafifowrite|custom_fifo_dp5|addr_rd [0]),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp7|fifo_out [7]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp7|fifo_out[7] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp7|fifo_out[7] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X34_Y5_N24
cycloneiv_lcell_comb \word_out~16 (
// Equation(s):
// \word_out~16_combout  = (\state.001~q  & ((\datafifowrite|custom_fifo_dp7|fifo_out [7]))) # (!\state.001~q  & (word_out[14]))

        .dataa(word_out[14]),
        .datab(\state.001~q ),
        .datac(gnd),
        .datad(\datafifowrite|custom_fifo_dp7|fifo_out [7]),
        .cin(gnd),
        .combout(\word_out~16_combout ),
        .cout());
// synopsys translate_off
defparam \word_out~16 .lut_mask = 16'hEE22;
defparam \word_out~16 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X34_Y5_N25
dffeas \word_out[15] (
        .clk(\wb_clk_i~inputclkctrl_outclk ),
        .d(\word_out~16_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\bitCountReg[3]~7_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(word_out[15]),
        .prn(vcc));
// synopsys translate_off
defparam \word_out[15] .is_wysiwyg = "true";
defparam \word_out[15] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X31_Y4_N30
cycloneiv_lcell_comb \word_out~15 (
// Equation(s):
// \word_out~15_combout  = (\state.001~q  & (\datafifowrite|custom_fifo_dp6|fifo_out [0])) # (!\state.001~q  & ((word_out[15])))

        .dataa(\datafifowrite|custom_fifo_dp6|fifo_out [0]),
        .datab(\state.001~q ),
        .datac(gnd),
        .datad(word_out[15]),
        .cin(gnd),
        .combout(\word_out~15_combout ),
        .cout());
// synopsys translate_off
defparam \word_out~15 .lut_mask = 16'hBB88;
defparam \word_out~15 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X31_Y4_N31
dffeas \word_out[16] (
        .clk(\wb_clk_i~inputclkctrl_outclk ),
        .d(\word_out~15_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\bitCountReg[3]~7_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(word_out[16]),
        .prn(vcc));
// synopsys translate_off
defparam \word_out[16] .is_wysiwyg = "true";
defparam \word_out[16] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X32_Y4_N20
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg[1]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg[1]~feeder_combout  = \wb_dat_i[17]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[17]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg[1]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg[1]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg[1]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X32_Y4_N21
dffeas \datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg[1] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg[1]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [1]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg [1]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg[1] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg[1] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X32_Y4_N18
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg[1]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg[1]~feeder_combout  = \wb_dat_i[17]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[17]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg[1]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg[1]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg[1]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X32_Y4_N19
dffeas \datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg[1] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg[1]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [2]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg [1]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg[1] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg[1] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X31_Y4_N2
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp6|mem_byte_out[1]~6 (
// Equation(s):
// \datafifowrite|custom_fifo_dp6|mem_byte_out[1]~6_combout  = (\datafifowrite|custom_fifo_dp5|addr_rd [1] & (\datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg [1])) # (!\datafifowrite|custom_fifo_dp5|addr_rd [1] & 
// ((\datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg [1])))

        .dataa(\datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg [1]),
        .datab(\datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg [1]),
        .datac(gnd),
        .datad(\datafifowrite|custom_fifo_dp5|addr_rd [1]),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp6|mem_byte_out[1]~6_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|mem_byte_out[1]~6 .lut_mask = 16'hAACC;
defparam \datafifowrite|custom_fifo_dp6|mem_byte_out[1]~6 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X34_Y4_N4
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[1]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[1]~feeder_combout  = \wb_dat_i[17]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[17]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[1]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[1]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[1]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X34_Y4_N5
dffeas \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[1] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[1]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(!\datafifowrite|custom_fifo_dp5|addr_wr [0]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg [1]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[1] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[1] .power_up = "low";
// synopsys translate_on

// Location: FF_X31_Y4_N3
dffeas \datafifowrite|custom_fifo_dp6|fifo_out[1] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp6|mem_byte_out[1]~6_combout ),
        .asdata(\datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg [1]),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(!\datafifowrite|custom_fifo_dp5|addr_rd [0]),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp6|fifo_out [1]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|fifo_out[1] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp6|fifo_out[1] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X31_Y4_N8
cycloneiv_lcell_comb \word_out~14 (
// Equation(s):
// \word_out~14_combout  = (\state.001~q  & ((\datafifowrite|custom_fifo_dp6|fifo_out [1]))) # (!\state.001~q  & (word_out[16]))

        .dataa(gnd),
        .datab(\state.001~q ),
        .datac(word_out[16]),
        .datad(\datafifowrite|custom_fifo_dp6|fifo_out [1]),
        .cin(gnd),
        .combout(\word_out~14_combout ),
        .cout());
// synopsys translate_off
defparam \word_out~14 .lut_mask = 16'hFC30;
defparam \word_out~14 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X31_Y4_N9
dffeas \word_out[17] (
        .clk(\wb_clk_i~inputclkctrl_outclk ),
        .d(\word_out~14_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\bitCountReg[3]~7_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(word_out[17]),
        .prn(vcc));
// synopsys translate_off
defparam \word_out[17] .is_wysiwyg = "true";
defparam \word_out[17] .power_up = "low";
// synopsys translate_on

// Location: FF_X32_Y4_N1
dffeas \datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg[2] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[18]~input_o ),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [1]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg [2]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg[2] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg[2] .power_up = "low";
// synopsys translate_on

// Location: FF_X32_Y4_N23
dffeas \datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg[2] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[18]~input_o ),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [2]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg [2]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg[2] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg[2] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X31_Y4_N24
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp6|mem_byte_out[2]~5 (
// Equation(s):
// \datafifowrite|custom_fifo_dp6|mem_byte_out[2]~5_combout  = (\datafifowrite|custom_fifo_dp5|addr_rd [1] & (\datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg [2])) # (!\datafifowrite|custom_fifo_dp5|addr_rd [1] & 
// ((\datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg [2])))

        .dataa(\datafifowrite|custom_fifo_dp5|addr_rd [1]),
        .datab(\datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg [2]),
        .datac(gnd),
        .datad(\datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg [2]),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp6|mem_byte_out[2]~5_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|mem_byte_out[2]~5 .lut_mask = 16'hDD88;
defparam \datafifowrite|custom_fifo_dp6|mem_byte_out[2]~5 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X34_Y4_N14
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[2]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[2]~feeder_combout  = \wb_dat_i[18]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(\wb_dat_i[18]~input_o ),
        .datad(gnd),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[2]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[2]~feeder .lut_mask = 16'hF0F0;
defparam \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[2]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X34_Y4_N15
dffeas \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[2] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[2]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(!\datafifowrite|custom_fifo_dp5|addr_wr [0]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg [2]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[2] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[2] .power_up = "low";
// synopsys translate_on

// Location: FF_X31_Y4_N25
dffeas \datafifowrite|custom_fifo_dp6|fifo_out[2] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp6|mem_byte_out[2]~5_combout ),
        .asdata(\datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg [2]),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(!\datafifowrite|custom_fifo_dp5|addr_rd [0]),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp6|fifo_out [2]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|fifo_out[2] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp6|fifo_out[2] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X31_Y4_N10
cycloneiv_lcell_comb \word_out~13 (
// Equation(s):
// \word_out~13_combout  = (\state.001~q  & ((\datafifowrite|custom_fifo_dp6|fifo_out [2]))) # (!\state.001~q  & (word_out[17]))

        .dataa(gnd),
        .datab(\state.001~q ),
        .datac(word_out[17]),
        .datad(\datafifowrite|custom_fifo_dp6|fifo_out [2]),
        .cin(gnd),
        .combout(\word_out~13_combout ),
        .cout());
// synopsys translate_off
defparam \word_out~13 .lut_mask = 16'hFC30;
defparam \word_out~13 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X31_Y4_N11
dffeas \word_out[18] (
        .clk(\wb_clk_i~inputclkctrl_outclk ),
        .d(\word_out~13_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\bitCountReg[3]~7_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(word_out[18]),
        .prn(vcc));
// synopsys translate_off
defparam \word_out[18] .is_wysiwyg = "true";
defparam \word_out[18] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X31_Y4_N4
cycloneiv_lcell_comb \word_out~12 (
// Equation(s):
// \word_out~12_combout  = (\state.001~q  & (\datafifowrite|custom_fifo_dp6|fifo_out [3])) # (!\state.001~q  & ((word_out[18])))

        .dataa(gnd),
        .datab(\state.001~q ),
        .datac(\datafifowrite|custom_fifo_dp6|fifo_out [3]),
        .datad(word_out[18]),
        .cin(gnd),
        .combout(\word_out~12_combout ),
        .cout());
// synopsys translate_off
defparam \word_out~12 .lut_mask = 16'hF3C0;
defparam \word_out~12 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X31_Y4_N5
dffeas \word_out[19] (
        .clk(\wb_clk_i~inputclkctrl_outclk ),
        .d(\word_out~12_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\bitCountReg[3]~7_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(word_out[19]),
        .prn(vcc));
// synopsys translate_off
defparam \word_out[19] .is_wysiwyg = "true";
defparam \word_out[19] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X32_Y4_N4
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg[4]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg[4]~feeder_combout  = \wb_dat_i[20]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[20]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg[4]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg[4]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg[4]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X32_Y4_N5
dffeas \datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg[4] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg[4]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [1]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg [4]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg[4] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg[4] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X32_Y4_N10
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg[4]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg[4]~feeder_combout  = \wb_dat_i[20]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[20]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg[4]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg[4]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg[4]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X32_Y4_N11
dffeas \datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg[4] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg[4]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [2]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg [4]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg[4] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg[4] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X31_Y4_N6
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp6|mem_byte_out[4]~3 (
// Equation(s):
// \datafifowrite|custom_fifo_dp6|mem_byte_out[4]~3_combout  = (\datafifowrite|custom_fifo_dp5|addr_rd [1] & (\datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg [4])) # (!\datafifowrite|custom_fifo_dp5|addr_rd [1] & 
// ((\datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg [4])))

        .dataa(\datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg [4]),
        .datab(\datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg [4]),
        .datac(gnd),
        .datad(\datafifowrite|custom_fifo_dp5|addr_rd [1]),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp6|mem_byte_out[4]~3_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|mem_byte_out[4]~3 .lut_mask = 16'hAACC;
defparam \datafifowrite|custom_fifo_dp6|mem_byte_out[4]~3 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X34_Y4_N12
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[4]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[4]~feeder_combout  = \wb_dat_i[20]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(\wb_dat_i[20]~input_o ),
        .datad(gnd),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[4]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[4]~feeder .lut_mask = 16'hF0F0;
defparam \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[4]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X34_Y4_N13
dffeas \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[4] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[4]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(!\datafifowrite|custom_fifo_dp5|addr_wr [0]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg [4]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[4] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[4] .power_up = "low";
// synopsys translate_on

// Location: FF_X31_Y4_N7
dffeas \datafifowrite|custom_fifo_dp6|fifo_out[4] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp6|mem_byte_out[4]~3_combout ),
        .asdata(\datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg [4]),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(!\datafifowrite|custom_fifo_dp5|addr_rd [0]),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp6|fifo_out [4]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|fifo_out[4] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp6|fifo_out[4] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X31_Y4_N22
cycloneiv_lcell_comb \word_out~11 (
// Equation(s):
// \word_out~11_combout  = (\state.001~q  & ((\datafifowrite|custom_fifo_dp6|fifo_out [4]))) # (!\state.001~q  & (word_out[19]))

        .dataa(gnd),
        .datab(\state.001~q ),
        .datac(word_out[19]),
        .datad(\datafifowrite|custom_fifo_dp6|fifo_out [4]),
        .cin(gnd),
        .combout(\word_out~11_combout ),
        .cout());
// synopsys translate_off
defparam \word_out~11 .lut_mask = 16'hFC30;
defparam \word_out~11 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X31_Y4_N23
dffeas \word_out[20] (
        .clk(\wb_clk_i~inputclkctrl_outclk ),
        .d(\word_out~11_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\bitCountReg[3]~7_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(word_out[20]),
        .prn(vcc));
// synopsys translate_off
defparam \word_out[20] .is_wysiwyg = "true";
defparam \word_out[20] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X32_Y4_N8
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg[5]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg[5]~feeder_combout  = \wb_dat_i[21]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[21]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg[5]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg[5]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg[5]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X32_Y4_N9
dffeas \datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg[5] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg[5]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [1]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg [5]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg[5] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg[5] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X32_Y4_N26
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg[5]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg[5]~feeder_combout  = \wb_dat_i[21]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[21]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg[5]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg[5]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg[5]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X32_Y4_N27
dffeas \datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg[5] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg[5]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [2]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg [5]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg[5] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg[5] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X34_Y4_N20
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp6|mem_byte_out[5]~2 (
// Equation(s):
// \datafifowrite|custom_fifo_dp6|mem_byte_out[5]~2_combout  = (\datafifowrite|custom_fifo_dp5|addr_rd [1] & (\datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg [5])) # (!\datafifowrite|custom_fifo_dp5|addr_rd [1] & 
// ((\datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg [5])))

        .dataa(\datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg [5]),
        .datab(\datafifowrite|custom_fifo_dp5|addr_rd [1]),
        .datac(gnd),
        .datad(\datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg [5]),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp6|mem_byte_out[5]~2_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|mem_byte_out[5]~2 .lut_mask = 16'hBB88;
defparam \datafifowrite|custom_fifo_dp6|mem_byte_out[5]~2 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X34_Y4_N22
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[5]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[5]~feeder_combout  = \wb_dat_i[21]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[21]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[5]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[5]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[5]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X34_Y4_N23
dffeas \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[5] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[5]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(!\datafifowrite|custom_fifo_dp5|addr_wr [0]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg [5]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[5] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[5] .power_up = "low";
// synopsys translate_on

// Location: FF_X34_Y4_N21
dffeas \datafifowrite|custom_fifo_dp6|fifo_out[5] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp6|mem_byte_out[5]~2_combout ),
        .asdata(\datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg [5]),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(!\datafifowrite|custom_fifo_dp5|addr_rd [0]),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp6|fifo_out [5]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|fifo_out[5] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp6|fifo_out[5] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X31_Y4_N20
cycloneiv_lcell_comb \word_out~10 (
// Equation(s):
// \word_out~10_combout  = (\state.001~q  & ((\datafifowrite|custom_fifo_dp6|fifo_out [5]))) # (!\state.001~q  & (word_out[20]))

        .dataa(gnd),
        .datab(\state.001~q ),
        .datac(word_out[20]),
        .datad(\datafifowrite|custom_fifo_dp6|fifo_out [5]),
        .cin(gnd),
        .combout(\word_out~10_combout ),
        .cout());
// synopsys translate_off
defparam \word_out~10 .lut_mask = 16'hFC30;
defparam \word_out~10 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X31_Y4_N21
dffeas \word_out[21] (
        .clk(\wb_clk_i~inputclkctrl_outclk ),
        .d(\word_out~10_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\bitCountReg[3]~7_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(word_out[21]),
        .prn(vcc));
// synopsys translate_off
defparam \word_out[21] .is_wysiwyg = "true";
defparam \word_out[21] .power_up = "low";
// synopsys translate_on

// Location: FF_X30_Y3_N31
dffeas \datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg[6] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[22]~input_o ),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [2]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg [6]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg[6] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg[6] .power_up = "low";
// synopsys translate_on

// Location: FF_X30_Y3_N1
dffeas \datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg[6] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[22]~input_o ),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [1]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg [6]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg[6] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg[6] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X30_Y4_N16
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp6|mem_byte_out[6]~1 (
// Equation(s):
// \datafifowrite|custom_fifo_dp6|mem_byte_out[6]~1_combout  = (\datafifowrite|custom_fifo_dp5|addr_rd [1] & ((\datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg [6]))) # (!\datafifowrite|custom_fifo_dp5|addr_rd [1] & 
// (\datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg [6]))

        .dataa(\datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg [6]),
        .datab(\datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg [6]),
        .datac(gnd),
        .datad(\datafifowrite|custom_fifo_dp5|addr_rd [1]),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp6|mem_byte_out[6]~1_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|mem_byte_out[6]~1 .lut_mask = 16'hCCAA;
defparam \datafifowrite|custom_fifo_dp6|mem_byte_out[6]~1 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X29_Y4_N13
dffeas \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[6] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[22]~input_o ),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(!\datafifowrite|custom_fifo_dp5|addr_wr [0]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg [6]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[6] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[6] .power_up = "low";
// synopsys translate_on

// Location: FF_X30_Y4_N17
dffeas \datafifowrite|custom_fifo_dp6|fifo_out[6] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp6|mem_byte_out[6]~1_combout ),
        .asdata(\datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg [6]),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(!\datafifowrite|custom_fifo_dp5|addr_rd [0]),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp6|fifo_out [6]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|fifo_out[6] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp6|fifo_out[6] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X30_Y4_N22
cycloneiv_lcell_comb \word_out~9 (
// Equation(s):
// \word_out~9_combout  = (\state.001~q  & ((\datafifowrite|custom_fifo_dp6|fifo_out [6]))) # (!\state.001~q  & (word_out[21]))

        .dataa(gnd),
        .datab(\state.001~q ),
        .datac(word_out[21]),
        .datad(\datafifowrite|custom_fifo_dp6|fifo_out [6]),
        .cin(gnd),
        .combout(\word_out~9_combout ),
        .cout());
// synopsys translate_off
defparam \word_out~9 .lut_mask = 16'hFC30;
defparam \word_out~9 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X30_Y4_N23
dffeas \word_out[22] (
        .clk(\wb_clk_i~inputclkctrl_outclk ),
        .d(\word_out~9_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\bitCountReg[3]~7_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(word_out[22]),
        .prn(vcc));
// synopsys translate_off
defparam \word_out[22] .is_wysiwyg = "true";
defparam \word_out[22] .power_up = "low";
// synopsys translate_on

// Location: FF_X29_Y4_N9
dffeas \datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg[7] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[23]~input_o ),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [1]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg [7]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg[7] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg[7] .power_up = "low";
// synopsys translate_on

// Location: FF_X30_Y3_N19
dffeas \datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg[7] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[23]~input_o ),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [2]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg [7]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg[7] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg[7] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X30_Y4_N18
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp6|mem_byte_out[7]~0 (
// Equation(s):
// \datafifowrite|custom_fifo_dp6|mem_byte_out[7]~0_combout  = (\datafifowrite|custom_fifo_dp5|addr_rd [1] & (\datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg [7])) # (!\datafifowrite|custom_fifo_dp5|addr_rd [1] & 
// ((\datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg [7])))

        .dataa(\datafifowrite|custom_fifo_dp6|mem[1].mem_byte|byte_reg [7]),
        .datab(\datafifowrite|custom_fifo_dp5|addr_rd [1]),
        .datac(gnd),
        .datad(\datafifowrite|custom_fifo_dp6|mem[2].mem_byte|byte_reg [7]),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp6|mem_byte_out[7]~0_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|mem_byte_out[7]~0 .lut_mask = 16'hBB88;
defparam \datafifowrite|custom_fifo_dp6|mem_byte_out[7]~0 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X29_Y4_N15
dffeas \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[7] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[23]~input_o ),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(!\datafifowrite|custom_fifo_dp5|addr_wr [0]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg [7]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[7] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg[7] .power_up = "low";
// synopsys translate_on

// Location: FF_X30_Y4_N19
dffeas \datafifowrite|custom_fifo_dp6|fifo_out[7] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp6|mem_byte_out[7]~0_combout ),
        .asdata(\datafifowrite|custom_fifo_dp6|mem[0].mem_byte|byte_reg [7]),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(!\datafifowrite|custom_fifo_dp5|addr_rd [0]),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp6|fifo_out [7]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp6|fifo_out[7] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp6|fifo_out[7] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X30_Y4_N12
cycloneiv_lcell_comb \word_out~8 (
// Equation(s):
// \word_out~8_combout  = (\state.001~q  & ((\datafifowrite|custom_fifo_dp6|fifo_out [7]))) # (!\state.001~q  & (word_out[22]))

        .dataa(gnd),
        .datab(\state.001~q ),
        .datac(word_out[22]),
        .datad(\datafifowrite|custom_fifo_dp6|fifo_out [7]),
        .cin(gnd),
        .combout(\word_out~8_combout ),
        .cout());
// synopsys translate_off
defparam \word_out~8 .lut_mask = 16'hFC30;
defparam \word_out~8 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X30_Y4_N13
dffeas \word_out[23] (
        .clk(\wb_clk_i~inputclkctrl_outclk ),
        .d(\word_out~8_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\bitCountReg[3]~7_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(word_out[23]),
        .prn(vcc));
// synopsys translate_off
defparam \word_out[23] .is_wysiwyg = "true";
defparam \word_out[23] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X31_Y5_N20
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[0]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[0]~feeder_combout  = \wb_dat_i[24]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[24]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[0]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[0]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[0]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X31_Y5_N21
dffeas \datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[0] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[0]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [2]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg [0]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[0] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[0] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X29_Y4_N28
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[0]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[0]~feeder_combout  = \wb_dat_i[24]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[24]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[0]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[0]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[0]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X29_Y4_N29
dffeas \datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[0] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[0]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [1]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg [0]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[0] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[0] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X30_Y4_N0
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp5|mem_byte_out[0]~7 (
// Equation(s):
// \datafifowrite|custom_fifo_dp5|mem_byte_out[0]~7_combout  = (\datafifowrite|custom_fifo_dp5|addr_rd [1] & ((\datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg [0]))) # (!\datafifowrite|custom_fifo_dp5|addr_rd [1] & 
// (\datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg [0]))

        .dataa(\datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg [0]),
        .datab(\datafifowrite|custom_fifo_dp5|addr_rd [1]),
        .datac(gnd),
        .datad(\datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg [0]),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp5|mem_byte_out[0]~7_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|mem_byte_out[0]~7 .lut_mask = 16'hEE22;
defparam \datafifowrite|custom_fifo_dp5|mem_byte_out[0]~7 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X29_Y4_N26
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[0]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[0]~feeder_combout  = \wb_dat_i[24]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[24]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[0]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[0]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[0]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X29_Y4_N27
dffeas \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[0] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[0]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(!\datafifowrite|custom_fifo_dp5|addr_wr [0]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg [0]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[0] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[0] .power_up = "low";
// synopsys translate_on

// Location: FF_X30_Y4_N1
dffeas \datafifowrite|custom_fifo_dp5|fifo_out[0] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp5|mem_byte_out[0]~7_combout ),
        .asdata(\datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg [0]),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(!\datafifowrite|custom_fifo_dp5|addr_rd [0]),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp5|fifo_out [0]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|fifo_out[0] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp5|fifo_out[0] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X30_Y4_N6
cycloneiv_lcell_comb \word_out~7 (
// Equation(s):
// \word_out~7_combout  = (\state.001~q  & ((\datafifowrite|custom_fifo_dp5|fifo_out [0]))) # (!\state.001~q  & (word_out[23]))

        .dataa(word_out[23]),
        .datab(\state.001~q ),
        .datac(gnd),
        .datad(\datafifowrite|custom_fifo_dp5|fifo_out [0]),
        .cin(gnd),
        .combout(\word_out~7_combout ),
        .cout());
// synopsys translate_off
defparam \word_out~7 .lut_mask = 16'hEE22;
defparam \word_out~7 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X30_Y4_N7
dffeas \word_out[24] (
        .clk(\wb_clk_i~inputclkctrl_outclk ),
        .d(\word_out~7_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\bitCountReg[3]~7_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(word_out[24]),
        .prn(vcc));
// synopsys translate_off
defparam \word_out[24] .is_wysiwyg = "true";
defparam \word_out[24] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X30_Y4_N4
cycloneiv_lcell_comb \word_out~6 (
// Equation(s):
// \word_out~6_combout  = (\state.001~q  & (\datafifowrite|custom_fifo_dp5|fifo_out [1])) # (!\state.001~q  & ((word_out[24])))

        .dataa(\datafifowrite|custom_fifo_dp5|fifo_out [1]),
        .datab(\state.001~q ),
        .datac(gnd),
        .datad(word_out[24]),
        .cin(gnd),
        .combout(\word_out~6_combout ),
        .cout());
// synopsys translate_off
defparam \word_out~6 .lut_mask = 16'hBB88;
defparam \word_out~6 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X30_Y4_N5
dffeas \word_out[25] (
        .clk(\wb_clk_i~inputclkctrl_outclk ),
        .d(\word_out~6_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\bitCountReg[3]~7_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(word_out[25]),
        .prn(vcc));
// synopsys translate_off
defparam \word_out[25] .is_wysiwyg = "true";
defparam \word_out[25] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X30_Y3_N12
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[2]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[2]~feeder_combout  = \wb_dat_i[26]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[26]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[2]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[2]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[2]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X30_Y3_N13
dffeas \datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[2] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[2]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [2]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg [2]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[2] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[2] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X29_Y4_N22
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[2]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[2]~feeder_combout  = \wb_dat_i[26]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[26]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[2]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[2]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[2]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X29_Y4_N23
dffeas \datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[2] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[2]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [1]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg [2]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[2] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[2] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X30_Y4_N28
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp5|mem_byte_out[2]~5 (
// Equation(s):
// \datafifowrite|custom_fifo_dp5|mem_byte_out[2]~5_combout  = (\datafifowrite|custom_fifo_dp5|addr_rd [1] & ((\datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg [2]))) # (!\datafifowrite|custom_fifo_dp5|addr_rd [1] & 
// (\datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg [2]))

        .dataa(\datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg [2]),
        .datab(\datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg [2]),
        .datac(gnd),
        .datad(\datafifowrite|custom_fifo_dp5|addr_rd [1]),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp5|mem_byte_out[2]~5_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|mem_byte_out[2]~5 .lut_mask = 16'hCCAA;
defparam \datafifowrite|custom_fifo_dp5|mem_byte_out[2]~5 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X29_Y4_N4
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[2]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[2]~feeder_combout  = \wb_dat_i[26]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[26]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[2]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[2]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[2]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X29_Y4_N5
dffeas \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[2] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[2]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(!\datafifowrite|custom_fifo_dp5|addr_wr [0]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg [2]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[2] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[2] .power_up = "low";
// synopsys translate_on

// Location: FF_X30_Y4_N29
dffeas \datafifowrite|custom_fifo_dp5|fifo_out[2] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp5|mem_byte_out[2]~5_combout ),
        .asdata(\datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg [2]),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(!\datafifowrite|custom_fifo_dp5|addr_rd [0]),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp5|fifo_out [2]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|fifo_out[2] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp5|fifo_out[2] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X30_Y4_N14
cycloneiv_lcell_comb \word_out~5 (
// Equation(s):
// \word_out~5_combout  = (\state.001~q  & ((\datafifowrite|custom_fifo_dp5|fifo_out [2]))) # (!\state.001~q  & (word_out[25]))

        .dataa(gnd),
        .datab(\state.001~q ),
        .datac(word_out[25]),
        .datad(\datafifowrite|custom_fifo_dp5|fifo_out [2]),
        .cin(gnd),
        .combout(\word_out~5_combout ),
        .cout());
// synopsys translate_off
defparam \word_out~5 .lut_mask = 16'hFC30;
defparam \word_out~5 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X30_Y4_N15
dffeas \word_out[26] (
        .clk(\wb_clk_i~inputclkctrl_outclk ),
        .d(\word_out~5_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\bitCountReg[3]~7_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(word_out[26]),
        .prn(vcc));
// synopsys translate_off
defparam \word_out[26] .is_wysiwyg = "true";
defparam \word_out[26] .power_up = "low";
// synopsys translate_on

// Location: FF_X32_Y4_N7
dffeas \datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[3] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[27]~input_o ),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [2]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg [3]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[3] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[3] .power_up = "low";
// synopsys translate_on

// Location: FF_X32_Y4_N13
dffeas \datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[3] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[27]~input_o ),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [1]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg [3]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[3] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[3] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X31_Y4_N16
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp5|mem_byte_out[3]~4 (
// Equation(s):
// \datafifowrite|custom_fifo_dp5|mem_byte_out[3]~4_combout  = (\datafifowrite|custom_fifo_dp5|addr_rd [1] & ((\datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg [3]))) # (!\datafifowrite|custom_fifo_dp5|addr_rd [1] & 
// (\datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg [3]))

        .dataa(\datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg [3]),
        .datab(\datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg [3]),
        .datac(gnd),
        .datad(\datafifowrite|custom_fifo_dp5|addr_rd [1]),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp5|mem_byte_out[3]~4_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|mem_byte_out[3]~4 .lut_mask = 16'hCCAA;
defparam \datafifowrite|custom_fifo_dp5|mem_byte_out[3]~4 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X34_Y4_N24
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[3]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[3]~feeder_combout  = \wb_dat_i[27]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[27]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[3]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[3]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[3]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X34_Y4_N25
dffeas \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[3] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[3]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(!\datafifowrite|custom_fifo_dp5|addr_wr [0]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg [3]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[3] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[3] .power_up = "low";
// synopsys translate_on

// Location: FF_X31_Y4_N17
dffeas \datafifowrite|custom_fifo_dp5|fifo_out[3] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp5|mem_byte_out[3]~4_combout ),
        .asdata(\datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg [3]),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(!\datafifowrite|custom_fifo_dp5|addr_rd [0]),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp5|fifo_out [3]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|fifo_out[3] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp5|fifo_out[3] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X31_Y4_N18
cycloneiv_lcell_comb \word_out~4 (
// Equation(s):
// \word_out~4_combout  = (\state.001~q  & ((\datafifowrite|custom_fifo_dp5|fifo_out [3]))) # (!\state.001~q  & (word_out[26]))

        .dataa(word_out[26]),
        .datab(\state.001~q ),
        .datac(gnd),
        .datad(\datafifowrite|custom_fifo_dp5|fifo_out [3]),
        .cin(gnd),
        .combout(\word_out~4_combout ),
        .cout());
// synopsys translate_off
defparam \word_out~4 .lut_mask = 16'hEE22;
defparam \word_out~4 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X31_Y4_N19
dffeas \word_out[27] (
        .clk(\wb_clk_i~inputclkctrl_outclk ),
        .d(\word_out~4_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\bitCountReg[3]~7_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(word_out[27]),
        .prn(vcc));
// synopsys translate_off
defparam \word_out[27] .is_wysiwyg = "true";
defparam \word_out[27] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X30_Y4_N24
cycloneiv_lcell_comb \word_out~3 (
// Equation(s):
// \word_out~3_combout  = (\state.001~q  & (\datafifowrite|custom_fifo_dp5|fifo_out [4])) # (!\state.001~q  & ((word_out[27])))

        .dataa(gnd),
        .datab(\state.001~q ),
        .datac(\datafifowrite|custom_fifo_dp5|fifo_out [4]),
        .datad(word_out[27]),
        .cin(gnd),
        .combout(\word_out~3_combout ),
        .cout());
// synopsys translate_off
defparam \word_out~3 .lut_mask = 16'hF3C0;
defparam \word_out~3 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X30_Y4_N25
dffeas \word_out[28] (
        .clk(\wb_clk_i~inputclkctrl_outclk ),
        .d(\word_out~3_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\bitCountReg[3]~7_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(word_out[28]),
        .prn(vcc));
// synopsys translate_off
defparam \word_out[28] .is_wysiwyg = "true";
defparam \word_out[28] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X31_Y4_N0
cycloneiv_lcell_comb \word_out~2 (
// Equation(s):
// \word_out~2_combout  = (\state.001~q  & (\datafifowrite|custom_fifo_dp5|fifo_out [5])) # (!\state.001~q  & ((word_out[28])))

        .dataa(gnd),
        .datab(\state.001~q ),
        .datac(\datafifowrite|custom_fifo_dp5|fifo_out [5]),
        .datad(word_out[28]),
        .cin(gnd),
        .combout(\word_out~2_combout ),
        .cout());
// synopsys translate_off
defparam \word_out~2 .lut_mask = 16'hF3C0;
defparam \word_out~2 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X31_Y4_N1
dffeas \word_out[29] (
        .clk(\wb_clk_i~inputclkctrl_outclk ),
        .d(\word_out~2_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\bitCountReg[3]~7_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(word_out[29]),
        .prn(vcc));
// synopsys translate_off
defparam \word_out[29] .is_wysiwyg = "true";
defparam \word_out[29] .power_up = "low";
// synopsys translate_on

// Location: FF_X30_Y3_N9
dffeas \datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[6] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[30]~input_o ),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [1]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg [6]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[6] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[6] .power_up = "low";
// synopsys translate_on

// Location: FF_X30_Y3_N11
dffeas \datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[6] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[30]~input_o ),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [2]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg [6]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[6] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[6] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X30_Y4_N20
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp5|mem_byte_out[6]~1 (
// Equation(s):
// \datafifowrite|custom_fifo_dp5|mem_byte_out[6]~1_combout  = (\datafifowrite|custom_fifo_dp5|addr_rd [1] & (\datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg [6])) # (!\datafifowrite|custom_fifo_dp5|addr_rd [1] & 
// ((\datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg [6])))

        .dataa(\datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg [6]),
        .datab(\datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg [6]),
        .datac(gnd),
        .datad(\datafifowrite|custom_fifo_dp5|addr_rd [1]),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp5|mem_byte_out[6]~1_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|mem_byte_out[6]~1 .lut_mask = 16'hAACC;
defparam \datafifowrite|custom_fifo_dp5|mem_byte_out[6]~1 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X29_Y4_N1
dffeas \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[6] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(gnd),
        .asdata(\wb_dat_i[30]~input_o ),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(vcc),
        .ena(!\datafifowrite|custom_fifo_dp5|addr_wr [0]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg [6]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[6] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[6] .power_up = "low";
// synopsys translate_on

// Location: FF_X30_Y4_N21
dffeas \datafifowrite|custom_fifo_dp5|fifo_out[6] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp5|mem_byte_out[6]~1_combout ),
        .asdata(\datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg [6]),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(!\datafifowrite|custom_fifo_dp5|addr_rd [0]),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp5|fifo_out [6]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|fifo_out[6] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp5|fifo_out[6] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X30_Y4_N2
cycloneiv_lcell_comb \word_out~1 (
// Equation(s):
// \word_out~1_combout  = (\state.001~q  & ((\datafifowrite|custom_fifo_dp5|fifo_out [6]))) # (!\state.001~q  & (word_out[29]))

        .dataa(gnd),
        .datab(\state.001~q ),
        .datac(word_out[29]),
        .datad(\datafifowrite|custom_fifo_dp5|fifo_out [6]),
        .cin(gnd),
        .combout(\word_out~1_combout ),
        .cout());
// synopsys translate_off
defparam \word_out~1 .lut_mask = 16'hFC30;
defparam \word_out~1 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X30_Y4_N3
dffeas \word_out[30] (
        .clk(\wb_clk_i~inputclkctrl_outclk ),
        .d(\word_out~1_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\bitCountReg[3]~7_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(word_out[30]),
        .prn(vcc));
// synopsys translate_off
defparam \word_out[30] .is_wysiwyg = "true";
defparam \word_out[30] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X32_Y4_N2
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[7]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[7]~feeder_combout  = \wb_dat_i[31]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[31]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[7]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[7]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[7]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X32_Y4_N3
dffeas \datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[7] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[7]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [2]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg [7]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[7] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg[7] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X32_Y4_N24
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[7]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[7]~feeder_combout  = \wb_dat_i[31]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[31]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[7]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[7]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[7]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X32_Y4_N25
dffeas \datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[7] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[7]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\datafifowrite|custom_fifo_dp5|addr_wr [1]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg [7]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[7] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg[7] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X31_Y4_N28
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp5|mem_byte_out[7]~0 (
// Equation(s):
// \datafifowrite|custom_fifo_dp5|mem_byte_out[7]~0_combout  = (\datafifowrite|custom_fifo_dp5|addr_rd [1] & ((\datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg [7]))) # (!\datafifowrite|custom_fifo_dp5|addr_rd [1] & 
// (\datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg [7]))

        .dataa(\datafifowrite|custom_fifo_dp5|mem[2].mem_byte|byte_reg [7]),
        .datab(\datafifowrite|custom_fifo_dp5|mem[1].mem_byte|byte_reg [7]),
        .datac(gnd),
        .datad(\datafifowrite|custom_fifo_dp5|addr_rd [1]),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp5|mem_byte_out[7]~0_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|mem_byte_out[7]~0 .lut_mask = 16'hCCAA;
defparam \datafifowrite|custom_fifo_dp5|mem_byte_out[7]~0 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X34_Y4_N10
cycloneiv_lcell_comb \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[7]~feeder (
// Equation(s):
// \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[7]~feeder_combout  = \wb_dat_i[31]~input_o 

        .dataa(gnd),
        .datab(gnd),
        .datac(gnd),
        .datad(\wb_dat_i[31]~input_o ),
        .cin(gnd),
        .combout(\datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[7]~feeder_combout ),
        .cout());
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[7]~feeder .lut_mask = 16'hFF00;
defparam \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[7]~feeder .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X34_Y4_N11
dffeas \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[7] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[7]~feeder_combout ),
        .asdata(vcc),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(!\datafifowrite|custom_fifo_dp5|addr_wr [0]),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg [7]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[7] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg[7] .power_up = "low";
// synopsys translate_on

// Location: FF_X31_Y4_N29
dffeas \datafifowrite|custom_fifo_dp5|fifo_out[7] (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\datafifowrite|custom_fifo_dp5|mem_byte_out[7]~0_combout ),
        .asdata(\datafifowrite|custom_fifo_dp5|mem[0].mem_byte|byte_reg [7]),
        .clrn(!\comb~0clkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(!\datafifowrite|custom_fifo_dp5|addr_rd [0]),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\datafifowrite|custom_fifo_dp5|fifo_out [7]),
        .prn(vcc));
// synopsys translate_off
defparam \datafifowrite|custom_fifo_dp5|fifo_out[7] .is_wysiwyg = "true";
defparam \datafifowrite|custom_fifo_dp5|fifo_out[7] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X31_Y4_N26
cycloneiv_lcell_comb \word_out~0 (
// Equation(s):
// \word_out~0_combout  = (\state.001~q  & ((\datafifowrite|custom_fifo_dp5|fifo_out [7]))) # (!\state.001~q  & (word_out[30]))

        .dataa(word_out[30]),
        .datab(\state.001~q ),
        .datac(gnd),
        .datad(\datafifowrite|custom_fifo_dp5|fifo_out [7]),
        .cin(gnd),
        .combout(\word_out~0_combout ),
        .cout());
// synopsys translate_off
defparam \word_out~0 .lut_mask = 16'hEE22;
defparam \word_out~0 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X31_Y4_N27
dffeas \word_out[31] (
        .clk(\wb_clk_i~inputclkctrl_outclk ),
        .d(\word_out~0_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(\bitCountReg[3]~7_combout ),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(word_out[31]),
        .prn(vcc));
// synopsys translate_off
defparam \word_out[31] .is_wysiwyg = "true";
defparam \word_out[31] .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X30_Y4_N26
cycloneiv_lcell_comb \one_o~0 (
// Equation(s):
// \one_o~0_combout  = (\state.111~q  & ((word_out[31]) # ((\one_o~reg0_q )))) # (!\state.111~q  & (\state.100~q  & ((word_out[31]) # (\one_o~reg0_q ))))

        .dataa(\state.111~q ),
        .datab(word_out[31]),
        .datac(\one_o~reg0_q ),
        .datad(\state.100~q ),
        .cin(gnd),
        .combout(\one_o~0_combout ),
        .cout());
// synopsys translate_off
defparam \one_o~0 .lut_mask = 16'hFCA8;
defparam \one_o~0 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X30_Y4_N27
dffeas \one_o~reg0 (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\one_o~0_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\one_o~reg0_q ),
        .prn(vcc));
// synopsys translate_off
defparam \one_o~reg0 .is_wysiwyg = "true";
defparam \one_o~reg0 .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X30_Y4_N8
cycloneiv_lcell_comb \zero_o~0 (
// Equation(s):
// \zero_o~0_combout  = (\state.111~q  & (((\zero_o~reg0_q )) # (!word_out[31]))) # (!\state.111~q  & (\state.100~q  & ((\zero_o~reg0_q ) # (!word_out[31]))))

        .dataa(\state.111~q ),
        .datab(word_out[31]),
        .datac(\zero_o~reg0_q ),
        .datad(\state.100~q ),
        .cin(gnd),
        .combout(\zero_o~0_combout ),
        .cout());
// synopsys translate_off
defparam \zero_o~0 .lut_mask = 16'hF3A2;
defparam \zero_o~0 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X30_Y4_N9
dffeas \zero_o~reg0 (
        .clk(!\wb_clk_i~inputclkctrl_outclk ),
        .d(\zero_o~0_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\zero_o~reg0_q ),
        .prn(vcc));
// synopsys translate_off
defparam \zero_o~reg0 .is_wysiwyg = "true";
defparam \zero_o~reg0 .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X31_Y3_N10
cycloneiv_lcell_comb \wb_interface|err_int (
// Equation(s):
// \wb_interface|err_int~combout  = (\wb_we_i~input_o  & (\full_dly~q  & (!\wb_adr_i[0]~input_o  & \wb_interface|wb_dat_o~1_combout )))

        .dataa(\wb_we_i~input_o ),
        .datab(\full_dly~q ),
        .datac(\wb_adr_i[0]~input_o ),
        .datad(\wb_interface|wb_dat_o~1_combout ),
        .cin(gnd),
        .combout(\wb_interface|err_int~combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|err_int .lut_mask = 16'h0800;
defparam \wb_interface|err_int .sum_lutc_input = "datac";
// synopsys translate_on

// Location: LCCOMB_X31_Y3_N6
cycloneiv_lcell_comb \wb_interface|ack~0 (
// Equation(s):
// \wb_interface|ack~0_combout  = (\wb_interface|Equal2~0_combout  & (!\wb_interface|err_int~combout  & (!\lock_cfg~q  & \wb_interface|wb_dat_o~1_combout )))

        .dataa(\wb_interface|Equal2~0_combout ),
        .datab(\wb_interface|err_int~combout ),
        .datac(\lock_cfg~q ),
        .datad(\wb_interface|wb_dat_o~1_combout ),
        .cin(gnd),
        .combout(\wb_interface|ack~0_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|ack~0 .lut_mask = 16'h0200;
defparam \wb_interface|ack~0 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X31_Y3_N7
dffeas \wb_interface|ack (
        .clk(\wb_clk_i~inputclkctrl_outclk ),
        .d(\wb_interface|ack~0_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|ack~q ),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|ack .is_wysiwyg = "true";
defparam \wb_interface|ack .power_up = "low";
// synopsys translate_on

// Location: FF_X31_Y3_N11
dffeas \wb_interface|err (
        .clk(\wb_clk_i~inputclkctrl_outclk ),
        .d(\wb_interface|err_int~combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|err~q ),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|err .is_wysiwyg = "true";
defparam \wb_interface|err .power_up = "low";
// synopsys translate_on

// Location: LCCOMB_X31_Y3_N30
cycloneiv_lcell_comb \wb_interface|rty_int~0 (
// Equation(s):
// \wb_interface|rty_int~0_combout  = (\wb_we_i~input_o  & (\wb_interface|wb_dat_o~1_combout  & (\lock_cfg~q  & \wb_interface|Equal2~0_combout )))

        .dataa(\wb_we_i~input_o ),
        .datab(\wb_interface|wb_dat_o~1_combout ),
        .datac(\lock_cfg~q ),
        .datad(\wb_interface|Equal2~0_combout ),
        .cin(gnd),
        .combout(\wb_interface|rty_int~0_combout ),
        .cout());
// synopsys translate_off
defparam \wb_interface|rty_int~0 .lut_mask = 16'h8000;
defparam \wb_interface|rty_int~0 .sum_lutc_input = "datac";
// synopsys translate_on

// Location: FF_X31_Y3_N31
dffeas \wb_interface|rty (
        .clk(\wb_clk_i~inputclkctrl_outclk ),
        .d(\wb_interface|rty_int~0_combout ),
        .asdata(vcc),
        .clrn(!\wb_rst_i~inputclkctrl_outclk ),
        .aload(gnd),
        .sclr(gnd),
        .sload(gnd),
        .ena(vcc),
        .devclrn(devclrn),
        .devpor(devpor),
        .q(\wb_interface|rty~q ),
        .prn(vcc));
// synopsys translate_off
defparam \wb_interface|rty .is_wysiwyg = "true";
defparam \wb_interface|rty .power_up = "low";
// synopsys translate_on

// Location: IOIBUF_X27_Y0_N8
cycloneiv_io_ibuf \wb_cti_i[0]~input (
        .i(wb_cti_i[0]),
        .ibar(gnd),
        .o(\wb_cti_i[0]~input_o ));
// synopsys translate_off
defparam \wb_cti_i[0]~input .bus_hold = "false";
defparam \wb_cti_i[0]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: IOIBUF_X27_Y0_N1
cycloneiv_io_ibuf \wb_cti_i[1]~input (
        .i(wb_cti_i[1]),
        .ibar(gnd),
        .o(\wb_cti_i[1]~input_o ));
// synopsys translate_off
defparam \wb_cti_i[1]~input .bus_hold = "false";
defparam \wb_cti_i[1]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: IOIBUF_X46_Y41_N15
cycloneiv_io_ibuf \wb_cti_i[2]~input (
        .i(wb_cti_i[2]),
        .ibar(gnd),
        .o(\wb_cti_i[2]~input_o ));
// synopsys translate_off
defparam \wb_cti_i[2]~input .bus_hold = "false";
defparam \wb_cti_i[2]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: IOIBUF_X18_Y41_N8
cycloneiv_io_ibuf \wb_sel_i[0]~input (
        .i(wb_sel_i[0]),
        .ibar(gnd),
        .o(\wb_sel_i[0]~input_o ));
// synopsys translate_off
defparam \wb_sel_i[0]~input .bus_hold = "false";
defparam \wb_sel_i[0]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: IOIBUF_X52_Y32_N8
cycloneiv_io_ibuf \wb_sel_i[1]~input (
        .i(wb_sel_i[1]),
        .ibar(gnd),
        .o(\wb_sel_i[1]~input_o ));
// synopsys translate_off
defparam \wb_sel_i[1]~input .bus_hold = "false";
defparam \wb_sel_i[1]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: IOIBUF_X50_Y41_N1
cycloneiv_io_ibuf \wb_sel_i[2]~input (
        .i(wb_sel_i[2]),
        .ibar(gnd),
        .o(\wb_sel_i[2]~input_o ));
// synopsys translate_off
defparam \wb_sel_i[2]~input .bus_hold = "false";
defparam \wb_sel_i[2]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: IOIBUF_X52_Y25_N8
cycloneiv_io_ibuf \wb_sel_i[3]~input (
        .i(wb_sel_i[3]),
        .ibar(gnd),
        .o(\wb_sel_i[3]~input_o ));
// synopsys translate_off
defparam \wb_sel_i[3]~input .bus_hold = "false";
defparam \wb_sel_i[3]~input .simulate_z_as = "z";
// synopsys translate_on

assign one_o = \one_o~output_o ;

assign zero_o = \zero_o~output_o ;

assign wb_dat_o[0] = \wb_dat_o[0]~output_o ;

assign wb_dat_o[1] = \wb_dat_o[1]~output_o ;

assign wb_dat_o[2] = \wb_dat_o[2]~output_o ;

assign wb_dat_o[3] = \wb_dat_o[3]~output_o ;

assign wb_dat_o[4] = \wb_dat_o[4]~output_o ;

assign wb_dat_o[5] = \wb_dat_o[5]~output_o ;

assign wb_dat_o[6] = \wb_dat_o[6]~output_o ;

assign wb_dat_o[7] = \wb_dat_o[7]~output_o ;

assign wb_dat_o[8] = \wb_dat_o[8]~output_o ;

assign wb_dat_o[9] = \wb_dat_o[9]~output_o ;

assign wb_dat_o[10] = \wb_dat_o[10]~output_o ;

assign wb_dat_o[11] = \wb_dat_o[11]~output_o ;

assign wb_dat_o[12] = \wb_dat_o[12]~output_o ;

assign wb_dat_o[13] = \wb_dat_o[13]~output_o ;

assign wb_dat_o[14] = \wb_dat_o[14]~output_o ;

assign wb_dat_o[15] = \wb_dat_o[15]~output_o ;

assign wb_dat_o[16] = \wb_dat_o[16]~output_o ;

assign wb_dat_o[17] = \wb_dat_o[17]~output_o ;

assign wb_dat_o[18] = \wb_dat_o[18]~output_o ;

assign wb_dat_o[19] = \wb_dat_o[19]~output_o ;

assign wb_dat_o[20] = \wb_dat_o[20]~output_o ;

assign wb_dat_o[21] = \wb_dat_o[21]~output_o ;

assign wb_dat_o[22] = \wb_dat_o[22]~output_o ;

assign wb_dat_o[23] = \wb_dat_o[23]~output_o ;

assign wb_dat_o[24] = \wb_dat_o[24]~output_o ;

assign wb_dat_o[25] = \wb_dat_o[25]~output_o ;

assign wb_dat_o[26] = \wb_dat_o[26]~output_o ;

assign wb_dat_o[27] = \wb_dat_o[27]~output_o ;

assign wb_dat_o[28] = \wb_dat_o[28]~output_o ;

assign wb_dat_o[29] = \wb_dat_o[29]~output_o ;

assign wb_dat_o[30] = \wb_dat_o[30]~output_o ;

assign wb_dat_o[31] = \wb_dat_o[31]~output_o ;

assign wb_ack_o = \wb_ack_o~output_o ;

assign wb_err_o = \wb_err_o~output_o ;

assign wb_rty_o = \wb_rty_o~output_o ;

endmodule