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[/] [wiegand_ctl/] [trunk/] [syn/] [xilinx/] [wiegand_tx/] [ise/] [wiegand_tx_top/] [wiegand_tx_top.twx] - Rev 17

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<?xml version="1.0" encoding="UTF-8"?>
<!DOCTYPE twReport [
<!ELEMENT twReport (twHead?, (twWarn | twDebug | twInfo)*, twBody, twSum?,
                                        twDebug*, twFoot?, twClientInfo?)>
<!ATTLIST twReport version CDATA "10,4">
<!ELEMENT twHead (twExecVer?, twCopyright, twCmdLine?, twDesign?, twPCF?, twDevInfo, twRptInfo, twEnvVar*)>
<!ELEMENT twExecVer (#PCDATA)>
<!ELEMENT twCopyright (#PCDATA)>
<!ELEMENT twCmdLine (#PCDATA)>
<!ELEMENT twDesign (#PCDATA)>
<!ELEMENT twPCF (#PCDATA)>
<!ELEMENT twDevInfo (twDevName, twSpeedGrade, twSpeedVer?)>
<!ELEMENT twDevName (#PCDATA)>
<!ATTLIST twDevInfo arch CDATA #IMPLIED pkg CDATA #IMPLIED>
<!ELEMENT twSpeedGrade (#PCDATA)>
<!ELEMENT twSpeedVer (#PCDATA)>
<!ELEMENT twRptInfo (twItemLimit?, (twUnconst, twUnconstLimit?)?)>
<!ATTLIST twRptInfo twRptLvl (twErr | twVerbose | twTerseErr | twSum | twTimeGrp) #REQUIRED>
<!ATTLIST twRptInfo twAdvRpt  (TRUE | FALSE) "FALSE">
<!ATTLIST twRptInfo twTimeUnits (twPsec | twNsec | twUsec | twMsec | twSec) "twNsec">
<!ATTLIST twRptInfo twFreqUnits (twGHz | twMHz | twHz) "twMHz">
<!ATTLIST twRptInfo twReportMinPaths CDATA #IMPLIED>
<!ELEMENT twItemLimit (#PCDATA)>
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<!ELEMENT twUnconstLimit (#PCDATA)>
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<!ELEMENT twInfo (#PCDATA)>
<!ELEMENT twDebug (#PCDATA)>
<!ELEMENT twBody (twDerating?, (twSumRpt | twVerboseRpt | twErrRpt | twTerseErrRpt | twTimeGrpRpt), twNonDedClks?)>
<!ATTLIST twBody twFastPaths CDATA #IMPLIED>
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<!ELEMENT twSumRpt (twConstRollupTable*, twConstList?, twConstSummaryTable?, twUnmetConstCnt?, (twWarn | twInfo | twDebug)*, twDataSheet?)>
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<!ELEMENT twTerseErrRpt (twConstList, twUnmetConstCnt?, twDataSheet?)>
<!ELEMENT twVerboseRpt (twCycles?, (twConst | twTIG | twConstRollupTable)*, twUnmetConstCnt?, (twWarn | twInfo | twDebug)*, twDataSheet?, twTimeGrp*)> 
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<!ELEMENT twDriver (#PCDATA)>
<!ELEMENT twLoad (#PCDATA)> 
<!ELEMENT twConst (twConstHead, ((twPathRpt?,twRacePathRpt?, twPathRptBanner?)* |  (twPathRpt*, twRacePathRpt?) |  twNetRpt* | twClkSkewLimit*))>
<!ATTLIST twConst twConstType (NET | 
                                                           NETDELAY | 
                                                           NETSKEW | 
                                                           PATH |
                                                           DEFPERIOD |
                                                           UNCONSTPATH |
                                                           DEFPATH | 
                                                           PATH2SETUP |
                                                           UNCONSTPATH2SETUP | 
                                                           PATHCLASS | 
                                                           PATHDELAY | 
                                                           PERIOD |
                                                           FREQUENCY |
                                                           PATHBLOCK |
                                                           OFFSET |
                                                           OFFSETIN |
                                                           OFFSETINCLOCK | 
                                                           UNCONSTOFFSETINCLOCK |
                                                           OFFSETINDELAY |
                                                           OFFSETINMOD |
                                                           OFFSETOUT |
                                                           OFFSETOUTCLOCK |
                                                           UNCONSTOFFSETOUTCLOCK | 
                                                           OFFSETOUTDELAY |
                                                           OFFSETOUTMOD| CLOCK_SKEW_LIMITS) #IMPLIED> 
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                                           twPathErrCnt?, (twMinPer| twMaxDel| twMaxFreq| twMaxNetDel| twMaxNetSkew| twMinOff| twMaxOff)*)>
<!ELEMENT twConstName (#PCDATA)>
<!ATTLIST twConstName UCFConstName CDATA #IMPLIED>
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<!ELEMENT twErrCnt (#PCDATA)>
<!ELEMENT twErrCntEndPt (#PCDATA)>
<!ELEMENT twErrCntSetup (#PCDATA)>
<!ELEMENT twErrCntHold (#PCDATA)>
<!ATTLIST twErrCntHold twRaceChecked (TRUE | FALSE) "FALSE">
<!ELEMENT twEndPtCnt (#PCDATA)>
<!ELEMENT twPathErrCnt (#PCDATA)>
<!ELEMENT twMinPer (#PCDATA) >
<!ELEMENT twFootnote EMPTY>
<!ATTLIST twFootnote number CDATA #REQUIRED>
<!ELEMENT twMaxDel (#PCDATA)>
<!ELEMENT twMaxFreq (#PCDATA)>
<!ELEMENT twMinOff (#PCDATA)>
<!ELEMENT twMaxOff (#PCDATA)>
<!ELEMENT twTIG (twTIGHead, (twPathRpt*,twRacePathRpt?))>
<!ELEMENT twTIGHead (twTIGName, twInstantiated, twBlocked)>
<!ELEMENT twTIGName (#PCDATA)>
<!ELEMENT twInstantiated (#PCDATA)>
<!ELEMENT twBlocked (#PCDATA)>
<!ELEMENT twRacePathRpt (twRacePath+)>
<!ELEMENT twPathRpt (twUnconstPath | twConstPath | twUnconstOffIn | twConstOffIn | twUnconstOffOut | twConstOffOut | twModOffOut)>
<!ELEMENT twUnconstPath (twTotDel, twSrc, twDest,  (twDel, twSUTime)?, twTotPathDel?, twClkSkew?, tw2Phase?, twClkUncert?, twDetPath?)>
<!ATTLIST twUnconstPath twDataPathType CDATA #IMPLIED
                                                twSimpleMinPath CDATA #IMPLIED>
<!ELEMENT twTotDel (#PCDATA)>
<!ELEMENT twSrc (#PCDATA)>
<!ATTLIST twSrc BELType CDATA #IMPLIED>
<!ELEMENT twDest (#PCDATA)>
<!ATTLIST twDest BELType CDATA #IMPLIED>
<!ELEMENT twDel (#PCDATA)>
<!ELEMENT twSUTime (#PCDATA)>
<!ELEMENT twTotPathDel (#PCDATA)>
<!ELEMENT twClkSkew (#PCDATA)>
<!ATTLIST twClkSkew dest CDATA #IMPLIED src CDATA #IMPLIED>
<!ELEMENT twConstPath (twSlack, twSrc, twDest, twTotPathDel?, twClkSkew?, twDelConst, tw2Phase?, twClkUncert?, twDetPath?)>
<!ATTLIST twConstPath twDataPathType CDATA "twDataPathMaxDelay">
<!ATTLIST twConstPath constType (period | fromto | unknown) "unknown">
<!ELEMENT twSlack (#PCDATA)>
<!ELEMENT twDelConst (#PCDATA)>
<!ELEMENT tw2Phase EMPTY>
<!ELEMENT twClkUncert (#PCDATA)>
<!ATTLIST twClkUncert fSysJit CDATA #IMPLIED  fInputJit CDATA #IMPLIED
                                          fDCMJit CDATA #IMPLIED
                                          fPhaseErr CDATA #IMPLIED
                                          sEqu CDATA #IMPLIED>
<!ELEMENT twRacePath (twSlack, twSrc, twDest, twClkSkew, twDelConst?, twClkUncert?, twDetPath)>
<!ELEMENT twPathRptBanner (#PCDATA)>
<!ATTLIST twPathRptBanner sType CDATA #IMPLIED iPaths CDATA #IMPLIED iCriticalPaths CDATA #IMPLIED>
<!ELEMENT twUnconstOffIn (twOff, twSrc, twDest, twGuaranteed?, twClkUncert?, (twDataPath, twClkPath)?)>
<!ATTLIST twUnconstOffIn twDataPathType CDATA #IMPLIED>
<!ELEMENT twOff (#PCDATA)>
<!ELEMENT twGuaranteed EMPTY>
<!ELEMENT twConstOffIn (twSlack, twSrc, twDest, ((twClkDel, twClkSrc, twClkDest) | twGuarInSetup), twOff, twOffSrc, twOffDest, twClkUncert?, (twDataPath, twClkPath)?)>
<!ATTLIST twConstOffIn twDataPathType CDATA "twDataPathMaxDelay">
<!ATTLIST twConstOffIn twDurationNotSpecified CDATA #IMPLIED>
<!ELEMENT twClkDel (#PCDATA)>
<!ELEMENT twClkSrc (#PCDATA)>
<!ELEMENT twClkDest (#PCDATA)>
<!ELEMENT twGuarInSetup (#PCDATA)>
<!ELEMENT twOffSrc (#PCDATA)>
<!ELEMENT twOffDest (#PCDATA)>
<!ELEMENT twUnconstOffOut (twOff, twSrc, twDest, twClkUncert?, (twClkPath, twDataPath)?)>
<!ATTLIST twUnconstOffOut twDataPathType CDATA #IMPLIED>
<!ELEMENT twConstOffOut (twSlack, twSrc, twDest, twClkDel, twClkSrc, twClkDest, twDataDel, twDataSrc, twDataDest, twOff, twOffSrc, twOffDest, twClkUncert?, (twClkPath, twDataPath)?)>
<!ATTLIST twConstOffOut twDataPathType CDATA "twDataPathMaxDelay">
<!ELEMENT twDataDel (#PCDATA)>
<!ELEMENT twDataSrc (#PCDATA)>
<!ELEMENT twDataDest (#PCDATA)>
<!ELEMENT twModOffOut (twSlack, twDest, twDataDel, twDataSrc, twDataDest, twClkUncert?, twDataPath?)>
<!ELEMENT twDetPath (twSrc, twDest, twLogLvls, twSrcSite, twSrcClk?, twPathDel*, (twLogDel, twRouteDel, twTotDel)?, twDestClk?, (twPctLog, twPctRoute)?)>
<!ATTLIST twDetPath maxSiteLen CDATA #IMPLIED>
<!ELEMENT twDataPath (twSrc, twDest, twLogLvls, twSrcSite, twSrcClk?, twPathDel*, (twLogDel, twRouteDel, twTotDel)?, twDestClk?, (twPctLog, twPctRoute)?)>
<!ATTLIST twDataPath maxSiteLen CDATA #IMPLIED>
<!ELEMENT twClkPath (twSrc, twDest, twLogLvls, twSrcSite, twSrcClk?, twPathDel*, (twLogDel, twRouteDel, twTotDel)?, twDestClk?, (twPctLog, twPctRoute)?)>
<!ATTLIST twClkPath maxSiteLen CDATA #IMPLIED>
<!ELEMENT twLogLvls (#PCDATA)>
<!ELEMENT twSrcSite (#PCDATA)>
<!ELEMENT twSrcClk (#PCDATA)>
<!ATTLIST twSrcClk twEdge (twRising | twFalling) "twRising">
<!ATTLIST twSrcClk twArriveTime CDATA #IMPLIED>
<!ATTLIST twSrcClk twClkRes CDATA #IMPLIED>
<!ELEMENT twPathDel (twSite, twDelType, twFanCnt?, twDelInfo?, twComp, twNet?, twBEL*)>
<!ATTLIST twPathDel twHoldTime (TRUE | FALSE) "FALSE">
<!ELEMENT twDelInfo (#PCDATA)>
<!ATTLIST twDelInfo twEdge (twRising | twFalling | twIndet) #REQUIRED>
<!ATTLIST twDelInfo twAcc (twRouted | twEst | twApprox) "twRouted">
<!ELEMENT twSite (#PCDATA)>
<!ELEMENT twDelType (#PCDATA)>
<!ELEMENT twFanCnt (#PCDATA)>
<!ELEMENT twComp (#PCDATA)>
<!ELEMENT twNet (#PCDATA)>
<!ELEMENT twBEL (#PCDATA)>
<!ELEMENT twLogDel (#PCDATA)>
<!ELEMENT twRouteDel (#PCDATA)>
<!ELEMENT twDestClk (#PCDATA)>
<!ATTLIST twDestClk twEdge (twRising | twFalling) "twRising">
<!ATTLIST twDestClk twArriveTime CDATA #IMPLIED>
<!ATTLIST twDestClk twClkRes CDATA #IMPLIED>
<!ELEMENT twPctLog (#PCDATA)>
<!ELEMENT twPctRoute (#PCDATA)>
<!ELEMENT twNetRpt (twDelNet | twSlackNet | twSkewNet)>
<!ELEMENT twDelNet (twDel, twNet, twDetNet?)>
<!ELEMENT twSlackNet (twSlack, twNet, twDel, twNotMet?, twTimeConst, twAbsSlack, twDetNet?)>
<!ELEMENT twTimeConst (#PCDATA)>
<!ELEMENT twAbsSlack (#PCDATA)>
<!ELEMENT twSkewNet (twSlack, twNet, twSkew, twNotMet?, twTimeConst, twAbsSlack, twDetSkewNet?)>
<!ELEMENT twSkew (#PCDATA)>
<!ELEMENT twDetNet (twNetDel*)>
<!ELEMENT twNetDel (twSrc, twDest, twNetDelInfo)>
<!ELEMENT twNetDelInfo (#PCDATA)>
<!ATTLIST twNetDelInfo twAcc (twRouted | twEst | twApprox) "twRouted">
<!ELEMENT twDetSkewNet (twNetSkew*)>
<!ELEMENT twNetSkew (twSrc, twDest, twNetDelInfo, twSkew)>
<!ELEMENT twClkSkewLimit  EMPTY>
<!ATTLIST twClkSkewLimit slack CDATA #IMPLIED skew CDATA #IMPLIED arrv1name CDATA #IMPLIED                      arrv1 CDATA #IMPLIED
                         arrv2name CDATA #IMPLIED arrv2 CDATA #IMPLIED uncert CDATA #IMPLIED>
<!ELEMENT twConstRollupTable (twConstRollup*)>
<!ATTLIST twConstRollupTable uID CDATA #IMPLIED>
<!ELEMENT twConstRollup  EMPTY>
<!ATTLIST twConstRollup name CDATA #IMPLIED fullName CDATA #IMPLIED type CDATA #IMPLIED                      requirement CDATA #IMPLIED prefType CDATA #IMPLIED actual CDATA #IMPLIED>
<!ATTLIST twConstRollup  actualRollup CDATA #IMPLIED                      errors CDATA #IMPLIED errorRollup CDATA #IMPLIED items CDATA #IMPLIED                      itemsRollup CDATA #IMPLIED>
<!ELEMENT twConstList (twConstListItem)*>
<!ELEMENT twConstListItem (twConstName, twNotMet?, twReqVal?, twActVal?, twLogLvls?)> 
<!ATTLIST twConstListItem twUnits (twTime | twFreq) "twTime">
<!ELEMENT twNotMet EMPTY>
<!ELEMENT twReqVal (#PCDATA)>
<!ELEMENT twActVal (#PCDATA)>
<!ELEMENT twConstSummaryTable (twConstStats|twConstSummary)*>
<!ATTLIST twConstSummaryTable twEmptyConstraints CDATA #IMPLIED>
<!ELEMENT twConstStats (twConstName)>
<!ATTLIST twConstStats twUnits (twTime | twFreq) "twTime">
<!ATTLIST twConstStats twRequired CDATA #IMPLIED>
<!ATTLIST twConstStats twActual CDATA #IMPLIED>
<!ATTLIST twConstStats twSlack CDATA #IMPLIED>
<!ATTLIST twConstStats twLogLvls CDATA #IMPLIED>
<!ATTLIST twConstStats twErrors CDATA #IMPLIED>
<!ATTLIST twConstStats twPCFIndex CDATA #IMPLIED>
<!ATTLIST twConstStats twAbsSlackIndex CDATA #IMPLIED>
<!ATTLIST twConstStats twTCType CDATA #IMPLIED>
<!ELEMENT twConstSummary (twConstName, twConstData?, twConstData*)>
<!ATTLIST twConstSummary PCFIndex CDATA #IMPLIED  slackIndex CDATA #IMPLIED>
<!ELEMENT twConstData EMPTY>
<!ATTLIST twConstData type CDATA #IMPLIED  units (MHz | ns) "ns" slack CDATA #IMPLIED
                                          best CDATA #IMPLIED requested CDATA #IMPLIED
                                          errors CDATA #IMPLIED
                                          score CDATA #IMPLIED>
<!ELEMENT twTimeGrpRpt (twTimeGrp)*>
<!ELEMENT twTimeGrp (twTimeGrpName, twCompList?, twBELList?, twMacList?, twBlockList?, twSigList?, twPinList?)>
<!ELEMENT twTimeGrpName (#PCDATA)>
<!ELEMENT twCompList (twCompName+)>
<!ELEMENT twCompName (#PCDATA)>
<!ELEMENT twSigList (twSigName+)>
<!ELEMENT twSigName (#PCDATA)>
<!ELEMENT twBELList (twBELName+)>
<!ELEMENT twBELName (#PCDATA)>
<!ELEMENT twBlockList (twBlockName+)>
<!ELEMENT twBlockName (#PCDATA)>
<!ELEMENT twMacList (twMacName+)>
<!ELEMENT twMacName (#PCDATA)>
<!ELEMENT twPinList (twPinName+)>
<!ELEMENT twPinName (#PCDATA)>
<!ELEMENT twUnmetConstCnt (#PCDATA)>
<!ELEMENT twDataSheet (twSUH2ClkList*, (twClk2PadList|twClk2OutList)*, twClk2SUList*, twPad2PadList?, twOffsetTables?)>
<!ATTLIST twDataSheet twNameLen CDATA #REQUIRED>
<!ELEMENT twSUH2ClkList (twDest, twSUH2Clk+)>
<!ATTLIST twSUH2ClkList twDestWidth CDATA #IMPLIED>
<!ATTLIST twSUH2ClkList twPhaseWidth CDATA #IMPLIED>
<!ELEMENT twSUH2Clk (twSrc, twSUHTime, twSUHTime?)> 
<!ELEMENT twSUHTime (twSU2ClkTime?,twH2ClkTime?)>
<!ATTLIST twSUHTime twInternalClk CDATA #IMPLIED>
<!ATTLIST twSUHTime twClkPhase CDATA #IMPLIED>
<!ELEMENT twSU2ClkTime (#PCDATA)>
<!ATTLIST twSU2ClkTime twEdge (twRising | twFalling | twIndet) #REQUIRED>
<!ELEMENT twH2ClkTime (#PCDATA)>
<!ATTLIST twH2ClkTime twEdge (twRising | twFalling | twIndet) #REQUIRED>
<!ELEMENT twClk2PadList (twSrc, twClk2Pad+)>
<!ELEMENT twClk2Pad (twDest, twTime)>
<!ELEMENT twTime (#PCDATA)>
<!ATTLIST twTime twEdge (twRising | twFalling | twIndet) #REQUIRED>
<!ELEMENT twClk2OutList (twSrc, twClk2Out+)>
<!ATTLIST twClk2OutList twDestWidth CDATA #REQUIRED>
<!ATTLIST twClk2OutList twPhaseWidth CDATA #REQUIRED>
<!ELEMENT twClk2Out EMPTY>
<!ATTLIST twClk2Out twOutPad CDATA #REQUIRED>
<!ATTLIST twClk2Out twMinTime CDATA #REQUIRED>
<!ATTLIST twClk2Out twMinEdge CDATA #REQUIRED>
<!ATTLIST twClk2Out twMaxTime CDATA #REQUIRED>
<!ATTLIST twClk2Out twMaxEdge CDATA #REQUIRED>
<!ATTLIST twClk2Out twInternalClk CDATA #REQUIRED>
<!ATTLIST twClk2Out twClkPhase CDATA #REQUIRED>
<!ELEMENT twClk2SUList (twDest, twClk2SU+)>
<!ATTLIST twClk2SUList twDestWidth CDATA #IMPLIED>
<!ELEMENT twClk2SU (twSrc, twRiseRise?, twFallRise?, twRiseFall?, twFallFall?)>
<!ELEMENT twRiseRise (#PCDATA)>
<!ELEMENT twFallRise (#PCDATA)>
<!ELEMENT twRiseFall (#PCDATA)>
<!ELEMENT twFallFall (#PCDATA)>
<!ELEMENT twPad2PadList (twPad2Pad+)>
<!ATTLIST twPad2PadList twSrcWidth CDATA #IMPLIED>
<!ATTLIST twPad2PadList twDestWidth CDATA #IMPLIED>
<!ELEMENT twPad2Pad (twSrc, twDest, twDel)>
<!ELEMENT twOffsetTables (twOffsetInTable*,twOffsetOutTable*)>
<!ELEMENT twOffsetInTable (twConstName, twOffInTblRow*)>
<!ATTLIST twOffsetInTable twDestWidth CDATA #IMPLIED>
<!ATTLIST twOffsetInTable twWorstWindow CDATA #IMPLIED>
<!ATTLIST twOffsetInTable twWorstSetup CDATA #IMPLIED>
<!ATTLIST twOffsetInTable twWorstHold CDATA #IMPLIED>
<!ATTLIST twOffsetInTable twWorstSetupSlack CDATA #IMPLIED>
<!ATTLIST twOffsetInTable twWorstHoldSlack CDATA #IMPLIED>
<!ELEMENT twOffsetOutTable (twConstName, twOffOutTblRow*)>
<!ATTLIST twOffsetOutTable twDestWidth CDATA #IMPLIED>
<!ATTLIST twOffsetOutTable twMinSlack CDATA #IMPLIED>
<!ATTLIST twOffsetOutTable twMaxSlack CDATA #IMPLIED>
<!ATTLIST twOffsetOutTable twRelSkew CDATA #IMPLIED>
<!ELEMENT twOffInTblRow (twSrc, twSUHSlackTime*)>       
<!ELEMENT twSUHSlackTime (twSU2ClkTime?,twH2ClkTime?)>
<!ATTLIST twSUHSlackTime twSetupSlack CDATA #IMPLIED  twHoldSlack CDATA #IMPLIED>
<!ELEMENT twOffOutTblRow EMPTY>
<!ATTLIST twOffOutTblRow twOutPad CDATA #IMPLIED>
<!ATTLIST twOffOutTblRow twSlack CDATA #IMPLIED>
<!ATTLIST twOffOutTblRow twRelSkew CDATA #IMPLIED>
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<!ELEMENT twNonDedClk (#PCDATA)>
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<!ELEMENT twScore (#PCDATA)>
<!ELEMENT twConstCov (twPathCnt, twNetCnt, twConnCnt, twPct?)>
<!ELEMENT twPathCnt (#PCDATA)>
<!ELEMENT twNetCnt (#PCDATA)>
<!ELEMENT twConnCnt (#PCDATA)>
<!ELEMENT twPct (#PCDATA)>
<!ELEMENT twStats ( twMinPer?, twFootnote?, twMaxFreq?, twMaxCombDel?, twMaxFromToDel?, twMaxNetDel?, twMaxNetSkew?, twMaxInAfterClk?, twMinInBeforeClk?, twMaxOutBeforeClk?, twMinOutAfterClk?, (twInfo | twWarn)*)>
<!ELEMENT twMaxCombDel (#PCDATA)>
<!ELEMENT twMaxFromToDel (#PCDATA)>
<!ELEMENT twMaxNetDel (#PCDATA)>
<!ELEMENT twMaxNetSkew (#PCDATA)>
<!ELEMENT twMaxInAfterClk (#PCDATA)>
<!ELEMENT twMinInBeforeClk (#PCDATA)>
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<!ELEMENT twMinOutAfterClk (#PCDATA)>
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<!ELEMENT twTimestamp (#PCDATA)>
<!ELEMENT twFootnoteExplanation EMPTY>
<!ATTLIST twFootnoteExplanation number CDATA #REQUIRED>
<!ATTLIST twFootnoteExplanation text CDATA #REQUIRED>
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<!ELEMENT twClientName (#PCDATA)>
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<!ELEMENT twName (#PCDATA)>
<!ELEMENT twValue (#PCDATA)>
]>
<twReport><twHead anchorID="1"><twExecVer>Release 14.7 Trace  (nt64)</twExecVer><twCopyright>Copyright (c) 1995-2013 Xilinx, Inc.  All rights reserved.</twCopyright><twCmdLine>C:\Xilinx\14.7\ISE_DS\ISE\bin\nt64\unwrapped\trce.exe -intstyle ise -v 3 -s 4
-n 3 -fastpaths -xml wiegand_tx_top.twx wiegand_tx_top.ncd -o
wiegand_tx_top.twr wiegand_tx_top.pcf -ucf wiegand_tx_top.ucf

</twCmdLine><twDesign>wiegand_tx_top.ncd</twDesign><twDesignPath>wiegand_tx_top.ncd</twDesignPath><twPCF>wiegand_tx_top.pcf</twPCF><twPcfPath>wiegand_tx_top.pcf</twPcfPath><twDevInfo arch="spartan3a" pkg="fgg484"><twDevName>xc3s700an</twDevName><twSpeedGrade>-4</twSpeedGrade><twSpeedVer>PRODUCTION 1.42 2013-10-13</twSpeedVer></twDevInfo><twRptInfo twRptLvl="twVerbose" twReportMinPaths="true"  dlyHyperLnks="t" ><twEndptLimit>3</twEndptLimit></twRptInfo><twEnvVar name="NONE" description="No environment variables were set" /></twHead><twInfo anchorID="2">INFO:Timing:3412 - To improve timing, see the Timing Closure User Guide (UG612).</twInfo><twInfo anchorID="3">INFO:Timing:2752 - To get complete path coverage, use the unconstrained paths option. All paths that are not constrained will be reported in the unconstrained paths section(s) of the report.</twInfo><twInfo anchorID="4">INFO:Timing:3339 - The clock-to-out numbers in this timing report are based on a 50 Ohm transmission line loading model.  For the details of this model, and for more information on accounting for different loading conditions, please see the device datasheet.</twInfo><twInfo anchorID="5">INFO:Timing:3390 - This architecture does not support a default System Jitter value, please add SYSTEM_JITTER constraint to the UCF to modify the Clock Uncertainty calculation.</twInfo><twInfo anchorID="6">INFO:Timing:3389 - This architecture does not support 'Discrete Jitter' and 'Phase Error' calculations, these terms will be zero in the Clock Uncertainty calculation.  Please make appropriate modification to SYSTEM_JITTER to account for the unsupported Discrete Jitter and Phase Error.</twInfo><twBody><twVerboseRpt><twConst anchorID="7" twConstType="PERIOD" ><twConstHead uID="1"><twConstName UCFConstName="TIMESPEC TS_wb_clk_i = PERIOD &quot;wb_clk_i&quot; 20 ns HIGH 50%;" ScopeName="">TS_wb_clk_i = PERIOD TIMEGRP &quot;wb_clk_i&quot; 20 ns HIGH 50%;</twConstName><twItemCnt>3668</twItemCnt><twErrCntSetup>0</twErrCntSetup><twErrCntEndPt>0</twErrCntEndPt><twErrCntHold twRaceChecked="TRUE">0</twErrCntHold><twErrCntPinLimit>0</twErrCntPinLimit><twEndPtCnt>850</twEndPtCnt><twPathErrCnt>0</twPathErrCnt><twMinPer>16.516</twMinPer></twConstHead><twPathRptBanner iPaths="47" iCriticalPaths="0" sType="EndPoint">Paths for end point state_FSM_FFd3 (SLICE_X10Y64.F4), 47 paths
</twPathRptBanner><twPathRpt anchorID="8"><twConstPath anchorID="9" twDataPathType="twDataPathMaxDelay" constType="period"><twSlack>1.742</twSlack><twSrc BELType="FF">wb_interface/p2p_1</twSrc><twDest BELType="FF">state_FSM_FFd3</twDest><twTotPathDel>8.106</twTotPathDel><twClkSkew dest = "0.403" src = "0.555">0.152</twClkSkew><twDelConst>10.000</twDelConst><tw2Phase></tw2Phase><twClkUncert fSysJit="0.000" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="">0.000</twClkUncert><twDetPath maxSiteLen="16"><twSrc BELType='FF'>wb_interface/p2p_1</twSrc><twDest BELType='FF'>state_FSM_FFd3</twDest><twLogLvls>10</twLogLvls><twSrcSite>SLICE_X3Y80.CLK</twSrcSite><twSrcClk twEdge ="twFalling" twArriveTime ="10.000">wb_clk_i_BUFGP</twSrcClk><twPathDel><twSite>SLICE_X3Y80.XQ</twSite><twDelType>Tcko</twDelType><twDelInfo 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twEdge="twRising">0.802</twDelInfo><twComp>state_FSM_FFd3</twComp><twBEL>state_FSM_FFd3-In87</twBEL><twBEL>state_FSM_FFd3</twBEL></twPathDel><twLogDel>4.205</twLogDel><twRouteDel>3.901</twRouteDel><twTotDel>8.106</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="20.000">wb_clk_i_BUFGP</twDestClk><twPctLog>51.9</twPctLog><twPctRoute>48.1</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRpt anchorID="10"><twConstPath anchorID="11" twDataPathType="twDataPathMaxDelay" constType="period"><twSlack>1.845</twSlack><twSrc BELType="FF">wb_interface/p2p_3</twSrc><twDest BELType="FF">state_FSM_FFd3</twDest><twTotPathDel>7.986</twTotPathDel><twClkSkew dest = "0.403" src = "0.572">0.169</twClkSkew><twDelConst>10.000</twDelConst><tw2Phase></tw2Phase><twClkUncert fSysJit="0.000" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="">0.000</twClkUncert><twDetPath maxSiteLen="16"><twSrc BELType='FF'>wb_interface/p2p_3</twSrc><twDest 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twEdge="twRising">0.060</twDelInfo><twComp>state_FSM_FFd3-In74/O</twComp></twPathDel><twPathDel><twSite>SLICE_X10Y64.CLK</twSite><twDelType>Tfck</twDelType><twDelInfo twEdge="twRising">0.802</twDelInfo><twComp>state_FSM_FFd3</twComp><twBEL>state_FSM_FFd3-In87</twBEL><twBEL>state_FSM_FFd3</twBEL></twPathDel><twLogDel>4.228</twLogDel><twRouteDel>3.758</twRouteDel><twTotDel>7.986</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="20.000">wb_clk_i_BUFGP</twDestClk><twPctLog>52.9</twPctLog><twPctRoute>47.1</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRpt anchorID="12"><twConstPath anchorID="13" twDataPathType="twDataPathMaxDelay" constType="period"><twSlack>1.918</twSlack><twSrc BELType="FF">wb_interface/p2p_5</twSrc><twDest BELType="FF">state_FSM_FFd3</twDest><twTotPathDel>7.917</twTotPathDel><twClkSkew dest = "0.403" src = "0.568">0.165</twClkSkew><twDelConst>10.000</twDelConst><tw2Phase></tw2Phase><twClkUncert fSysJit="0.000" fInputJit="0.000" fDCMJit="0.000" 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twEdge="twRising">0.000</twDelInfo><twComp>Mcompar_state_cmp_eq0001_cy&lt;5&gt;</twComp></twPathDel><twPathDel><twSite>SLICE_X3Y51.COUT</twSite><twDelType>Tbyp</twDelType><twDelInfo twEdge="twRising">0.130</twDelInfo><twComp>Mcompar_state_cmp_eq0001_cy&lt;7&gt;</twComp><twBEL>Mcompar_state_cmp_eq0001_cy&lt;6&gt;</twBEL><twBEL>Mcompar_state_cmp_eq0001_cy&lt;7&gt;</twBEL></twPathDel><twPathDel><twSite>SLICE_X3Y52.CIN</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.000</twDelInfo><twComp>Mcompar_state_cmp_eq0001_cy&lt;7&gt;</twComp></twPathDel><twPathDel><twSite>SLICE_X3Y52.COUT</twSite><twDelType>Tbyp</twDelType><twDelInfo twEdge="twRising">0.130</twDelInfo><twComp>Mcompar_state_cmp_eq0001_cy&lt;9&gt;</twComp><twBEL>Mcompar_state_cmp_eq0001_cy&lt;8&gt;</twBEL><twBEL>Mcompar_state_cmp_eq0001_cy&lt;9&gt;</twBEL></twPathDel><twPathDel><twSite>SLICE_X3Y53.CIN</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.000</twDelInfo><twComp>Mcompar_state_cmp_eq0001_cy&lt;9&gt;</twComp></twPathDel><twPathDel><twSite>SLICE_X3Y53.COUT</twSite><twDelType>Tbyp</twDelType><twDelInfo twEdge="twRising">0.130</twDelInfo><twComp>Mcompar_state_cmp_eq0001_cy&lt;11&gt;</twComp><twBEL>Mcompar_state_cmp_eq0001_cy&lt;10&gt;</twBEL><twBEL>Mcompar_state_cmp_eq0001_cy&lt;11&gt;</twBEL></twPathDel><twPathDel><twSite>SLICE_X3Y54.CIN</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.000</twDelInfo><twComp>Mcompar_state_cmp_eq0001_cy&lt;11&gt;</twComp></twPathDel><twPathDel><twSite>SLICE_X3Y54.COUT</twSite><twDelType>Tbyp</twDelType><twDelInfo twEdge="twRising">0.130</twDelInfo><twComp>Mcompar_state_cmp_eq0001_cy&lt;13&gt;</twComp><twBEL>Mcompar_state_cmp_eq0001_cy&lt;12&gt;</twBEL><twBEL>Mcompar_state_cmp_eq0001_cy&lt;13&gt;</twBEL></twPathDel><twPathDel><twSite>SLICE_X3Y55.CIN</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.000</twDelInfo><twComp>Mcompar_state_cmp_eq0001_cy&lt;13&gt;</twComp></twPathDel><twPathDel><twSite>SLICE_X3Y55.COUT</twSite><twDelType>Tbyp</twDelType><twDelInfo twEdge="twRising">0.130</twDelInfo><twComp>Mcompar_state_cmp_eq0001_cy&lt;15&gt;</twComp><twBEL>Mcompar_state_cmp_eq0001_cy&lt;14&gt;</twBEL><twBEL>Mcompar_state_cmp_eq0001_cy&lt;15&gt;</twBEL></twPathDel><twPathDel><twSite>SLICE_X10Y64.G4</twSite><twDelType>net</twDelType><twFanCnt>2</twFanCnt><twDelInfo twEdge="twRising">1.901</twDelInfo><twComp>Mcompar_state_cmp_eq0001_cy&lt;15&gt;</twComp></twPathDel><twPathDel><twSite>SLICE_X10Y64.Y</twSite><twDelType>Tilo</twDelType><twDelInfo twEdge="twRising">0.707</twDelInfo><twComp>state_FSM_FFd3</twComp><twBEL>state_FSM_FFd3-In74</twBEL></twPathDel><twPathDel><twSite>SLICE_X10Y64.F4</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.060</twDelInfo><twComp>state_FSM_FFd3-In74/O</twComp></twPathDel><twPathDel><twSite>SLICE_X10Y64.CLK</twSite><twDelType>Tfck</twDelType><twDelInfo twEdge="twRising">0.802</twDelInfo><twComp>state_FSM_FFd3</twComp><twBEL>state_FSM_FFd3-In87</twBEL><twBEL>state_FSM_FFd3</twBEL></twPathDel><twLogDel>4.075</twLogDel><twRouteDel>3.842</twRouteDel><twTotDel>7.917</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="20.000">wb_clk_i_BUFGP</twDestClk><twPctLog>51.5</twPctLog><twPctRoute>48.5</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRptBanner iPaths="8" iCriticalPaths="0" sType="EndPoint">Paths for end point datafifowrite/custom_fifo_dp6/addr_rd_1 (SLICE_X11Y0.CE), 8 paths
</twPathRptBanner><twPathRpt anchorID="14"><twConstPath anchorID="15" twDataPathType="twDataPathMaxDelay" constType="period"><twSlack>2.087</twSlack><twSrc BELType="FF">state_FSM_FFd2</twSrc><twDest BELType="FF">datafifowrite/custom_fifo_dp6/addr_rd_1</twDest><twTotPathDel>7.836</twTotPathDel><twClkSkew dest = "0.561" src = "0.638">0.077</twClkSkew><twDelConst>10.000</twDelConst><tw2Phase></tw2Phase><twClkUncert fSysJit="0.000" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="">0.000</twClkUncert><twDetPath maxSiteLen="15"><twSrc BELType='FF'>state_FSM_FFd2</twSrc><twDest BELType='FF'>datafifowrite/custom_fifo_dp6/addr_rd_1</twDest><twLogLvls>2</twLogLvls><twSrcSite>SLICE_X10Y65.CLK</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="0.000">wb_clk_i_BUFGP</twSrcClk><twPathDel><twSite>SLICE_X10Y65.XQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twRising">0.631</twDelInfo><twComp>state_FSM_FFd2</twComp><twBEL>state_FSM_FFd2</twBEL></twPathDel><twPathDel><twSite>SLICE_X6Y51.G3</twSite><twDelType>net</twDelType><twFanCnt>87</twFanCnt><twDelInfo twEdge="twRising">2.122</twDelInfo><twComp>state_FSM_FFd2</twComp></twPathDel><twPathDel><twSite>SLICE_X6Y51.Y</twSite><twDelType>Tilo</twDelType><twDelInfo twEdge="twRising">0.707</twDelInfo><twComp>datafifowrite/custom_fifo_dp8/addr_rd_2_and0000</twComp><twBEL>word_out_mux0000&lt;10&gt;11</twBEL></twPathDel><twPathDel><twSite>SLICE_X11Y1.F2</twSite><twDelType>net</twDelType><twFanCnt>8</twFanCnt><twDelInfo twEdge="twRising">2.479</twDelInfo><twComp>N4</twComp></twPathDel><twPathDel><twSite>SLICE_X11Y1.X</twSite><twDelType>Tilo</twDelType><twDelInfo twEdge="twRising">0.643</twDelInfo><twComp>datafifowrite/custom_fifo_dp6/addr_rd_2_and0000</twComp><twBEL>datafifowrite/custom_fifo_dp6/addr_rd_2_and0000</twBEL></twPathDel><twPathDel><twSite>SLICE_X11Y0.CE</twSite><twDelType>net</twDelType><twFanCnt>2</twFanCnt><twDelInfo twEdge="twRising">0.943</twDelInfo><twComp>datafifowrite/custom_fifo_dp6/addr_rd_2_and0000</twComp></twPathDel><twPathDel><twSite>SLICE_X11Y0.CLK</twSite><twDelType>Tceck</twDelType><twDelInfo twEdge="twRising">0.311</twDelInfo><twComp>datafifowrite/custom_fifo_dp6/addr_rd&lt;1&gt;</twComp><twBEL>datafifowrite/custom_fifo_dp6/addr_rd_1</twBEL></twPathDel><twLogDel>2.292</twLogDel><twRouteDel>5.544</twRouteDel><twTotDel>7.836</twTotDel><twDestClk twEdge ="twFalling" twArriveTime ="10.000">wb_clk_i_BUFGP</twDestClk><twPctLog>29.2</twPctLog><twPctRoute>70.8</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRpt anchorID="16"><twConstPath anchorID="17" twDataPathType="twDataPathMaxDelay" constType="period"><twSlack>2.517</twSlack><twSrc BELType="FF">state_FSM_FFd3</twSrc><twDest BELType="FF">datafifowrite/custom_fifo_dp6/addr_rd_1</twDest><twTotPathDel>7.406</twTotPathDel><twClkSkew dest = "0.561" src = "0.638">0.077</twClkSkew><twDelConst>10.000</twDelConst><tw2Phase></tw2Phase><twClkUncert fSysJit="0.000" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="">0.000</twClkUncert><twDetPath maxSiteLen="15"><twSrc BELType='FF'>state_FSM_FFd3</twSrc><twDest BELType='FF'>datafifowrite/custom_fifo_dp6/addr_rd_1</twDest><twLogLvls>2</twLogLvls><twSrcSite>SLICE_X10Y64.CLK</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="0.000">wb_clk_i_BUFGP</twSrcClk><twPathDel><twSite>SLICE_X10Y64.XQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twRising">0.631</twDelInfo><twComp>state_FSM_FFd3</twComp><twBEL>state_FSM_FFd3</twBEL></twPathDel><twPathDel><twSite>SLICE_X6Y51.G2</twSite><twDelType>net</twDelType><twFanCnt>86</twFanCnt><twDelInfo twEdge="twRising">1.692</twDelInfo><twComp>state_FSM_FFd3</twComp></twPathDel><twPathDel><twSite>SLICE_X6Y51.Y</twSite><twDelType>Tilo</twDelType><twDelInfo twEdge="twRising">0.707</twDelInfo><twComp>datafifowrite/custom_fifo_dp8/addr_rd_2_and0000</twComp><twBEL>word_out_mux0000&lt;10&gt;11</twBEL></twPathDel><twPathDel><twSite>SLICE_X11Y1.F2</twSite><twDelType>net</twDelType><twFanCnt>8</twFanCnt><twDelInfo twEdge="twRising">2.479</twDelInfo><twComp>N4</twComp></twPathDel><twPathDel><twSite>SLICE_X11Y1.X</twSite><twDelType>Tilo</twDelType><twDelInfo twEdge="twRising">0.643</twDelInfo><twComp>datafifowrite/custom_fifo_dp6/addr_rd_2_and0000</twComp><twBEL>datafifowrite/custom_fifo_dp6/addr_rd_2_and0000</twBEL></twPathDel><twPathDel><twSite>SLICE_X11Y0.CE</twSite><twDelType>net</twDelType><twFanCnt>2</twFanCnt><twDelInfo twEdge="twRising">0.943</twDelInfo><twComp>datafifowrite/custom_fifo_dp6/addr_rd_2_and0000</twComp></twPathDel><twPathDel><twSite>SLICE_X11Y0.CLK</twSite><twDelType>Tceck</twDelType><twDelInfo twEdge="twRising">0.311</twDelInfo><twComp>datafifowrite/custom_fifo_dp6/addr_rd&lt;1&gt;</twComp><twBEL>datafifowrite/custom_fifo_dp6/addr_rd_1</twBEL></twPathDel><twLogDel>2.292</twLogDel><twRouteDel>5.114</twRouteDel><twTotDel>7.406</twTotDel><twDestClk twEdge ="twFalling" twArriveTime ="10.000">wb_clk_i_BUFGP</twDestClk><twPctLog>30.9</twPctLog><twPctRoute>69.1</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRpt anchorID="18"><twConstPath anchorID="19" twDataPathType="twDataPathMaxDelay" constType="period"><twSlack>15.134</twSlack><twSrc BELType="FF">datafifowrite/custom_fifo_dp6/addr_wr_1</twSrc><twDest BELType="FF">datafifowrite/custom_fifo_dp6/addr_rd_1</twDest><twTotPathDel>4.820</twTotPathDel><twClkSkew dest = "0.212" src = "0.258">0.046</twClkSkew><twDelConst>20.000</twDelConst><twClkUncert fSysJit="0.000" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="">0.000</twClkUncert><twDetPath maxSiteLen="15"><twSrc BELType='FF'>datafifowrite/custom_fifo_dp6/addr_wr_1</twSrc><twDest BELType='FF'>datafifowrite/custom_fifo_dp6/addr_rd_1</twDest><twLogLvls>2</twLogLvls><twSrcSite>SLICE_X7Y4.CLK</twSrcSite><twSrcClk twEdge ="twFalling" twArriveTime ="10.000">wb_clk_i_BUFGP</twSrcClk><twPathDel><twSite>SLICE_X7Y4.XQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twRising">0.591</twDelInfo><twComp>datafifowrite/custom_fifo_dp6/addr_wr&lt;1&gt;</twComp><twBEL>datafifowrite/custom_fifo_dp6/addr_wr_1</twBEL></twPathDel><twPathDel><twSite>SLICE_X9Y0.F2</twSite><twDelType>net</twDelType><twFanCnt>8</twFanCnt><twDelInfo twEdge="twRising">1.221</twDelInfo><twComp>datafifowrite/custom_fifo_dp6/addr_wr&lt;1&gt;</twComp></twPathDel><twPathDel><twSite>SLICE_X9Y0.X</twSite><twDelType>Tilo</twDelType><twDelInfo twEdge="twRising">0.643</twDelInfo><twComp>N125</twComp><twBEL>datafifowrite/custom_fifo_dp6/addr_rd_2_and0000_SW0</twBEL></twPathDel><twPathDel><twSite>SLICE_X11Y1.F1</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.468</twDelInfo><twComp>N125</twComp></twPathDel><twPathDel><twSite>SLICE_X11Y1.X</twSite><twDelType>Tilo</twDelType><twDelInfo twEdge="twRising">0.643</twDelInfo><twComp>datafifowrite/custom_fifo_dp6/addr_rd_2_and0000</twComp><twBEL>datafifowrite/custom_fifo_dp6/addr_rd_2_and0000</twBEL></twPathDel><twPathDel><twSite>SLICE_X11Y0.CE</twSite><twDelType>net</twDelType><twFanCnt>2</twFanCnt><twDelInfo twEdge="twRising">0.943</twDelInfo><twComp>datafifowrite/custom_fifo_dp6/addr_rd_2_and0000</twComp></twPathDel><twPathDel><twSite>SLICE_X11Y0.CLK</twSite><twDelType>Tceck</twDelType><twDelInfo twEdge="twRising">0.311</twDelInfo><twComp>datafifowrite/custom_fifo_dp6/addr_rd&lt;1&gt;</twComp><twBEL>datafifowrite/custom_fifo_dp6/addr_rd_1</twBEL></twPathDel><twLogDel>2.188</twLogDel><twRouteDel>2.632</twRouteDel><twTotDel>4.820</twTotDel><twDestClk twEdge ="twFalling" twArriveTime ="30.000">wb_clk_i_BUFGP</twDestClk><twPctLog>45.4</twPctLog><twPctRoute>54.6</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRptBanner iPaths="8" iCriticalPaths="0" sType="EndPoint">Paths for end point datafifowrite/custom_fifo_dp6/addr_rd_0 (SLICE_X11Y0.CE), 8 paths
</twPathRptBanner><twPathRpt anchorID="20"><twConstPath anchorID="21" twDataPathType="twDataPathMaxDelay" constType="period"><twSlack>2.087</twSlack><twSrc BELType="FF">state_FSM_FFd2</twSrc><twDest BELType="FF">datafifowrite/custom_fifo_dp6/addr_rd_0</twDest><twTotPathDel>7.836</twTotPathDel><twClkSkew dest = "0.561" src = "0.638">0.077</twClkSkew><twDelConst>10.000</twDelConst><tw2Phase></tw2Phase><twClkUncert fSysJit="0.000" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="">0.000</twClkUncert><twDetPath maxSiteLen="15"><twSrc BELType='FF'>state_FSM_FFd2</twSrc><twDest BELType='FF'>datafifowrite/custom_fifo_dp6/addr_rd_0</twDest><twLogLvls>2</twLogLvls><twSrcSite>SLICE_X10Y65.CLK</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="0.000">wb_clk_i_BUFGP</twSrcClk><twPathDel><twSite>SLICE_X10Y65.XQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twRising">0.631</twDelInfo><twComp>state_FSM_FFd2</twComp><twBEL>state_FSM_FFd2</twBEL></twPathDel><twPathDel><twSite>SLICE_X6Y51.G3</twSite><twDelType>net</twDelType><twFanCnt>87</twFanCnt><twDelInfo twEdge="twRising">2.122</twDelInfo><twComp>state_FSM_FFd2</twComp></twPathDel><twPathDel><twSite>SLICE_X6Y51.Y</twSite><twDelType>Tilo</twDelType><twDelInfo twEdge="twRising">0.707</twDelInfo><twComp>datafifowrite/custom_fifo_dp8/addr_rd_2_and0000</twComp><twBEL>word_out_mux0000&lt;10&gt;11</twBEL></twPathDel><twPathDel><twSite>SLICE_X11Y1.F2</twSite><twDelType>net</twDelType><twFanCnt>8</twFanCnt><twDelInfo twEdge="twRising">2.479</twDelInfo><twComp>N4</twComp></twPathDel><twPathDel><twSite>SLICE_X11Y1.X</twSite><twDelType>Tilo</twDelType><twDelInfo twEdge="twRising">0.643</twDelInfo><twComp>datafifowrite/custom_fifo_dp6/addr_rd_2_and0000</twComp><twBEL>datafifowrite/custom_fifo_dp6/addr_rd_2_and0000</twBEL></twPathDel><twPathDel><twSite>SLICE_X11Y0.CE</twSite><twDelType>net</twDelType><twFanCnt>2</twFanCnt><twDelInfo twEdge="twRising">0.943</twDelInfo><twComp>datafifowrite/custom_fifo_dp6/addr_rd_2_and0000</twComp></twPathDel><twPathDel><twSite>SLICE_X11Y0.CLK</twSite><twDelType>Tceck</twDelType><twDelInfo twEdge="twRising">0.311</twDelInfo><twComp>datafifowrite/custom_fifo_dp6/addr_rd&lt;1&gt;</twComp><twBEL>datafifowrite/custom_fifo_dp6/addr_rd_0</twBEL></twPathDel><twLogDel>2.292</twLogDel><twRouteDel>5.544</twRouteDel><twTotDel>7.836</twTotDel><twDestClk twEdge ="twFalling" twArriveTime ="10.000">wb_clk_i_BUFGP</twDestClk><twPctLog>29.2</twPctLog><twPctRoute>70.8</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRpt anchorID="22"><twConstPath anchorID="23" twDataPathType="twDataPathMaxDelay" constType="period"><twSlack>2.517</twSlack><twSrc BELType="FF">state_FSM_FFd3</twSrc><twDest BELType="FF">datafifowrite/custom_fifo_dp6/addr_rd_0</twDest><twTotPathDel>7.406</twTotPathDel><twClkSkew dest = "0.561" src = "0.638">0.077</twClkSkew><twDelConst>10.000</twDelConst><tw2Phase></tw2Phase><twClkUncert fSysJit="0.000" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="">0.000</twClkUncert><twDetPath maxSiteLen="15"><twSrc BELType='FF'>state_FSM_FFd3</twSrc><twDest BELType='FF'>datafifowrite/custom_fifo_dp6/addr_rd_0</twDest><twLogLvls>2</twLogLvls><twSrcSite>SLICE_X10Y64.CLK</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="0.000">wb_clk_i_BUFGP</twSrcClk><twPathDel><twSite>SLICE_X10Y64.XQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twRising">0.631</twDelInfo><twComp>state_FSM_FFd3</twComp><twBEL>state_FSM_FFd3</twBEL></twPathDel><twPathDel><twSite>SLICE_X6Y51.G2</twSite><twDelType>net</twDelType><twFanCnt>86</twFanCnt><twDelInfo twEdge="twRising">1.692</twDelInfo><twComp>state_FSM_FFd3</twComp></twPathDel><twPathDel><twSite>SLICE_X6Y51.Y</twSite><twDelType>Tilo</twDelType><twDelInfo twEdge="twRising">0.707</twDelInfo><twComp>datafifowrite/custom_fifo_dp8/addr_rd_2_and0000</twComp><twBEL>word_out_mux0000&lt;10&gt;11</twBEL></twPathDel><twPathDel><twSite>SLICE_X11Y1.F2</twSite><twDelType>net</twDelType><twFanCnt>8</twFanCnt><twDelInfo twEdge="twRising">2.479</twDelInfo><twComp>N4</twComp></twPathDel><twPathDel><twSite>SLICE_X11Y1.X</twSite><twDelType>Tilo</twDelType><twDelInfo twEdge="twRising">0.643</twDelInfo><twComp>datafifowrite/custom_fifo_dp6/addr_rd_2_and0000</twComp><twBEL>datafifowrite/custom_fifo_dp6/addr_rd_2_and0000</twBEL></twPathDel><twPathDel><twSite>SLICE_X11Y0.CE</twSite><twDelType>net</twDelType><twFanCnt>2</twFanCnt><twDelInfo twEdge="twRising">0.943</twDelInfo><twComp>datafifowrite/custom_fifo_dp6/addr_rd_2_and0000</twComp></twPathDel><twPathDel><twSite>SLICE_X11Y0.CLK</twSite><twDelType>Tceck</twDelType><twDelInfo twEdge="twRising">0.311</twDelInfo><twComp>datafifowrite/custom_fifo_dp6/addr_rd&lt;1&gt;</twComp><twBEL>datafifowrite/custom_fifo_dp6/addr_rd_0</twBEL></twPathDel><twLogDel>2.292</twLogDel><twRouteDel>5.114</twRouteDel><twTotDel>7.406</twTotDel><twDestClk twEdge ="twFalling" twArriveTime ="10.000">wb_clk_i_BUFGP</twDestClk><twPctLog>30.9</twPctLog><twPctRoute>69.1</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRpt anchorID="24"><twConstPath anchorID="25" twDataPathType="twDataPathMaxDelay" constType="period"><twSlack>15.134</twSlack><twSrc BELType="FF">datafifowrite/custom_fifo_dp6/addr_wr_1</twSrc><twDest BELType="FF">datafifowrite/custom_fifo_dp6/addr_rd_0</twDest><twTotPathDel>4.820</twTotPathDel><twClkSkew dest = "0.212" src = "0.258">0.046</twClkSkew><twDelConst>20.000</twDelConst><twClkUncert fSysJit="0.000" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="">0.000</twClkUncert><twDetPath maxSiteLen="15"><twSrc BELType='FF'>datafifowrite/custom_fifo_dp6/addr_wr_1</twSrc><twDest BELType='FF'>datafifowrite/custom_fifo_dp6/addr_rd_0</twDest><twLogLvls>2</twLogLvls><twSrcSite>SLICE_X7Y4.CLK</twSrcSite><twSrcClk twEdge ="twFalling" twArriveTime ="10.000">wb_clk_i_BUFGP</twSrcClk><twPathDel><twSite>SLICE_X7Y4.XQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twRising">0.591</twDelInfo><twComp>datafifowrite/custom_fifo_dp6/addr_wr&lt;1&gt;</twComp><twBEL>datafifowrite/custom_fifo_dp6/addr_wr_1</twBEL></twPathDel><twPathDel><twSite>SLICE_X9Y0.F2</twSite><twDelType>net</twDelType><twFanCnt>8</twFanCnt><twDelInfo twEdge="twRising">1.221</twDelInfo><twComp>datafifowrite/custom_fifo_dp6/addr_wr&lt;1&gt;</twComp></twPathDel><twPathDel><twSite>SLICE_X9Y0.X</twSite><twDelType>Tilo</twDelType><twDelInfo twEdge="twRising">0.643</twDelInfo><twComp>N125</twComp><twBEL>datafifowrite/custom_fifo_dp6/addr_rd_2_and0000_SW0</twBEL></twPathDel><twPathDel><twSite>SLICE_X11Y1.F1</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.468</twDelInfo><twComp>N125</twComp></twPathDel><twPathDel><twSite>SLICE_X11Y1.X</twSite><twDelType>Tilo</twDelType><twDelInfo twEdge="twRising">0.643</twDelInfo><twComp>datafifowrite/custom_fifo_dp6/addr_rd_2_and0000</twComp><twBEL>datafifowrite/custom_fifo_dp6/addr_rd_2_and0000</twBEL></twPathDel><twPathDel><twSite>SLICE_X11Y0.CE</twSite><twDelType>net</twDelType><twFanCnt>2</twFanCnt><twDelInfo twEdge="twRising">0.943</twDelInfo><twComp>datafifowrite/custom_fifo_dp6/addr_rd_2_and0000</twComp></twPathDel><twPathDel><twSite>SLICE_X11Y0.CLK</twSite><twDelType>Tceck</twDelType><twDelInfo twEdge="twRising">0.311</twDelInfo><twComp>datafifowrite/custom_fifo_dp6/addr_rd&lt;1&gt;</twComp><twBEL>datafifowrite/custom_fifo_dp6/addr_rd_0</twBEL></twPathDel><twLogDel>2.188</twLogDel><twRouteDel>2.632</twRouteDel><twTotDel>4.820</twTotDel><twDestClk twEdge ="twFalling" twArriveTime ="30.000">wb_clk_i_BUFGP</twDestClk><twPctLog>45.4</twPctLog><twPctRoute>54.6</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRptBanner sType="PathClass">Hold Paths: TS_wb_clk_i = PERIOD TIMEGRP &quot;wb_clk_i&quot; 20 ns HIGH 50%;
</twPathRptBanner><twPathRptBanner iPaths="1" iCriticalPaths="0" sType="EndPoint">Paths for end point datafifowrite/custom_fifo_dp7/mem[1].mem_byte/byte_reg_7 (SLICE_X2Y23.CE), 1 path
</twPathRptBanner><twPathRpt anchorID="26"><twConstPath anchorID="27" twDataPathType="twDataPathMinDelay" constType="period"><twSlack>0.975</twSlack><twSrc BELType="FF">datafifowrite/custom_fifo_dp7/addr_wr_1</twSrc><twDest BELType="FF">datafifowrite/custom_fifo_dp7/mem[1].mem_byte/byte_reg_7</twDest><twTotPathDel>1.147</twTotPathDel><twClkSkew dest = "0.626" src = "0.454">-0.172</twClkSkew><twDelConst>0.000</twDelConst><twClkUncert fSysJit="0.000" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="">0.000</twClkUncert><twDetPath maxSiteLen="15"><twSrc BELType='FF'>datafifowrite/custom_fifo_dp7/addr_wr_1</twSrc><twDest BELType='FF'>datafifowrite/custom_fifo_dp7/mem[1].mem_byte/byte_reg_7</twDest><twLogLvls>0</twLogLvls><twSrcSite>SLICE_X2Y26.CLK</twSrcSite><twSrcClk twEdge ="twFalling" twArriveTime ="30.000">wb_clk_i_BUFGP</twSrcClk><twPathDel><twSite>SLICE_X2Y26.XQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twFalling">0.505</twDelInfo><twComp>datafifowrite/custom_fifo_dp7/addr_wr&lt;1&gt;</twComp><twBEL>datafifowrite/custom_fifo_dp7/addr_wr_1</twBEL></twPathDel><twPathDel><twSite>SLICE_X2Y23.CE</twSite><twDelType>net</twDelType><twFanCnt>8</twFanCnt><twDelInfo twEdge="twFalling">0.642</twDelInfo><twComp>datafifowrite/custom_fifo_dp7/addr_wr&lt;1&gt;</twComp></twPathDel><twPathDel twHoldTime="TRUE"><twSite>SLICE_X2Y23.CLK</twSite><twDelType>Tckce</twDelType><twDelInfo twEdge="twFalling">0.000</twDelInfo><twComp>datafifowrite/custom_fifo_dp7/mem[1].mem_byte/byte_reg&lt;7&gt;</twComp><twBEL>datafifowrite/custom_fifo_dp7/mem[1].mem_byte/byte_reg_7</twBEL></twPathDel><twLogDel>0.505</twLogDel><twRouteDel>0.642</twRouteDel><twTotDel>1.147</twTotDel><twDestClk twEdge ="twFalling" twArriveTime ="30.000">wb_clk_i_BUFGP</twDestClk><twPctLog>44.0</twPctLog><twPctRoute>56.0</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRptBanner iPaths="1" iCriticalPaths="0" sType="EndPoint">Paths for end point datafifowrite/custom_fifo_dp7/mem[1].mem_byte/byte_reg_6 (SLICE_X2Y23.CE), 1 path
</twPathRptBanner><twPathRpt anchorID="28"><twConstPath anchorID="29" twDataPathType="twDataPathMinDelay" constType="period"><twSlack>0.975</twSlack><twSrc BELType="FF">datafifowrite/custom_fifo_dp7/addr_wr_1</twSrc><twDest BELType="FF">datafifowrite/custom_fifo_dp7/mem[1].mem_byte/byte_reg_6</twDest><twTotPathDel>1.147</twTotPathDel><twClkSkew dest = "0.626" src = "0.454">-0.172</twClkSkew><twDelConst>0.000</twDelConst><twClkUncert fSysJit="0.000" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="">0.000</twClkUncert><twDetPath maxSiteLen="15"><twSrc BELType='FF'>datafifowrite/custom_fifo_dp7/addr_wr_1</twSrc><twDest BELType='FF'>datafifowrite/custom_fifo_dp7/mem[1].mem_byte/byte_reg_6</twDest><twLogLvls>0</twLogLvls><twSrcSite>SLICE_X2Y26.CLK</twSrcSite><twSrcClk twEdge ="twFalling" twArriveTime ="30.000">wb_clk_i_BUFGP</twSrcClk><twPathDel><twSite>SLICE_X2Y26.XQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twFalling">0.505</twDelInfo><twComp>datafifowrite/custom_fifo_dp7/addr_wr&lt;1&gt;</twComp><twBEL>datafifowrite/custom_fifo_dp7/addr_wr_1</twBEL></twPathDel><twPathDel><twSite>SLICE_X2Y23.CE</twSite><twDelType>net</twDelType><twFanCnt>8</twFanCnt><twDelInfo twEdge="twFalling">0.642</twDelInfo><twComp>datafifowrite/custom_fifo_dp7/addr_wr&lt;1&gt;</twComp></twPathDel><twPathDel twHoldTime="TRUE"><twSite>SLICE_X2Y23.CLK</twSite><twDelType>Tckce</twDelType><twDelInfo twEdge="twFalling">0.000</twDelInfo><twComp>datafifowrite/custom_fifo_dp7/mem[1].mem_byte/byte_reg&lt;7&gt;</twComp><twBEL>datafifowrite/custom_fifo_dp7/mem[1].mem_byte/byte_reg_6</twBEL></twPathDel><twLogDel>0.505</twLogDel><twRouteDel>0.642</twRouteDel><twTotDel>1.147</twTotDel><twDestClk twEdge ="twFalling" twArriveTime ="30.000">wb_clk_i_BUFGP</twDestClk><twPctLog>44.0</twPctLog><twPctRoute>56.0</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRptBanner iPaths="1" iCriticalPaths="0" sType="EndPoint">Paths for end point datafifowrite/custom_fifo_dp8/addr_wr_0 (SLICE_X0Y51.BY), 1 path
</twPathRptBanner><twPathRpt anchorID="30"><twConstPath anchorID="31" twDataPathType="twDataPathMinDelay" constType="period"><twSlack>1.015</twSlack><twSrc BELType="FF">datafifowrite/custom_fifo_dp8/addr_wr_2</twSrc><twDest BELType="FF">datafifowrite/custom_fifo_dp8/addr_wr_0</twDest><twTotPathDel>1.031</twTotPathDel><twClkSkew dest = "0.110" src = "0.094">-0.016</twClkSkew><twDelConst>0.000</twDelConst><twClkUncert fSysJit="0.000" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="">0.000</twClkUncert><twDetPath maxSiteLen="15"><twSrc BELType='FF'>datafifowrite/custom_fifo_dp8/addr_wr_2</twSrc><twDest BELType='FF'>datafifowrite/custom_fifo_dp8/addr_wr_0</twDest><twLogLvls>0</twLogLvls><twSrcSite>SLICE_X1Y50.CLK</twSrcSite><twSrcClk twEdge ="twFalling" twArriveTime ="30.000">wb_clk_i_BUFGP</twSrcClk><twPathDel><twSite>SLICE_X1Y50.YQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twFalling">0.464</twDelInfo><twComp>datafifowrite/custom_fifo_dp8/addr_wr&lt;2&gt;</twComp><twBEL>datafifowrite/custom_fifo_dp8/addr_wr_2</twBEL></twPathDel><twPathDel><twSite>SLICE_X0Y51.BY</twSite><twDelType>net</twDelType><twFanCnt>8</twFanCnt><twDelInfo twEdge="twFalling">0.394</twDelInfo><twComp>datafifowrite/custom_fifo_dp8/addr_wr&lt;2&gt;</twComp></twPathDel><twPathDel twHoldTime="TRUE"><twSite>SLICE_X0Y51.CLK</twSite><twDelType>Tckdi</twDelType><twDelInfo twEdge="twFalling">0.173</twDelInfo><twComp>datafifowrite/custom_fifo_dp8/addr_wr&lt;1&gt;</twComp><twBEL>datafifowrite/custom_fifo_dp8/addr_wr_0</twBEL></twPathDel><twLogDel>0.637</twLogDel><twRouteDel>0.394</twRouteDel><twTotDel>1.031</twTotDel><twDestClk twEdge ="twFalling" twArriveTime ="30.000">wb_clk_i_BUFGP</twDestClk><twPctLog>61.8</twPctLog><twPctRoute>38.2</twPctRoute></twDetPath></twConstPath></twPathRpt><twPinLimitRpt anchorID="32"><twPinLimitBanner>Component Switching Limit Checks: TS_wb_clk_i = PERIOD TIMEGRP &quot;wb_clk_i&quot; 20 ns HIGH 50%;</twPinLimitBanner><twPinLimit anchorID="33" type="MINLOWPULSE" name="Trpw" slack="16.796" period="20.000" constraintValue="10.000" deviceLimit="1.602" physResource="state_FSM_FFd2/SR" logResource="state_FSM_FFd2/SR" locationPin="SLICE_X10Y65.SR" clockNet="wb_rst_i_IBUF"/><twPinLimit anchorID="34" type="MINHIGHPULSE" name="Trpw" slack="16.796" period="20.000" constraintValue="10.000" deviceLimit="1.602" physResource="state_FSM_FFd2/SR" logResource="state_FSM_FFd2/SR" locationPin="SLICE_X10Y65.SR" clockNet="wb_rst_i_IBUF"/><twPinLimit anchorID="35" type="MINLOWPULSE" name="Trpw" slack="16.796" period="20.000" constraintValue="10.000" deviceLimit="1.602" physResource="wb_interface/ack/SR" logResource="wb_interface/ack/SR" locationPin="SLICE_X0Y76.SR" clockNet="wb_rst_i_IBUF"/></twPinLimitRpt></twConst><twUnmetConstCnt anchorID="36">0</twUnmetConstCnt><twDataSheet anchorID="37" twNameLen="15"><twClk2SUList anchorID="38" twDestWidth="8"><twDest>wb_clk_i</twDest><twClk2SU><twSrc>wb_clk_i</twSrc><twRiseRise>9.531</twRiseRise><twFallRise>8.258</twFallRise><twRiseFall>7.913</twRiseFall><twFallFall>8.557</twFallFall></twClk2SU></twClk2SUList><twOffsetTables></twOffsetTables></twDataSheet></twVerboseRpt></twBody><twSum anchorID="39"><twErrCnt>0</twErrCnt><twScore>0</twScore><twSetupScore>0</twSetupScore><twHoldScore>0</twHoldScore><twConstCov><twPathCnt>3668</twPathCnt><twNetCnt>0</twNetCnt><twConnCnt>1308</twConnCnt></twConstCov><twStats anchorID="40"><twMinPer>16.516</twMinPer><twFootnote number="1" /><twMaxFreq>60.547</twMaxFreq></twStats></twSum><twFoot><twFootnoteExplanation  number="1" text="The minimum period statistic assumes all single cycle delays."></twFootnoteExplanation><twTimestamp>Mon Feb 16 11:08:59 2015 </twTimestamp></twFoot><twClientInfo anchorID="41"><twClientName>Trace</twClientName><twAttrList><twAttrListItem><twName>Trace Settings</twName><twValue>

Peak Memory Usage: 195 MB
</twValue></twAttrListItem></twAttrList></twClientInfo></twReport>

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