OpenCores
URL https://opencores.org/ocsvn/wiegand_ctl/wiegand_ctl/trunk

Subversion Repositories wiegand_ctl

[/] [wiegand_ctl/] [trunk/] [syn/] [xilinx/] [wiegand_tx/] [ise/] [wiegand_tx_top/] [wiegand_tx_top_usage.xml] - Rev 17

Compare with Previous | Blame | View Log

<?xml version="1.0" encoding="UTF-8"?>
<!-- IMPORTANT: This is an internal file that has been generated
     by the Xilinx ISE software.  Any direct editing or
     changes made to this file may result in unpredictable
     behavior or data corruption.  It is strongly advised that
     users do not edit the contents of this file. -->
<DeviceUsageSummary rev="1">
<DesignStatistics TimeStamp="Mon Feb 16 11:08:35 2015"><group name="MiscellaneousStatistics">
<item name="AGG_BONDED_IO" rev="1">
<attrib name="value" value="80"/></item>
<item name="AGG_IO" rev="1">
<attrib name="value" value="80"/></item>
<item name="AGG_SLICE" rev="1">
<attrib name="value" value="257"/></item>
<item name="NUM_4_INPUT_LUT" rev="1">
<attrib name="value" value="305"/></item>
<item name="NUM_BONDED_IBUF" rev="1">
<attrib name="value" value="43"/></item>
<item name="NUM_BONDED_IOB" rev="1">
<attrib name="value" value="37"/></item>
<item name="NUM_BUFGMUX" rev="1">
<attrib name="value" value="1"/></item>
<item name="NUM_CYMUX" rev="1">
<attrib name="value" value="63"/></item>
<item name="NUM_SLICEL" rev="1">
<attrib name="value" value="257"/></item>
<item name="NUM_SLICE_FF" rev="1">
<attrib name="value" value="318"/></item>
<item name="NUM_XOR" rev="1">
<attrib name="value" value="32"/></item>
</group>
</DesignStatistics>
<CmdHistory>
</CmdHistory>
</DeviceUsageSummary>

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.