Subversion Repositories zx_ula

`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company:        Dept. Architecture and Computing Technology. University of Seville
// Engineer:       Miguel Angel Rodriguez Jodar. rodriguj@atc.us.es
// 
// Create Date:    19:13:39 4-Apr-2012 
// Design Name:    ULAplus replacement
// Module Name:    ulaplus_tld
// Project Name: 
// Target Devices: 
// Tool versions: 
// Description: 
//
// Dependencies: 
//
// Revision: 
// Revision 1.00 - File Created
// Additional Comments: GPL License policies apply to the contents of this file.
//
//////////////////////////////////////////////////////////////////////////////////
module ulaplus_tld(
	 // Clock and reset
    input clk50,
	 input reset,
 
	 // CPU interface
	 input a15,
	 input a14,
	 input a7,
	 input a6,
	 input a2,
	 input mreq_n,
	 input ioreq_n,
	 input iorq_n,
	 input rd_n,
	 input wr_n,
	 inout [7:0] d,
	 output int_n,
	 output cpuclk_n,
 
	 // DRAM interface
	 output [6:0] va,
	 output ras_n,
	 output cas_n,
	 output dramwe_n,
 
	 // ROM interface
	 output romcs_n,
 
	 // Keyboard & audio interface
	 input [4:0] kbd,
    output audio_out,
	 input ear,
 
	 // RGB video interface
	 output [2:0] r,
	 output [2:0] g,
	 output [2:0] b,
	 output csync	 
    );
 
	wire clk28;
	master_ula_clock clock28mhz (
    .CLKIN_IN(clk50), 
    .CLKFX_OUT(clk28), 
    .CLKIN_IBUFG_OUT(), 
    .CLK0_OUT()
    );
 
   /////////////////////////////////////
   // The ULA
   /////////////////////////////////////	
	wire ula_r,ula_g,ula_b,ula_i,ulaplus_enabled;
	wire mic,spk;
	wire [7:0] rgbulaplus;
 
	ula the_ula (
		.clk28(clk28), 
		.reset_n(reset_n),
		.a15(a15), 
		.a14(a14), 
		.a7(a7), 
		.a6(a6), 
		.a2(a2), 
		.d(d), 
		.mreq_n(mreq_n), 
		.ioreq_n(ioreq_n),
		.iorq_n(iorq_n), 
		.rd_n(rd_n), 
		.wr_n(wr_n), 
		.clkcpu(cpuclk_n), 
		.int_n(int_n), 
		.va(va), 
		.ras_n(ras_n),
		.cas_n(cas_n),
		.dramwe_n(dramwe_n),
		.ear(ear), 
		.mic(mic), 
		.spk(spk), 
		.kbd(kbd), 
		.r(ula_r), 
		.g(ula_g), 
		.b(ula_b), 
		.i(ula_i),
		.rgbulaplus(rgbulaplus),
		.ulaplus_enabled(ulaplus_enabled),
		.csync(csync)
	);
 
   /////////////////////////////////////
   // ULA/ULA+ video selector and enconding
   /////////////////////////////////////	
   rgb_builder video_final_stage (
		.select(ulaplus_enabled),
		.ri(ula_r),
		.gi(ula_g),
		.bi(ula_b),
		.hi(ula_i),
		.rgbulap(rgbulaplus),
		.r(r),
		.g(g),
		.b(b)
    );
 
   /////////////////////////////////////
   // Audio mixer
   /////////////////////////////////////	
	mixer audio_mix (
		.clkdac(clk28),
		.reset_n(reset_n),
		.ear(ear),
		.mic(mic),
		.spk(spk),
		.audio(audio_out)
	);
endmodule