URL https://opencores.org/ocsvn/aes_highthroughput_lowarea/aes_highthroughput_lowarea/trunk

Subversion Repositories aes_highthroughput_lowarea

[/] [aes_highthroughput_lowarea/] [trunk/] [verilog/] [rtl/] - Rev 11

Rev 8 2012-03-31 19:24:02 GMT
Author: motilito
Log message:
Added core specification document, core top example module and FPGA synthesis project files.

Path	Last modification			Log	RSS feed
aes_highthroughput_lowarea/	11	4220d 17h	motilito	View Log	RSS feed
branches/	1	5380d 21h	root	View Log	RSS feed
tags/	1	5380d 21h	root	View Log	RSS feed
trunk/	11	4220d 17h	motilito	View Log	RSS feed
doc/	10	4582d 04h	motilito	View Log	RSS feed
verilog/	11	4220d 17h	motilito	View Log	RSS feed
bench/	11	4220d 17h	motilito	View Log	RSS feed
rtl/	8	4621d 16h	motilito	View Log	RSS feed
aes.v	8	4621d 16h	motilito	View Log	RSS feed
aes_top_example.v	8	4621d 16h	motilito	View Log	RSS feed
inv_shift_rows.v	5	5076d 19h	motilito	View Log	RSS feed
key_exp.v	8	4621d 16h	motilito	View Log	RSS feed
mix_columns.v	5	5076d 19h	motilito	View Log	RSS feed
ram_16x64.v	8	4621d 16h	motilito	View Log	RSS feed
sbox.v	7	5076d 14h	motilito	View Log	RSS feed
shift_rows.v	5	5076d 19h	motilito	View Log	RSS feed
xram_16x64.v	5	5076d 19h	motilito	View Log	RSS feed
sim/	11	4220d 17h	motilito	View Log	RSS feed
syn/	11	4220d 17h	motilito	View Log	RSS feed