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[/] [light8080/] [trunk/] [vhdl/] [test/] - Rev 90

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Last modification

  • Rev 78 2012-04-10 19:42:40 GMT
  • Author: ja_rd
  • Log message:
    Fixed a number of errors in the last refactor of the VHDL side of the project:
    - Path errors in the simulation scripts.
    - The reset pin in the C2SB mini-test-bench was not being driven.
    - The main vhdl test bench file was missing entirely.

    All of these errors due to not properly verifying the commit...
Path Last modification Log RSS feed
[FOLDER] light8080/ 90  3516d 21h motilito View Log RSS feed
[NODE][FOLDER] branches/ 31  5739d 13h root View Log RSS feed
[NODE][FOLDER] tags/ 31  5739d 13h root View Log RSS feed
[NODE][FOLDER] trunk/ 90  3516d 21h motilito View Log RSS feed
[NODE][NODE][FOLDER] c/ 68  4633d 20h motilito View Log RSS feed
[NODE][NODE][FOLDER] doc/ 89  4565d 19h ja_rd View Log RSS feed
[NODE][NODE][FOLDER] sim/ 86  4605d 17h ja_rd View Log RSS feed
[NODE][NODE][FOLDER] sw/ 87  4605d 16h ja_rd View Log RSS feed
[NODE][NODE][FOLDER] synthesis/ 46  5608d 10h ja_rd View Log RSS feed
[NODE][NODE][FOLDER] tools/ 90  3516d 21h motilito View Log RSS feed
[NODE][NODE][FOLDER] ucode/ 64  4670d 04h ja_rd View Log RSS feed
[NODE][NODE][FOLDER] util/ 64  4670d 04h ja_rd View Log RSS feed
[NODE][NODE][FOLDER] verilog/ 90  3516d 21h motilito View Log RSS feed
[NODE][NODE][FOLDER] vhdl/ 85  4605d 17h ja_rd View Log RSS feed
[NODE][NODE][NODE][FOLDER] demos/ 85  4605d 17h ja_rd View Log RSS feed
[NODE][NODE][NODE][FOLDER] soc/ 80  4605d 17h ja_rd View Log RSS feed
[NODE][NODE][NODE][FOLDER] test/ 78  4611d 18h ja_rd View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] light8080_tb.vhdl 78  4611d 18h ja_rd View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] light8080_tb0.vhdl 64  4670d 04h ja_rd View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] light8080_tb1.vhdl 59  5067d 03h ja_rd View Log RSS feed
[NODE][NODE][NODE][NODE][FILE] tb_template.vhdl 59  5067d 03h ja_rd View Log RSS feed
[NODE][FOLDER] web_uploads/ 33  5739d 00h root View Log RSS feed

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