URL https://opencores.org/ocsvn/minsoc/minsoc/trunk

Subversion Repositories minsoc

[/] [minsoc/] [branches/] [rc-1.0/] [prj/] [src/] - Rev 175

Rev 133 2011-11-07 09:48:11 GMT
Author: rfajardo
Log message:
Roll back minsoc_bench.v to timed simulation. Merge minsoc_bench_core and minsoc_bench_clock again.

Applying Rubén Diez patch to avoid warnings on firmware load for simulation.

Path	Last modification			Log	RSS feed
minsoc/	175	4043d 00h	rfajardo	View Log	RSS feed
branches/	153	4574d 08h	rfajardo	View Log	RSS feed
rc-1.0/	152	4574d 08h	rfajardo	View Log	RSS feed
backend/	147	4579d 07h	rfajardo	View Log	RSS feed
bench/	148	4579d 05h	rfajardo	View Log	RSS feed
doc/	101	4642d 12h	rfajardo	View Log	RSS feed
prj/	133	4595d 09h	rfajardo	View Log	RSS feed
altera/	97	4651d 10h	rfajardo	View Log	RSS feed
scripts/	110	4606d 21h	rfajardo	View Log	RSS feed
sim/	97	4651d 10h	rfajardo	View Log	RSS feed
src/	133	4595d 09h	rfajardo	View Log	RSS feed
blackboxes/	113	4606d 05h	rfajardo	View Log	RSS feed
adbg_top.prj	85	4657d 03h	rfajardo	View Log	RSS feed
altera_virtual_jtag.prj	96	4651d 21h	javieralso	View Log	RSS feed
ethmac.prj	120	4606d 02h	rfajardo	View Log	RSS feed
jtag_top.prj	85	4657d 03h	rfajardo	View Log	RSS feed
minsoc_bench.prj	133	4595d 09h	rfajardo	View Log	RSS feed
minsoc_top.prj	89	4657d 02h	rfajardo	View Log	RSS feed
or1200_top.prj	110	4606d 21h	rfajardo	View Log	RSS feed
uart_top.prj	85	4657d 03h	rfajardo	View Log	RSS feed
xilinx/	97	4651d 10h	rfajardo	View Log	RSS feed
rtl/	110	4606d 21h	rfajardo	View Log	RSS feed
sim/	147	4579d 07h	rfajardo	View Log	RSS feed
sw/	147	4579d 07h	rfajardo	View Log	RSS feed
syn/	121	4605d 23h	rfajardo	View Log	RSS feed
utils/	152	4574d 08h	rfajardo	View Log	RSS feed
verilator/	153	4574d 08h	rfajardo	View Log	RSS feed
tags/	172	4127d 01h	rfajardo	View Log	RSS feed
trunk/	175	4043d 00h	rfajardo	View Log	RSS feed