OpenCores
URL https://opencores.org/ocsvn/minsoc/minsoc/trunk

Subversion Repositories minsoc

[/] [minsoc/] [trunk/] [prj/] - Rev 175

Rev

Changes | View Log | RSS feed

Last modification

  • Rev 158 2012-01-05 19:32:03 GMT
  • Author: rfajardo
  • Log message:
    Adding de2_115_board port, thanks to Richard Hasha.

    Support to JSP (JTAG Serial Port) working well. Also provided by Richard Hasha.

    Different interconnect configurations per board are not straightforward on MinSoC. New added modules or definitions for addresses have to be carried over to other boards. Furthermore, extra modules can be shared among all projects. Thus, it is better to have this centralized:
    -Removing interconnect configuration from minsoc_defines.v. There is an interconnect_defines.v file on rtl/verilog. The software counterpart is interconnect.h on sw/drivers.

    Including a jsp firmware. It is basically the uart firmware but using JSP instead. Added to all board configure scripts to be compiled on configuration.

    prj/srcs extended to include jsp and interconnec_defines.v.

    spartan3e_starter_kit_eth lost UART (does not fit) and uses JSP instead now.
Path Last modification Log RSS feed
[FOLDER] minsoc/ 175  4217d 21h rfajardo View Log RSS feed
[NODE][FOLDER] branches/ 153  4749d 05h rfajardo View Log RSS feed
[NODE][FOLDER] tags/ 172  4301d 22h rfajardo View Log RSS feed
[NODE][FOLDER] trunk/ 175  4217d 21h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] backend/ 174  4253d 01h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] bench/ 162  4696d 00h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] doc/ 101  4817d 08h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] prj/ 158  4710d 20h rfajardo View Log RSS feed
[NODE][NODE][NODE][FOLDER] altera/ 97  4826d 07h rfajardo View Log RSS feed
[NODE][NODE][NODE][FOLDER] scripts/ 141  4755d 05h rfajardo View Log RSS feed
[NODE][NODE][NODE][FOLDER] sim/ 97  4826d 07h rfajardo View Log RSS feed
[NODE][NODE][NODE][FOLDER] src/ 158  4710d 20h rfajardo View Log RSS feed
[NODE][NODE][NODE][FOLDER] xilinx/ 97  4826d 07h rfajardo View Log RSS feed
[NODE][NODE][NODE][FILE] Makefile 141  4755d 05h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] rtl/ 175  4217d 21h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] sim/ 166  4602d 06h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] sw/ 158  4710d 20h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] syn/ 141  4755d 05h rfajardo View Log RSS feed
[NODE][NODE][FOLDER] utils/ 170  4370d 01h ConX. View Log RSS feed

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.